X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fmips%2FKconfig;h=2b0109f24130a0ad29881c31cbd31924aae45631;hb=refs%2Fheads%2Fvserver;hp=f95dfd54773abfbcbceb1156dece2d2b7a182fb9;hpb=43bc926fffd92024b46cafaf7350d669ba9ca884;p=linux-2.6.git
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index f95dfd547..2b0109f24 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -16,6 +16,7 @@ config MIPS_MTX1
bool "4G Systems MTX-1 board"
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select RESOURCES_64BIT if PCI
select SOC_AU1500
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_LITTLE_ENDIAN
@@ -32,6 +33,7 @@ config MIPS_PB1000
select SOC_AU1000
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select RESOURCES_64BIT if PCI
select SWAP_IO_SPACE
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_LITTLE_ENDIAN
@@ -41,6 +43,7 @@ config MIPS_PB1100
select SOC_AU1100
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select RESOURCES_64BIT if PCI
select SWAP_IO_SPACE
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_LITTLE_ENDIAN
@@ -50,6 +53,7 @@ config MIPS_PB1500
select SOC_AU1500
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select RESOURCES_64BIT if PCI
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_LITTLE_ENDIAN
@@ -59,6 +63,7 @@ config MIPS_PB1550
select DMA_NONCOHERENT
select HW_HAS_PCI
select MIPS_DISABLE_OBSOLETE_IDE
+ select RESOURCES_64BIT if PCI
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_LITTLE_ENDIAN
@@ -67,6 +72,7 @@ config MIPS_PB1200
select SOC_AU1200
select DMA_NONCOHERENT
select MIPS_DISABLE_OBSOLETE_IDE
+ select RESOURCES_64BIT if PCI
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_LITTLE_ENDIAN
@@ -75,6 +81,7 @@ config MIPS_DB1000
select SOC_AU1000
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select RESOURCES_64BIT if PCI
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_LITTLE_ENDIAN
@@ -91,6 +98,7 @@ config MIPS_DB1500
select DMA_NONCOHERENT
select HW_HAS_PCI
select MIPS_DISABLE_OBSOLETE_IDE
+ select RESOURCES_64BIT if PCI
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
@@ -101,6 +109,7 @@ config MIPS_DB1550
select HW_HAS_PCI
select DMA_NONCOHERENT
select MIPS_DISABLE_OBSOLETE_IDE
+ select RESOURCES_64BIT if PCI
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_LITTLE_ENDIAN
@@ -119,6 +128,32 @@ config MIPS_MIRAGE
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_LITTLE_ENDIAN
+config BASLER_EXCITE
+ bool "Basler eXcite smart camera support"
+ select DMA_COHERENT
+ select HW_HAS_PCI
+ select IRQ_CPU
+ select IRQ_CPU_RM7K
+ select IRQ_CPU_RM9K
+ select MIPS_RM9122
+ select SYS_HAS_CPU_RM9000
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_64BIT_KERNEL
+ select SYS_SUPPORTS_BIG_ENDIAN
+ help
+ The eXcite is a smart camera platform manufactured by
+ Basler Vision Technologies AG
+
+config BASLER_EXCITE_PROTOTYPE
+ bool "Support for pre-release units"
+ depends on BASLER_EXCITE
+ default n
+ help
+ Pre-series (prototype) units are different from later ones in
+ some ways. Select this option if you have one of these. Please
+ note that a kernel built with this option selected will not be
+ able to run on normal units.
+
config MIPS_COBALT
bool "Cobalt Server"
select DMA_NONCOHERENT
@@ -130,6 +165,7 @@ config MIPS_COBALT
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
select SYS_SUPPORTS_LITTLE_ENDIAN
+ select GENERIC_HARDIRQS_NO__DO_IRQ
config MACH_DECSTATION
bool "DECstations"
@@ -142,6 +178,9 @@ config MACH_DECSTATION
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_128HZ
+ select SYS_SUPPORTS_256HZ
+ select SYS_SUPPORTS_1024HZ
help
This enables support for DEC's MIPS based workstations. For details
see the Linux/MIPS FAQ on and the
@@ -174,59 +213,6 @@ config MIPS_EV64120
. Say Y here if you wish to build a
kernel for this platform.
-config MIPS_EV96100
- bool "Galileo EV96100 Evaluation board (EXPERIMENTAL)"
- depends on EXPERIMENTAL
- select DMA_NONCOHERENT
- select HW_HAS_PCI
- select IRQ_CPU
- select MIPS_GT96100
- select RM7000_CPU_SCACHE
- select SWAP_IO_SPACE
- select SYS_HAS_CPU_R5000
- select SYS_HAS_CPU_RM7000
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
- select SYS_SUPPORTS_BIG_ENDIAN
- help
- This is an evaluation board based on the Galileo GT-96100 LAN/WAN
- communications controllers containing a MIPS R5000 compatible core
- running at 83MHz. Their website is . Say Y
- here if you wish to build a kernel for this platform.
-
-config MIPS_IVR
- bool "Globespan IVR board"
- select DMA_NONCOHERENT
- select HW_HAS_PCI
- select ITE_BOARD_GEN
- select SYS_HAS_CPU_NEVADA
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
- select SYS_SUPPORTS_LITTLE_ENDIAN
- help
- This is an evaluation board built by Globespan to showcase thir
- iVR (Internet Video Recorder) design. It utilizes a QED RM5231
- R5000 MIPS core. More information can be found out their website
- located at . Say Y here if you wish to
- build a kernel for this platform.
-
-config MIPS_ITE8172
- bool "ITE 8172G board"
- select DMA_NONCOHERENT
- select HW_HAS_PCI
- select ITE_BOARD_GEN
- select SYS_HAS_CPU_R5432
- select SYS_HAS_CPU_NEVADA
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
- select SYS_SUPPORTS_LITTLE_ENDIAN
- help
- Ths is an evaluation board made by ITE
- with ATX form factor that utilizes a MIPS R5000 to work with its
- ITE8172G companion internet appliance chip. The MIPS core can be
- either a NEC Vr5432 or QED RM5231. Say Y here if you wish to build
- a kernel for this platform.
-
config MACH_JAZZ
bool "Jazz family of machines"
select ARC
@@ -239,6 +225,8 @@ config MACH_JAZZ
select SYS_HAS_CPU_R4X00
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
+ select SYS_SUPPORTS_100HZ
+ select GENERIC_HARDIRQS_NO__DO_IRQ
help
This a family of machines based on the MIPS R4030 chipset which was
used by several vendors to build RISC/os and Windows NT workstations.
@@ -256,6 +244,7 @@ config LASAT
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
select SYS_SUPPORTS_LITTLE_ENDIAN
+ select GENERIC_HARDIRQS_NO__DO_IRQ
config MIPS_ATLAS
bool "MIPS Atlas board"
@@ -278,6 +267,8 @@ config MIPS_ATLAS
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_MULTITHREADING if EXPERIMENTAL
+ select GENERIC_HARDIRQS_NO__DO_IRQ
help
This enables support for the MIPS Technologies Atlas evaluation
board.
@@ -288,12 +279,13 @@ config MIPS_MALTA
select BOOT_ELF32
select HAVE_STD_PC_SERIAL_PORT
select DMA_NONCOHERENT
- select IRQ_CPU
select GENERIC_ISA_DMA
+ select IRQ_CPU
select HW_HAS_PCI
select I8259
select MIPS_BOARDS_GEN
select MIPS_BONITO64
+ select MIPS_CPU_SCACHE
select MIPS_GT64120
select MIPS_MSC
select SWAP_IO_SPACE
@@ -306,6 +298,7 @@ config MIPS_MALTA
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_MULTITHREADING
help
This enables support for the MIPS Technologies Malta evaluation
board.
@@ -327,6 +320,27 @@ config MIPS_SEAD
This enables support for the MIPS Technologies SEAD evaluation
board.
+config WR_PPMC
+ bool "Wind River PPMC board"
+ select IRQ_CPU
+ select BOOT_ELF32
+ select DMA_NONCOHERENT
+ select HW_HAS_PCI
+ select MIPS_GT64120
+ select SWAP_IO_SPACE
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_HAS_CPU_MIPS32_R2
+ select SYS_HAS_CPU_MIPS64_R1
+ select SYS_HAS_CPU_NEVADA
+ select SYS_HAS_CPU_RM7000
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_64BIT_KERNEL
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ help
+ This enables support for the Wind River MIPS32 4KC PPMC evaluation
+ board, which is based on GT64120 bridge chip.
+
config MIPS_SIM
bool 'MIPS simulator (MIPSsim)'
select DMA_NONCOHERENT
@@ -409,6 +423,7 @@ config MOMENCO_OCELOT_C
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
+ select GENERIC_HARDIRQS_NO__DO_IRQ
help
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
Momentum Computer .
@@ -424,7 +439,7 @@ config MOMENCO_OCELOT_G
select SWAP_IO_SPACE
select SYS_HAS_CPU_RM7000
select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL
+ select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
select SYS_SUPPORTS_BIG_ENDIAN
help
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
@@ -446,44 +461,10 @@ config PNX8550_JBS
select PNX8550
select SYS_SUPPORTS_LITTLE_ENDIAN
-config DDB5074
- bool "NEC DDB Vrc-5074 (EXPERIMENTAL)"
- depends on EXPERIMENTAL
- select DDB5XXX_COMMON
- select DMA_NONCOHERENT
- select HAVE_STD_PC_SERIAL_PORT
- select HW_HAS_PCI
- select IRQ_CPU
- select I8259
- select ISA
- select SYS_HAS_CPU_R5000
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
- select SYS_SUPPORTS_LITTLE_ENDIAN
- help
- This enables support for the VR5000-based NEC DDB Vrc-5074
- evaluation board.
-
-config DDB5476
- bool "NEC DDB Vrc-5476"
- select DDB5XXX_COMMON
- select DMA_NONCOHERENT
- select HAVE_STD_PC_SERIAL_PORT
- select HW_HAS_PCI
- select IRQ_CPU
- select I8259
- select ISA
- select SYS_HAS_CPU_R5432
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
+config PNX8550_STB810
+ bool "Support for Philips PNX8550 based STB810 board"
+ select PNX8550
select SYS_SUPPORTS_LITTLE_ENDIAN
- help
- This enables support for the R5432-based NEC DDB Vrc-5476
- evaluation board.
-
- Features : kernel debugging, serial terminal, NFS root fs, on-board
- ether port USB, AC97, PCI, PCI VGA card & framebuffer console,
- IDE controller, PS2 keyboard, PS2 mouse, etc.
config DDB5477
bool "NEC DDB Vrc-5477"
@@ -508,6 +489,7 @@ config MACH_VR41XX
select SYS_HAS_CPU_VR41XX
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
+ select GENERIC_HARDIRQS_NO__DO_IRQ
config PMC_YOSEMITE
bool "PMC-Sierra Yosemite eval board"
@@ -522,6 +504,7 @@ config PMC_YOSEMITE
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_HIGHMEM
+ select SYS_SUPPORTS_SMP
help
Yosemite is an evaluation board for the RM9000x2 processor
manufactured by PMC-Sierra.
@@ -538,6 +521,9 @@ config QEMU
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select ARCH_SPARSEMEM_ENABLE
+ select GENERIC_HARDIRQS_NO__DO_IRQ
help
Qemu is a software emulator which among other architectures also
can simulate a MIPS32 4Kc system. This patch adds support for the
@@ -546,6 +532,20 @@ config QEMU
simulate actual MIPS hardware platforms. More information on Qemu
can be found at http://www.linux-mips.org/wiki/Qemu.
+config MARKEINS
+ bool "Support for NEC EMMA2RH Mark-eins"
+ select DMA_NONCOHERENT
+ select HW_HAS_PCI
+ select IRQ_CPU
+ select SWAP_IO_SPACE
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_HAS_CPU_R5000
+ help
+ This enables support for the R5432-based NEC Mark-eins
+ boards with R5500 CPU.
+
config SGI_IP22
bool "SGI IP22 (Indy/Indigo2)"
select ARC
@@ -555,6 +555,7 @@ config SGI_IP22
select HW_HAS_EISA
select IP22_CPU_SCACHE
select IRQ_CPU
+ select GENERIC_ISA_DMA_SUPPORT_BROKEN
select SWAP_IO_SPACE
select SYS_HAS_CPU_R4X00
select SYS_HAS_CPU_R5000
@@ -572,11 +573,15 @@ config SGI_IP27
select ARC64
select BOOT_ELF64
select DMA_IP27
+ select EARLY_PRINTK
select HW_HAS_PCI
select PCI_DOMAINS
select SYS_HAS_CPU_R10000
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_NUMA
+ select SYS_SUPPORTS_SMP
+ select GENERIC_HARDIRQS_NO__DO_IRQ
help
This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
workstations. To compile a Linux kernel that runs on these, say Y
@@ -705,10 +710,10 @@ config SIBYTE_CRHONE
select SYS_SUPPORTS_HIGHMEM
select SYS_SUPPORTS_LITTLE_ENDIAN
-config SNI_RM200_PCI
- bool "SNI RM200 PCI"
- select ARC
- select ARC32
+config SNI_RM
+ bool "SNI RM200/300/400"
+ select ARC if CPU_LITTLE_ENDIAN
+ select ARC32 if CPU_LITTLE_ENDIAN
select ARCH_MAY_HAVE_PC_FDC
select BOOT_ELF32
select DMA_NONCOHERENT
@@ -719,15 +724,18 @@ config SNI_RM200_PCI
select I8253
select I8259
select ISA
+ select SWAP_IO_SPACE if CPU_BIG_ENDIAN
select SYS_HAS_CPU_R4X00
+ select SYS_HAS_CPU_R5000
+ select R5000_CPU_SCACHE
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
- select SYS_SUPPORTS_BIG_ENDIAN if EXPERIMENTAL
+ select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_HIGHMEM
select SYS_SUPPORTS_LITTLE_ENDIAN
help
- The SNI RM200 PCI was a MIPS-based platform manufactured by Siemens
- Nixdorf Informationssysteme (SNI), parent company of Pyramid
+ The SNI RM200/300/400 are MIPS-based machines manufactured by
+ Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
Technology and now in turn merged with Fujitsu. Say Y here to
support this machine type.
@@ -755,6 +763,7 @@ config TOSHIBA_RBTX4927
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select TOSHIBA_BOARDS
+ select GENERIC_HARDIRQS_NO__DO_IRQ
help
This Toshiba board is based on the TX4927 processor. Say Y here to
support this machine type
@@ -774,16 +783,33 @@ config TOSHIBA_RBTX4938
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_BIG_ENDIAN
select TOSHIBA_BOARDS
+ select GENERIC_HARDIRQS_NO__DO_IRQ
help
This Toshiba board is based on the TX4938 processor. Say Y here to
support this machine type
endchoice
+config KEXEC
+ bool "Kexec system call (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
+ help
+ kexec is a system call that implements the ability to shutdown your
+ current kernel, and to start another kernel. It is like a reboot
+ but it is indepedent of the system firmware. And like a reboot
+ you can start any kernel with it, not just Linux.
+
+ The name comes from the similiarity to the exec system call.
+
+ It is an ongoing process to be certain the hardware in a machine
+ is properly shutdown, so do not be surprised if this code does not
+ initially work for you. It may help to enable device hotplugging
+ support. As of this writing the exact hardware interface is
+ strongly in flux, so no good recommendation can be made.
+
source "arch/mips/ddb5xxx/Kconfig"
source "arch/mips/gt64120/ev64120/Kconfig"
source "arch/mips/jazz/Kconfig"
-source "arch/mips/ite-boards/Kconfig"
source "arch/mips/lasat/Kconfig"
source "arch/mips/momentum/Kconfig"
source "arch/mips/pmc-sierra/Kconfig"
@@ -804,6 +830,14 @@ config RWSEM_GENERIC_SPINLOCK
config RWSEM_XCHGADD_ALGORITHM
bool
+config ARCH_HAS_ILOG2_U32
+ bool
+ default n
+
+config ARCH_HAS_ILOG2_U64
+ bool
+ default n
+
config GENERIC_FIND_NEXT_BIT
bool
default y
@@ -816,10 +850,18 @@ config GENERIC_CALIBRATE_DELAY
bool
default y
+config GENERIC_TIME
+ bool
+ default y
+
config SCHED_NO_NO_OMIT_FRAME_POINTER
bool
default y
+config GENERIC_HARDIRQS_NO__DO_IRQ
+ bool
+ default n
+
#
# Select some configuration options automatically based on user selections.
#
@@ -875,8 +917,11 @@ config MIPS_NILE4
config MIPS_DISABLE_OBSOLETE_IDE
bool
+config GENERIC_ISA_DMA_SUPPORT_BROKEN
+ bool
+
#
-# Endianess selection. Suffiently obscure so many users don't know what to
+# Endianess selection. Sufficiently obscure so many users don't know what to
# answer,so we try hard to limit the available choices. Also the use of a
# choice statement should be more obvious to the user.
#
@@ -885,7 +930,7 @@ choice
help
Some MIPS machines can be configured for either little or big endian
byte order. These modes require different kernels and a different
- Linux distribution. In general there is one prefered byteorder for a
+ Linux distribution. In general there is one preferred byteorder for a
particular system but some systems are just as commonly used in the
one or the other endianess.
@@ -934,10 +979,13 @@ config MIPS_TX3927
bool
select HAS_TXX9_SERIAL
-config PCI_MARVELL
+config MIPS_RM9122
bool
+ select SERIAL_RM9000
+ select GPI_RM9000
+ select WDT_RM9000
-config ITE_BOARD_GEN
+config PCI_MARVELL
bool
config SOC_AU1000
@@ -975,10 +1023,25 @@ config SOC_PNX8550
select HW_HAS_PCI
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_32BIT_KERNEL
+ select GENERIC_HARDIRQS_NO__DO_IRQ
config SWAP_IO_SPACE
bool
+config EMMA2RH
+ bool
+ depends on MARKEINS
+ default y
+
+config SERIAL_RM9000
+ bool
+
+config GPI_RM9000
+ bool
+
+config WDT_RM9000
+ bool
+
#
# Unfortunately not all GT64120 systems run the chip at the same clock.
# As the user for the clock rate and try to minimize the available options.
@@ -1004,25 +1067,6 @@ endchoice
config ARC32
bool
-config AU1X00_USB_DEVICE
- bool
- depends on MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000
- default n
-
-config MIPS_GT96100
- bool
- select MIPS_GT64120
-
-config IT8172_CIR
- bool
- depends on MIPS_ITE8172 || MIPS_IVR
- default y
-
-config IT8712
- bool
- depends on MIPS_ITE8172
- default y
-
config BOOT_ELF32
bool
@@ -1037,16 +1081,16 @@ config HAVE_STD_PC_SERIAL_PORT
config ARC_CONSOLE
bool "ARC console support"
- depends on SGI_IP22 || SNI_RM200_PCI
+ depends on SGI_IP22 || SNI_RM
config ARC_MEMORY
bool
- depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP32
+ depends on MACH_JAZZ || SNI_RM || SGI_IP32
default y
config ARC_PROMLIB
bool
- depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP22 || SGI_IP32
+ depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP32
default y
config ARC64
@@ -1211,7 +1255,7 @@ config CPU_R6000
select CPU_SUPPORTS_32BIT_KERNEL
help
MIPS Technologies R6000 and R6000A series processors. Note these
- processors are extremly rare and the support for them is incomplete.
+ processors are extremely rare and the support for them is incomplete.
config CPU_NEVADA
bool "RM52xx"
@@ -1261,6 +1305,7 @@ config CPU_RM9000
select CPU_SUPPORTS_32BIT_KERNEL
select CPU_SUPPORTS_64BIT_KERNEL
select CPU_SUPPORTS_HIGHMEM
+ select WEAK_ORDERING
config CPU_SB1
bool "SB1"
@@ -1269,6 +1314,7 @@ config CPU_SB1
select CPU_SUPPORTS_32BIT_KERNEL
select CPU_SUPPORTS_64BIT_KERNEL
select CPU_SUPPORTS_HIGHMEM
+ select WEAK_ORDERING
endchoice
@@ -1329,10 +1375,12 @@ config SYS_HAS_CPU_RM9000
config SYS_HAS_CPU_SB1
bool
+config WEAK_ORDERING
+ bool
endmenu
#
-# These two indicate any levelof the MIPS32 and MIPS64 architecture
+# These two indicate any level of the MIPS32 and MIPS64 architecture
#
config CPU_MIPS32
bool
@@ -1343,7 +1391,7 @@ config CPU_MIPS64
default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
#
-# These two indicate the revision of the architecture, either 32 bot 64 bit.
+# These two indicate the revision of the architecture, either Release 1 or Release 2
#
config CPU_MIPSR1
bool
@@ -1436,6 +1484,13 @@ config IP22_CPU_SCACHE
bool
select BOARD_SCACHE
+#
+# Support for a MIPS32 / MIPS64 style S-caches
+#
+config MIPS_CPU_SCACHE
+ bool
+ select BOARD_SCACHE
+
config R5000_CPU_SCACHE
bool
select BOARD_SCACHE
@@ -1455,37 +1510,78 @@ config SIBYTE_DMA_PAGEOPS
config CPU_HAS_PREFETCH
bool
-config MIPS_MT
- bool "Enable MIPS MT"
-
choice
prompt "MIPS MT options"
- depends on MIPS_MT
-config MIPS_MT_SMTC
- bool "SMTC: Use all TCs on all VPEs for SMP"
+config MIPS_MT_DISABLED
+ bool "Disable multithreading support."
+ help
+ Use this option if your workload can't take advantage of
+ MIPS hardware multithreading support. On systems that don't have
+ the option of an MT-enabled processor this option will be the only
+ option in this menu.
+
+config MIPS_MT_SMP
+ bool "Use 1 TC on each available VPE for SMP"
+ depends on SYS_SUPPORTS_MULTITHREADING
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_SRS
+ select MIPS_MT
select SMP
+ select SYS_SUPPORTS_SMP
+ help
+ This is a kernel model which is also known a VSMP or lately
+ has been marketesed into SMVP.
-config MIPS_MT_SMP
- bool "Use 1 TC on each available VPE for SMP"
+config MIPS_MT_SMTC
+ bool "SMTC: Use all TCs on all VPEs for SMP"
+ depends on CPU_MIPS32_R2
+ #depends on CPU_MIPS64_R2 # once there is hardware ...
+ depends on SYS_SUPPORTS_MULTITHREADING
+ select CPU_MIPSR2_IRQ_VI
+ select CPU_MIPSR2_SRS
+ select MIPS_MT
select SMP
+ select SYS_SUPPORTS_SMP
+ help
+ This is a kernel model which is known a SMTC or lately has been
+ marketesed into SMVP.
config MIPS_VPE_LOADER
bool "VPE loader support."
- depends on MIPS_MT
+ depends on SYS_SUPPORTS_MULTITHREADING
+ select MIPS_MT
help
Includes a loader for loading an elf relocatable object
onto another VPE and running it.
endchoice
+config MIPS_MT
+ bool
+
+config SYS_SUPPORTS_MULTITHREADING
+ bool
+
config MIPS_MT_FPAFF
bool "Dynamic FPU affinity for FP-intensive threads"
depends on MIPS_MT
default y
+config MIPS_MT_SMTC_INSTANT_REPLAY
+ bool "Low-latency Dispatch of Deferred SMTC IPIs"
+ depends on MIPS_MT_SMTC
+ default y
+ help
+ SMTC pseudo-interrupts between TCs are deferred and queued
+ if the target TC is interrupt-inhibited (IXMT). In the first
+ SMTC prototypes, these queued IPIs were serviced on return
+ to user mode, or on entry into the kernel idle loop. The
+ INSTANT_REPLAY option dispatches them as part of local_irq_restore()
+ processing, which adds runtime overhead (hence the option to turn
+ it off), but ensures that IPIs are handled promptly even under
+ heavy I/O interrupt load.
+
config MIPS_VPE_LOADER_TOM
bool "Load VPE program into memory hidden from linux"
depends on MIPS_VPE_LOADER
@@ -1537,32 +1633,23 @@ config CPU_HAS_LLSC
config CPU_HAS_WB
bool
+#
+# Vectored interrupt mode is an R2 feature
+#
config CPU_MIPSR2_IRQ_VI
- bool "Vectored interrupt mode"
- depends on CPU_MIPSR2
- help
- Vectored interrupt mode allowing faster dispatching of interrupts.
- The board support code needs to be written to take advantage of this
- mode. Compatibility code is included to allow the kernel to run on
- a CPU that does not support vectored interrupts. It's safe to
- say Y here.
+ bool
+#
+# Extended interrupt mode is an R2 feature
+#
config CPU_MIPSR2_IRQ_EI
- bool "External interrupt controller mode"
- depends on CPU_MIPSR2
- help
- Extended interrupt mode takes advantage of an external interrupt
- controller to allow fast dispatching from many possible interrupt
- sources. Say N unless you know that external interrupt support is
- required.
+ bool
+#
+# Shadow registers are an R2 feature
+#
config CPU_MIPSR2_SRS
- bool "Make shadow set registers available for interrupt handlers"
- depends on CPU_MIPSR2_IRQ_VI || CPU_MIPSR2_IRQ_EI
- help
- Allow the kernel to use shadow register sets for fast interrupts.
- Interrupt handlers must be specially written to use shadow sets.
- Say N unless you know that shadow register set upport is needed.
+ bool
config CPU_HAS_SYNC
bool
@@ -1580,6 +1667,9 @@ config GENERIC_IRQ_PROBE
bool
default y
+config IRQ_PER_CPU
+ bool
+
#
# - Highmem only makes sense for the 32-bit kernel.
# - The current highmem code will only work properly on physically indexed
@@ -1607,6 +1697,32 @@ config ARCH_FLATMEM_ENABLE
def_bool y
depends on !NUMA
+config ARCH_DISCONTIGMEM_ENABLE
+ bool
+ default y if SGI_IP27
+ help
+ Say Y to upport efficient handling of discontiguous physical memory,
+ for architectures which are either NUMA (Non-Uniform Memory Access)
+ or have huge holes in the physical address space for other reasons.
+ See for more.
+
+config ARCH_SPARSEMEM_ENABLE
+ bool
+ select SPARSEMEM_STATIC
+
+config NUMA
+ bool "NUMA Support"
+ depends on SYS_SUPPORTS_NUMA
+ help
+ Say Y to compile the kernel to support NUMA (Non-Uniform Memory
+ Access). This option improves performance on systems with more
+ than two nodes; on two node systems it is generally better to
+ leave it disabled; on single node systems disable this option
+ disabled.
+
+config SYS_SUPPORTS_NUMA
+ bool
+
config NODES_SHIFT
int
default "6"
@@ -1616,8 +1732,9 @@ source "mm/Kconfig"
config SMP
bool "Multi-Processing support"
- depends on CPU_RM9000 || ((SIBYTE_BCM1x80 || SIBYTE_BCM1x55 || SIBYTE_SB1250 || QEMU) && !SIBYTE_STANDALONE) || SGI_IP27 || MIPS_MT_SMP || MIPS_MT_SMTC
- ---help---
+ depends on SYS_SUPPORTS_SMP
+ select IRQ_PER_CPU
+ help
This enables support for systems with more than one CPU. If you have
a system with only one CPU, like most personal computers, say N. If
you have a system with more than one CPU, say Y.
@@ -1636,12 +1753,16 @@ config SMP
If you don't know what to do here, say N.
+config SYS_SUPPORTS_SMP
+ bool
+
config NR_CPUS
int "Maximum number of CPUs (2-64)"
range 2 64
depends on SMP
default "64" if SGI_IP27
default "2"
+ default "8" if MIPS_MT_SMTC
help
This allows you to specify the maximum number of CPUs which this
kernel will support. The maximum supported value is 32 for 32-bit
@@ -1651,6 +1772,77 @@ config NR_CPUS
This is purely to save memory - each supported CPU adds
approximately eight kilobytes to the kernel image.
+#
+# Timer Interrupt Frequency Configuration
+#
+
+choice
+ prompt "Timer frequency"
+ default HZ_250
+ help
+ Allows the configuration of the timer frequency.
+
+ config HZ_48
+ bool "48 HZ" if SYS_SUPPORTS_48HZ
+
+ config HZ_100
+ bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
+
+ config HZ_128
+ bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
+
+ config HZ_250
+ bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
+
+ config HZ_256
+ bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
+
+ config HZ_1000
+ bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
+
+ config HZ_1024
+ bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
+
+endchoice
+
+config SYS_SUPPORTS_48HZ
+ bool
+
+config SYS_SUPPORTS_100HZ
+ bool
+
+config SYS_SUPPORTS_128HZ
+ bool
+
+config SYS_SUPPORTS_250HZ
+ bool
+
+config SYS_SUPPORTS_256HZ
+ bool
+
+config SYS_SUPPORTS_1000HZ
+ bool
+
+config SYS_SUPPORTS_1024HZ
+ bool
+
+config SYS_SUPPORTS_ARBIT_HZ
+ bool
+ default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \
+ !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \
+ !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \
+ !SYS_SUPPORTS_1024HZ
+
+config HZ
+ int
+ default 48 if HZ_48
+ default 100 if HZ_100
+ default 128 if HZ_128
+ default 250 if HZ_250
+ default 256 if HZ_256
+ default 1000 if HZ_1000
+ default 1024 if HZ_1024
+
source "kernel/Kconfig.preempt"
config RTC_DS1742
@@ -1673,6 +1865,14 @@ config RWSEM_GENERIC_SPINLOCK
bool
default y
+config LOCKDEP_SUPPORT
+ bool
+ default y
+
+config STACKTRACE_SUPPORT
+ bool
+ default y
+
source "init/Kconfig"
menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
@@ -1714,6 +1914,7 @@ config EISA
bool "EISA support"
depends on HW_HAS_EISA
select ISA
+ select GENERIC_ISA_DMA
---help---
The Extended Industry Standard Architecture (EISA) bus was
developed as an open alternative to the IBM MicroChannel bus.
@@ -1794,6 +1995,11 @@ config COMPAT
depends on MIPS32_COMPAT
default y
+config SYSVIPC_COMPAT
+ bool
+ depends on COMPAT && SYSVIPC
+ default y
+
config MIPS32_O32
bool "Kernel support for o32 binaries"
depends on MIPS32_COMPAT
@@ -1840,6 +2046,32 @@ config PM
bool "Power Management support (EXPERIMENTAL)"
depends on EXPERIMENTAL && SOC_AU1X00
+config APM
+ tristate "Advanced Power Management Emulation"
+ depends on PM
+ ---help---
+ APM is a BIOS specification for saving power using several different
+ techniques. This is mostly useful for battery powered systems with
+ APM compliant BIOSes. If you say Y here, the system time will be
+ reset after a RESUME operation, the /proc/apm device will provide
+ battery status information, and user-space programs will receive
+ notification of APM "events" (e.g. battery status change).
+
+ In order to use APM, you will need supporting software. For location
+ and more information, read and the
+ Battery Powered Linux mini-HOWTO, available from
+ .
+
+ This driver does not spin down disk drives (see the hdparm(8)
+ manpage ("man 8 hdparm") for that), and it doesn't turn off
+ VESA-compliant "green" monitors.
+
+ Generally, if you don't have a battery in your machine, there isn't
+ much point in using this driver and you should say N. If you get
+ random kernel OOPSes or reboots that don't seem to be related to
+ anything, try disabling/enabling this option (or disabling/enabling
+ APM in your BIOS).
+
endmenu
source "net/Kconfig"