X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fmips%2Fcobalt%2Firq.c;h=f9a108820d6e2d1245eb64ac942df5418fba03e0;hb=987b0145d94eecf292d8b301228356f44611ab7c;hp=0b75f4fb719570ef4a8f29be227e8c1f3d5d00d0;hpb=f7ed79d23a47594e7834d66a8f14449796d4f3e6;p=linux-2.6.git

diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c
index 0b75f4fb7..f9a108820 100644
--- a/arch/mips/cobalt/irq.c
+++ b/arch/mips/cobalt/irq.c
@@ -20,6 +20,8 @@
 
 #include <asm/mach-cobalt/cobalt.h>
 
+extern void cobalt_handle_int(void);
+
 /*
  * We have two types of interrupts that we handle, ones that come in through
  * the CPU interrupt lines, and ones that come in on the via chip. The CPU
@@ -77,7 +79,7 @@ static inline void via_pic_irq(struct pt_regs *regs)
 		do_IRQ(irq, regs);
 }
 
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void cobalt_irq(struct pt_regs *regs)
 {
 	unsigned pending;
 
@@ -120,6 +122,8 @@ void __init arch_init_irq(void)
 	 */
 	GALILEO_OUTL(0, GT_INTRMASK_OFS);
 
+	set_except_vector(0, cobalt_handle_int);
+
 	init_i8259_irqs();				/*  0 ... 15 */
 	mips_cpu_irq_init(COBALT_CPU_IRQ);		/* 16 ... 23 */