X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fmips%2Fmm%2Fcache.c;h=e51ae38ddaf5eb49663e25116d41e7ad9dd6c015;hb=6a77f38946aaee1cd85eeec6cf4229b204c15071;hp=98ba863340caaf74d6be135de0e4a73bf837c7a5;hpb=87fc8d1bb10cd459024a742c6a10961fefcef18f;p=linux-2.6.git

diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index 98ba86334..e51ae38dd 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -45,10 +45,17 @@ EXPORT_SYMBOL(_dma_cache_inv);
 
 #endif /* CONFIG_DMA_NONCOHERENT */
 
-asmlinkage int sys_cacheflush(void *addr, int bytes, int cache)
+/*
+ * We could optimize the case where the cache argument is not BCACHE but
+ * that seems very atypical use ...
+ */
+asmlinkage int sys_cacheflush(unsigned long addr, unsigned long int bytes,
+	unsigned int cache)
 {
-	/* This should flush more selectivly ...  */
-	__flush_cache_all();
+	if (verify_area(VERIFY_WRITE, (void *) addr, bytes))
+		return -EFAULT;
+
+	flush_icache_range(addr, addr + bytes);
 
 	return 0;
 }