X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fmips%2Fmomentum%2Fjaguar_atx%2Fsetup.c;h=1379c76845dc6619436c064400f46226777130c1;hb=43bc926fffd92024b46cafaf7350d669ba9ca884;hp=30462e715066a469437b303775d1073230b1edc4;hpb=cee37fe97739d85991964371c1f3a745c00dd236;p=linux-2.6.git diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c index 30462e715..1379c7684 100644 --- a/arch/mips/momentum/jaguar_atx/setup.c +++ b/arch/mips/momentum/jaguar_atx/setup.c @@ -2,7 +2,7 @@ * BRIEF MODULE DESCRIPTION * Momentum Computer Jaguar-ATX board dependent boot routines * - * Copyright (C) 1996, 1997, 2001, 2004 Ralf Baechle (ralf@linux-mips.org) + * Copyright (C) 1996, 1997, 2001, 04, 06 Ralf Baechle (ralf@linux-mips.org) * Copyright (C) 2000 RidgeRun, Inc. * Copyright (C) 2001 Red Hat, Inc. * Copyright (C) 2002 Momentum Computer @@ -50,10 +50,13 @@ #include #include #include +#include #include #include #include #include +#include + #include #include #include @@ -63,7 +66,6 @@ #include #include #include -#include #include "jaguar_atx_fpga.h" @@ -105,7 +107,7 @@ void __init bus_error_init(void) { /* nothing */ } static __init void wire_stupidity_into_tlb(void) { -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT write_c0_wired(0); local_flush_tlb_all(); @@ -149,7 +151,9 @@ arch_initcall(per_cpu_mappings); unsigned long m48t37y_get_time(void) { unsigned int year, month, day, hour, min, sec; + unsigned long flags; + spin_lock_irqsave(&rtc_lock, flags); /* stop the update */ rtc_base[0x7ff8] = 0x40; @@ -166,6 +170,7 @@ unsigned long m48t37y_get_time(void) /* start the update */ rtc_base[0x7ff8] = 0x00; + spin_unlock_irqrestore(&rtc_lock, flags); return mktime(year, month, day, hour, min, sec); } @@ -173,11 +178,13 @@ unsigned long m48t37y_get_time(void) int m48t37y_set_time(unsigned long sec) { struct rtc_time tm; + unsigned long flags; /* convert to a more useful format -- note months count from 0 */ to_tm(sec, &tm); tm.tm_mon += 1; + spin_lock_irqsave(&rtc_lock, flags); /* enable writing */ rtc_base[0x7ff8] = 0x80; @@ -201,6 +208,7 @@ int m48t37y_set_time(unsigned long sec) /* disable writing */ rtc_base[0x7ff8] = 0x00; + spin_unlock_irqrestore(&rtc_lock, flags); return 0; } @@ -221,8 +229,8 @@ void momenco_time_init(void) mips_hpt_frequency = cpu_clock / 2; board_timer_setup = momenco_timer_setup; - rtc_get_time = m48t37y_get_time; - rtc_set_time = m48t37y_set_time; + rtc_mips_get_time = m48t37y_get_time; + rtc_mips_set_time = m48t37y_set_time; } static struct resource mv_pci_io_mem0_resource = { @@ -351,7 +359,7 @@ static __init int __init ja_pci_init(void) arch_initcall(ja_pci_init); -static int __init momenco_jaguar_atx_setup(void) +void __init plat_setup(void) { unsigned int tmpword; @@ -359,7 +367,7 @@ static int __init momenco_jaguar_atx_setup(void) _machine_restart = momenco_jaguar_restart; _machine_halt = momenco_jaguar_halt; - _machine_power_off = momenco_jaguar_power_off; + pm_power_off = momenco_jaguar_power_off; /* * initrd_start = (ulong)jaguar_initrd_start; @@ -373,24 +381,24 @@ static int __init momenco_jaguar_atx_setup(void) * shut down ethernet ports, just to be sure our memory doesn't get * corrupted by random ethernet traffic. */ - MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8); - MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8); - MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(2), 0xff << 8); - MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8); - MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8); - MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(2), 0xff << 8); - while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff); - while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff); - while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(2)) & 0xff); - while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff); - while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff); - while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(2)) & 0xff); - MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0), - MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1); - MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1), - MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1); - MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(2), - MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(2)) & ~1); + MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8); + MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8); + MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(2), 0xff << 8); + MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8); + MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8); + MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(2), 0xff << 8); + while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff); + while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff); + while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(2)) & 0xff); + while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff); + while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff); + while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(2)) & 0xff); + MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0), + MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1); + MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1), + MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1); + MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(2), + MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(2)) & ~1); /* Turn off the Bit-Error LED */ JAGUAR_FPGA_WRITE(0x80, CLR); @@ -451,9 +459,9 @@ static int __init momenco_jaguar_atx_setup(void) #ifdef GEMDEBUG_TRACEBUFFER { unsigned int tbControl; - tbControl = + tbControl = 0 << 26 | /* post trigger delay 0 */ - 0x2 << 16 | /* sequential trace mode */ + 0x2 << 16 | /* sequential trace mode */ // 0x0 << 16 | /* non-sequential trace mode */ // 0xf << 4 | /* watchpoints disabled */ 2 << 2 | /* armed */ @@ -467,8 +475,4 @@ static int __init momenco_jaguar_atx_setup(void) } #endif - - return 0; } - -early_initcall(momenco_jaguar_atx_setup);