X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fmips%2Fmomentum%2Focelot_3%2Firq.c;h=cea0e5deb80e78a38d95786f3b6a75e831715935;hb=97bf2856c6014879bd04983a3e9dfcdac1e7fe85;hp=42464dbd4ad24d50fe07bab2dacda8ca0150fc0c;hpb=76828883507a47dae78837ab5dec5a5b4513c667;p=linux-2.6.git

diff --git a/arch/mips/momentum/ocelot_3/irq.c b/arch/mips/momentum/ocelot_3/irq.c
index 42464dbd4..cea0e5deb 100644
--- a/arch/mips/momentum/ocelot_3/irq.c
+++ b/arch/mips/momentum/ocelot_3/irq.c
@@ -53,10 +53,8 @@
 #include <asm/mipsregs.h>
 #include <asm/system.h>
 
-extern asmlinkage void ocelot3_handle_int(void);
-
 static struct irqaction cascade_mv64340 = {
-	no_action, SA_INTERRUPT, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL
+	no_action, IRQF_DISABLED, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL
 };
 
 void __init arch_init_irq(void)
@@ -67,9 +65,6 @@ void __init arch_init_irq(void)
 	 */
 	clear_c0_status(ST0_IM | ST0_BEV);
 
-	/* Sets the first-level interrupt dispatcher. */
-	set_except_vector(0, ocelot3_handle_int);
-	mips_cpu_irq_init(0);
 	rm7k_cpu_irq_init(8);
 
 	/* set up the cascading interrupts */
@@ -79,3 +74,36 @@ void __init arch_init_irq(void)
 	set_c0_status(ST0_IM); /* IE in the status register */
 
 }
+
+asmlinkage void plat_irq_dispatch(void)
+{
+	unsigned int pending = read_c0_cause() & read_c0_status();
+
+	if (pending & STATUSF_IP0)
+		do_IRQ(0);
+	else if (pending & STATUSF_IP1)
+		do_IRQ(1);
+	else if (pending & STATUSF_IP2)
+		do_IRQ(2);
+	else if (pending & STATUSF_IP3)
+		do_IRQ(3);
+	else if (pending & STATUSF_IP4)
+		do_IRQ(4);
+	else if (pending & STATUSF_IP5)
+		do_IRQ(5);
+	else if (pending & STATUSF_IP6)
+		do_IRQ(6);
+	else if (pending & STATUSF_IP7)
+		do_IRQ(7);
+	else {
+		/*
+		 * Now look at the extended interrupts
+		 */
+		pending = (read_c0_cause() & (read_c0_intcontrol() << 8)) >> 16;
+
+		if (pending & STATUSF_IP8)
+			ll_mv64340_irq();
+		else
+			spurious_interrupt();
+	}
+}