X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fmips%2Fpmc-sierra%2Fyosemite%2Fi2c-yosemite.h;h=31c5523276fa7a8d13eac9b0b8c1e12a9216b9fa;hb=9bf4aaab3e101692164d49b7ca357651eb691cb6;hp=8b6e49c638d7f44026498b698634d3bd3bccae94;hpb=db216c3d5e4c040e557a50f8f5d35d5c415e8c1c;p=linux-2.6.git

diff --git a/arch/mips/pmc-sierra/yosemite/i2c-yosemite.h b/arch/mips/pmc-sierra/yosemite/i2c-yosemite.h
index 8b6e49c63..31c552327 100644
--- a/arch/mips/pmc-sierra/yosemite/i2c-yosemite.h
+++ b/arch/mips/pmc-sierra/yosemite/i2c-yosemite.h
@@ -31,7 +31,7 @@
 /* Read and Write operations to the chip */
 
 #define TITAN_I2C_BASE			0xbb000000	/* XXX Needs to change */
-	
+
 #define	TITAN_I2C_WRITE(offset, data)	\
 					*(volatile unsigned long *)(TITAN_I2C_BASE + offset) = data
 
@@ -48,14 +48,14 @@
 #define TITAN_I2C_MAX_POLL		100
 
 /* Registers used for I2C work */
-#define TITAN_I2C_SCMB_CONTROL		0x0180  /* SCMB Control */
-#define TITAN_I2C_SCMB_CLOCK_A		0x0184  /* SCMB Clock A */
-#define TITAN_I2C_SCMB_CLOCK_B		0x0188  /* SCMB Clock B */
-#define	TITAN_I2C_CONFIG		0x01A0  /* I2C Config */
-#define TITAN_I2C_COMMAND		0x01A4  /* I2C Command */
+#define TITAN_I2C_SCMB_CONTROL		0x0180	/* SCMB Control */
+#define TITAN_I2C_SCMB_CLOCK_A		0x0184	/* SCMB Clock A */
+#define TITAN_I2C_SCMB_CLOCK_B		0x0188	/* SCMB Clock B */
+#define	TITAN_I2C_CONFIG		0x01A0	/* I2C Config */
+#define TITAN_I2C_COMMAND		0x01A4	/* I2C Command */
 #define	TITAN_I2C_SLAVE_ADDRESS		0x01A8	/* I2C Slave Address */
-#define TITAN_I2C_DATA			0x01AC  /* I2C Data [15:0] */
-#define TITAN_I2C_INTERRUPTS		0x01BC  /* I2C Interrupts */
+#define TITAN_I2C_DATA			0x01AC	/* I2C Data [15:0] */
+#define TITAN_I2C_INTERRUPTS		0x01BC	/* I2C Interrupts */
 
 /* Error */
 #define	TITAN_I2C_ERR_ARB_LOST		(-9220)
@@ -66,31 +66,31 @@
 
 /* I2C Command Type */
 typedef enum {
-	TITAN_I2C_CMD_WRITE		= 0,
-	TITAN_I2C_CMD_READ		= 1,
-	TITAN_I2C_CMD_READ_WRITE	= 2
+	TITAN_I2C_CMD_WRITE = 0,
+	TITAN_I2C_CMD_READ = 1,
+	TITAN_I2C_CMD_READ_WRITE = 2
 } titan_i2c_cmd_type;
 
 /* I2C structures */
 typedef struct {
-	int	filtera; 		/* Register 0x0184, bits 15 - 12*/
-	int	clka;			/* Register 0x0184, bits 9 - 0 */
-	int	filterb;		/* Register 0x0188, bits 15 - 12 */
-	int	clkb;			/* Register 0x0188, bits 9 - 0 */
+	int filtera;		/* Register 0x0184, bits 15 - 12 */
+	int clka;		/* Register 0x0184, bits 9 - 0 */
+	int filterb;		/* Register 0x0188, bits 15 - 12 */
+	int clkb;		/* Register 0x0188, bits 9 - 0 */
 } titan_i2c_config;
 
 /* I2C command type */
 typedef struct {
-	titan_i2c_cmd_type	type;		/* Type of command */
-	int			num_arb;	/* Register 0x01a0, bits 15 - 12 */
-	int			num_nak;	/* Register 0x01a0, bits 11 - 8 */
-	int			addr_size;	/* Register 0x01a0, bit 7 */
-	int			mst_code;	/* Register 0x01a0, bits 6 - 4 */
-	int			arb_en;		/* Register 0x01a0, bit 1 */
-	int			speed;		/* Register 0x01a0, bit 0 */
-	int			slave_addr;	/* Register 0x01a8 */
-	int			write_size;	/* Register 0x01a4, bits 10 - 8 */
-	unsigned int		*data;		/* Register 0x01ac */
+	titan_i2c_cmd_type type;	/* Type of command */
+	int num_arb;		/* Register 0x01a0, bits 15 - 12 */
+	int num_nak;		/* Register 0x01a0, bits 11 - 8 */
+	int addr_size;		/* Register 0x01a0, bit 7 */
+	int mst_code;		/* Register 0x01a0, bits 6 - 4 */
+	int arb_en;		/* Register 0x01a0, bit 1 */
+	int speed;		/* Register 0x01a0, bit 0 */
+	int slave_addr;		/* Register 0x01a8 */
+	int write_size;		/* Register 0x01a4, bits 10 - 8 */
+	unsigned int *data;	/* Register 0x01ac */
 } titan_i2c_command;
 
-#endif /* __I2C_YOSEMITE_H */ 
+#endif				/* __I2C_YOSEMITE_H */