X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fmips%2Fsgi-ip32%2Fip32-setup.c;h=a2dd8ae1ea8f10f2f7bf5d7c77055b277b3120bd;hb=9464c7cf61b9433057924c36e6e02f303a00e768;hp=51cad2d843f2ef86b3c3ee7f4e003214022c0613;hpb=daddc0d38b3571bed170afa273a49a0eba090c1e;p=linux-2.6.git diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c index 51cad2d84..a2dd8ae1e 100644 --- a/arch/mips/sgi-ip32/ip32-setup.c +++ b/arch/mips/sgi-ip32/ip32-setup.c @@ -6,7 +6,7 @@ * for more details. * * Copyright (C) 2000 Harald Koerfgen - * Copyright (C) 2002, 03 Ilya A. Volynets + * Copyright (C) 2002, 2003, 2005 Ilya A. Volynets */ #include #include @@ -66,11 +66,6 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str) #include #include #include -extern int early_serial_setup(struct uart_port *port); - -#define STD_COM_FLAGS (ASYNC_SKIP_TEST) -#define BASE_BAUD (1843200 / 16) - #endif /* CONFIG_SERIAL_8250 */ /* An arbitrary time; this can be decreased if reliability looks good */ @@ -80,8 +75,8 @@ void __init ip32_time_init(void) { printk(KERN_INFO "Calibrating system timer... "); write_c0_count(0); - crime_write(0, CRIME_TIMER); - while (crime_read(CRIME_TIMER) < CRIME_MASTER_FREQ * WAIT_MS / 1000) ; + crime->timer = 0; + while (crime->timer < CRIME_MASTER_FREQ * WAIT_MS / 1000) ; mips_hpt_frequency = read_c0_count() * 1000 / WAIT_MS; printk("%d MHz CPU detected\n", mips_hpt_frequency * 2 / 1000000); } @@ -92,30 +87,26 @@ void __init ip32_timer_setup(struct irqaction *irq) setup_irq(IP32_R4K_TIMER_IRQ, irq); } -static int __init ip32_setup(void) +void __init plat_setup(void) { - set_io_port_base((unsigned long) ioremap(MACEPCI_LOW_IO, 0x2000000)); - - crime_init(); - board_be_init = ip32_be_init; - rtc_get_time = mc146818_get_cmos_time; - rtc_set_mmss = mc146818_set_rtc_mmss; + rtc_mips_get_time = mc146818_get_cmos_time; + rtc_mips_set_mmss = mc146818_set_rtc_mmss; board_time_init = ip32_time_init; board_timer_setup = ip32_timer_setup; #ifdef CONFIG_SERIAL_8250 - { + { static struct uart_port o2_serial[2]; memset(o2_serial, 0, sizeof(o2_serial)); o2_serial[0].type = PORT_16550A; o2_serial[0].line = 0; o2_serial[0].irq = MACEISA_SERIAL1_IRQ; - o2_serial[0].flags = STD_COM_FLAGS | UPF_RESOURCES; - o2_serial[0].uartclk = BASE_BAUD * 16; + o2_serial[0].flags = UPF_SKIP_TEST; + o2_serial[0].uartclk = 1843200; o2_serial[0].iotype = UPIO_MEM; o2_serial[0].membase = (char *)&mace->isa.serial1; o2_serial[0].fifosize = 14; @@ -125,8 +116,8 @@ static int __init ip32_setup(void) o2_serial[1].type = PORT_16550A; o2_serial[1].line = 1; o2_serial[1].irq = MACEISA_SERIAL2_IRQ; - o2_serial[1].flags = STD_COM_FLAGS | UPF_RESOURCES; - o2_serial[1].uartclk = BASE_BAUD * 16; + o2_serial[1].flags = UPF_SKIP_TEST; + o2_serial[1].uartclk = 1843200; o2_serial[1].iotype = UPIO_MEM; o2_serial[1].membase = (char *)&mace->isa.serial2; o2_serial[1].fifosize = 14; @@ -156,8 +147,4 @@ static int __init ip32_setup(void) } } #endif - - return 0; } - -early_initcall(ip32_setup);