X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fmips%2Fsni%2Firq.c;h=952038aa4b90d7c0a5d8ad6a96bcf233ddb6cd85;hb=987b0145d94eecf292d8b301228356f44611ab7c;hp=7365b4853ddb212a0d6073d49d60460838819f1f;hpb=f7ed79d23a47594e7834d66a8f14449796d4f3e6;p=linux-2.6.git diff --git a/arch/mips/sni/irq.c b/arch/mips/sni/irq.c index 7365b4853..952038aa4 100644 --- a/arch/mips/sni/irq.c +++ b/arch/mips/sni/irq.c @@ -19,6 +19,8 @@ DEFINE_SPINLOCK(pciasic_lock); +extern asmlinkage void sni_rm200_pci_handle_int(void); + static void enable_pciasic_irq(unsigned int irq) { unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2); @@ -69,20 +71,20 @@ static struct hw_interrupt_type pciasic_irq_type = { * hwint0 should deal with MP agent, ASIC PCI, EISA NMI and debug * button interrupts. Later ... */ -static void pciasic_hwint0(struct pt_regs *regs) +void pciasic_hwint0(struct pt_regs *regs) { panic("Received int0 but no handler yet ..."); } /* This interrupt was used for the com1 console on the first prototypes. */ -static void pciasic_hwint2(struct pt_regs *regs) +void pciasic_hwint2(struct pt_regs *regs) { /* I think this shouldn't happen on production machines. */ panic("hwint2 and no handler yet"); } /* hwint5 is the r4k count / compare interrupt */ -static void pciasic_hwint5(struct pt_regs *regs) +void pciasic_hwint5(struct pt_regs *regs) { panic("hwint5 and no handler yet"); } @@ -103,7 +105,7 @@ static unsigned int ls1bit8(unsigned int x) * * The EISA_INT bit in CSITPEND is high active, all others are low active. */ -static void pciasic_hwint1(struct pt_regs *regs) +void pciasic_hwint1(struct pt_regs *regs) { u8 pend = *(volatile char *)PCIMT_CSITPEND; unsigned long flags; @@ -133,7 +135,7 @@ static void pciasic_hwint1(struct pt_regs *regs) /* * hwint 3 should deal with the PCI A - D interrupts, */ -static void pciasic_hwint3(struct pt_regs *regs) +void pciasic_hwint3(struct pt_regs *regs) { u8 pend = *(volatile char *)PCIMT_CSITPEND; int irq; @@ -148,34 +150,13 @@ static void pciasic_hwint3(struct pt_regs *regs) /* * hwint 4 is used for only the onboard PCnet 32. */ -static void pciasic_hwint4(struct pt_regs *regs) +void pciasic_hwint4(struct pt_regs *regs) { clear_c0_status(IE_IRQ4); do_IRQ(PCIMT_IRQ_ETHERNET, regs); set_c0_status(IE_IRQ4); } -asmlinkage void plat_irq_dispatch(struct pt_regs *regs) -{ - unsigned int pending = read_c0_status() & read_c0_cause(); - static unsigned char led_cache; - - *(volatile unsigned char *) PCIMT_CSLED = ++led_cache; - - if (pending & 0x0800) - pciasic_hwint1(regs); - else if (pending & 0x4000) - pciasic_hwint4(regs); - else if (pending & 0x2000) - pciasic_hwint3(regs); - else if (pending & 0x1000) - pciasic_hwint2(regs); - else if (pending & 0x8000) - pciasic_hwint5(regs); - else if (pending & 0x0400) - pciasic_hwint0(regs); -} - void __init init_pciasic(void) { unsigned long flags; @@ -195,6 +176,8 @@ void __init arch_init_irq(void) { int i; + set_except_vector(0, sni_rm200_pci_handle_int); + init_i8259_irqs(); /* Integrated i8259 */ init_pciasic();