X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fmips%2Fvr41xx%2Fcommon%2Fbcu.c;h=ff272b2e8395693154c579199fad36a409b243a5;hb=43bc926fffd92024b46cafaf7350d669ba9ca884;hp=3613999a189a7f9c4abdfb87765c00af4a4b9e14;hpb=9bf4aaab3e101692164d49b7ca357651eb691cb6;p=linux-2.6.git diff --git a/arch/mips/vr41xx/common/bcu.c b/arch/mips/vr41xx/common/bcu.c index 3613999a1..ff272b2e8 100644 --- a/arch/mips/vr41xx/common/bcu.c +++ b/arch/mips/vr41xx/common/bcu.c @@ -3,7 +3,7 @@ * * Copyright (C) 2002 MontaVista Software Inc. * Author: Yoichi Yuasa - * Copyright (C) 2003-2004 Yoichi Yuasa + * Copyright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -25,22 +25,19 @@ * - New creation, NEC VR4122 and VR4131 are supported. * - Added support for NEC VR4111 and VR4121. * - * Yoichi Yuasa + * Yoichi Yuasa * - Added support for NEC VR4133. */ -#include -#include +#include +#include #include #include #include #include -#define IO_MEM_RESOURCE_START 0UL -#define IO_MEM_RESOURCE_END 0x1fffffffUL - -#define CLKSPEEDREG_TYPE1 KSEG1ADDR(0x0b000014) -#define CLKSPEEDREG_TYPE2 KSEG1ADDR(0x0f000014) +#define CLKSPEEDREG_TYPE1 (void __iomem *)KSEG1ADDR(0x0b000014) +#define CLKSPEEDREG_TYPE2 (void __iomem *)KSEG1ADDR(0x0f000014) #define CLKSP(x) ((x) & 0x001f) #define CLKSP_VR4133(x) ((x) & 0x0007) @@ -62,11 +59,15 @@ unsigned long vr41xx_get_vtclock_frequency(void) return vr41xx_vtclock; } +EXPORT_SYMBOL_GPL(vr41xx_get_vtclock_frequency); + unsigned long vr41xx_get_tclock_frequency(void) { return vr41xx_tclock; } +EXPORT_SYMBOL_GPL(vr41xx_get_tclock_frequency); + static inline uint16_t read_clkspeed(void) { switch (current_cpu_data.cputype) { @@ -182,11 +183,11 @@ static inline unsigned long calculate_tclock(uint16_t clkspeed, unsigned long pc switch (current_cpu_data.cputype) { case CPU_VR4111: if (!(clkspeed & DIV2B)) - tclock = pclock / 2; + tclock = pclock / 2; else if (!(clkspeed & DIV3B)) - tclock = pclock / 3; + tclock = pclock / 3; else if (!(clkspeed & DIV4B)) - tclock = pclock / 4; + tclock = pclock / 4; break; case CPU_VR4121: tclock = pclock / DIVT(clkspeed); @@ -206,7 +207,7 @@ static inline unsigned long calculate_tclock(uint16_t clkspeed, unsigned long pc return tclock; } -static int __init vr41xx_bcu_init(void) +void vr41xx_calculate_clock_frequency(void) { unsigned long pclock; uint16_t clkspeed; @@ -216,11 +217,6 @@ static int __init vr41xx_bcu_init(void) pclock = calculate_pclock(clkspeed); vr41xx_vtclock = calculate_vtclock(clkspeed, pclock); vr41xx_tclock = calculate_tclock(clkspeed, pclock, vr41xx_vtclock); - - iomem_resource.start = IO_MEM_RESOURCE_START; - iomem_resource.end = IO_MEM_RESOURCE_END; - - return 0; } -early_initcall(vr41xx_bcu_init); +EXPORT_SYMBOL_GPL(vr41xx_calculate_clock_frequency);