X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fparisc%2Fkernel%2Fhead.S;h=eaad2328fea14669fdd00dce7f45df8c8a9ef0d3;hb=refs%2Fheads%2Fvserver;hp=1fb4c05c3553f397046914cf88e89306d199cddb;hpb=6a77f38946aaee1cd85eeec6cf4229b204c15071;p=linux-2.6.git diff --git a/arch/parisc/kernel/head.S b/arch/parisc/kernel/head.S index 1fb4c05c3..eaad2328f 100644 --- a/arch/parisc/kernel/head.S +++ b/arch/parisc/kernel/head.S @@ -12,9 +12,7 @@ * Initial Version 04-23-1999 by Helge Deller */ -#include /* for CONFIG_SMP */ - -#include +#include #include #include @@ -36,10 +34,10 @@ boot_args: .align 4 .import init_thread_union,data .import fault_vector_20,code /* IVA parisc 2.0 32 bit */ -#ifndef __LP64__ +#ifndef CONFIG_64BIT .import fault_vector_11,code /* IVA parisc 1.1 32 bit */ .import $global$ /* forward declaration */ -#endif /*!LP64*/ +#endif /*!CONFIG_64BIT*/ .export stext .export _stext,data /* Kernel want it this way! */ _stext: @@ -71,54 +69,50 @@ $bss_loop: stw,ma %arg2,4(%r1) stw,ma %arg3,4(%r1) - /* Initialize startup VM. Just map first 8 MB of memory */ - load32 PA(pg0),%r1 - -#ifdef __LP64__ - load32 PA(pmd0),%r5 - shrd %r5,PxD_VALUE_SHIFT,%r3 -#else - shr %r1,PxD_VALUE_SHIFT,%r3 -#endif - ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3 - + /* Initialize startup VM. Just map first 8/16 MB of memory */ load32 PA(swapper_pg_dir),%r4 mtctl %r4,%cr24 /* Initialize kernel root pointer */ mtctl %r4,%cr25 /* Initialize user root pointer */ -#ifdef __LP64__ - stw %r3,ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4) - shrd %r1,PxD_VALUE_SHIFT,%r3 +#if PT_NLEVELS == 3 + /* Set pmd in pgd */ + load32 PA(pmd0),%r5 + shrd %r5,PxD_VALUE_SHIFT,%r3 ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3 - ldo ASM_PMD_ENTRY*ASM_PMD_ENTRY_SIZE(%r5),%r5 + stw %r3,ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4) + ldo ASM_PMD_ENTRY*ASM_PMD_ENTRY_SIZE(%r5),%r4 #else - ldo ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4),%r4 + /* 2-level page table, so pmd == pgd */ + ldo ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4),%r4 #endif + + /* Fill in pmd with enough pte directories */ + load32 PA(pg0),%r1 + SHRREG %r1,PxD_VALUE_SHIFT,%r3 + ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3 + ldi ASM_PT_INITIAL,%r1 1: -#ifdef __LP64__ - stw %r3,0(%r5) -#else - stw %r3,0(%r4) -#endif - + stw %r3,0(%r4) ldo (ASM_PAGE_SIZE >> PxD_VALUE_SHIFT)(%r3),%r3 addib,> -1,%r1,1b - -#ifdef __LP64__ - ldo ASM_PMD_ENTRY_SIZE(%r5),%r5 +#if PT_NLEVELS == 3 + ldo ASM_PMD_ENTRY_SIZE(%r4),%r4 #else - ldo ASM_PGD_ENTRY_SIZE(%r4),%r4 + ldo ASM_PGD_ENTRY_SIZE(%r4),%r4 #endif - ldo _PAGE_KERNEL(%r0),%r3 /* Hardwired 0 phys addr start */ + + /* Now initialize the PTEs themselves */ + ldo 0+_PAGE_KERNEL(%r0),%r3 /* Hardwired 0 phys addr start */ + ldi (1<<(KERNEL_INITIAL_ORDER-PAGE_SHIFT)),%r11 /* PFN count */ load32 PA(pg0),%r1 $pgt_fill_loop: STREGM %r3,ASM_PTE_ENTRY_SIZE(%r1) - ldo ASM_PAGE_SIZE(%r3),%r3 - bb,>= %r3,31-KERNEL_INITIAL_ORDER,$pgt_fill_loop + ldo (1< -1,%r11,$pgt_fill_loop nop /* Load the return address...er...crash 'n burn */ @@ -175,7 +169,7 @@ common_stext: stw %r0,0x28(%r0) /* MEM_RENDEZ_HI */ #endif /*CONFIG_SMP*/ -#ifdef __LP64__ +#ifdef CONFIG_64BIT tophys_r1 %sp /* Save the rfi target address */ @@ -229,8 +223,6 @@ stext_pdc_ret: mtctl %r0,%cr12 mtctl %r0,%cr13 - /* Prepare to RFI! Man all the cannons! */ - /* Initialize the global data pointer */ loadgp @@ -240,7 +232,7 @@ stext_pdc_ret: * following short sequence of instructions can determine this * (without being illegal on a PA1.1 machine). */ -#ifndef __LP64__ +#ifndef CONFIG_64BIT ldi 32,%r10 mtctl %r10,%cr11 .level 2.0 @@ -253,52 +245,22 @@ stext_pdc_ret: $is_pa20: .level LEVEL /* restore 1.1 || 2.0w */ -#endif /*!LP64*/ +#endif /*!CONFIG_64BIT*/ load32 PA(fault_vector_20),%r10 $install_iva: mtctl %r10,%cr14 -#ifdef __LP64__ - b aligned_rfi + b aligned_rfi /* Prepare to RFI! Man all the cannons! */ nop - .align 256 + .align 128 aligned_rfi: - ssm 0,0 - nop /* 1 */ - nop /* 2 */ - nop /* 3 */ - nop /* 4 */ - nop /* 5 */ - nop /* 6 */ - nop /* 7 */ - nop /* 8 */ -#endif - -#ifdef __LP64__ /* move to psw.h? */ -#define PSW_BITS PSW_Q+PSW_I+PSW_D+PSW_P+PSW_R -#else -#define PSW_BITS PSW_SM_Q -#endif + pcxt_ssm_bug -$rfi: - /* turn off troublesome PSW bits */ - rsm PSW_BITS,%r0 + rsm PSW_SM_QUIET,%r0 /* off troublesome PSW bits */ + /* Don't need NOPs, have 8 compliant insn before rfi */ - /* kernel PSW: - * - no interruptions except HPMC and TOC (which are handled by PDC) - * - Q bit set (IODC / PDC interruptions) - * - big-endian - * - virtually mapped - */ - load32 KERNEL_PSW,%r10 - mtctl %r10,%ipsw - - /* Set the space pointers for the post-RFI world - ** Clear the two-level IIA Space Queue, effectively setting - ** Kernel space. - */ mtctl %r0,%cr17 /* Clear IIASQ tail */ mtctl %r0,%cr17 /* Clear IIASQ head */ @@ -307,7 +269,10 @@ $rfi: ldo 4(%r11),%r11 mtctl %r11,%cr18 /* IIAOQ tail */ - /* Jump to hyperspace */ + load32 KERNEL_PSW,%r10 + mtctl %r10,%ipsw + + /* Jump through hyperspace to Virt Mode */ rfi nop @@ -318,7 +283,7 @@ $rfi: .import smp_init_current_idle_task,data .import smp_callin,code -#ifndef __LP64__ +#ifndef CONFIG_64BIT smp_callin_rtn: .proc .callinfo @@ -326,7 +291,7 @@ smp_callin_rtn: nop nop .procend -#endif /*!LP64*/ +#endif /*!CONFIG_64BIT*/ /*************************************************************************** * smp_slave_stext is executed by all non-monarch Processors when the Monarch @@ -361,7 +326,7 @@ smp_slave_stext: mtctl %r4,%cr24 /* Initialize kernel root pointer */ mtctl %r4,%cr25 /* Initialize user root pointer */ -#ifdef __LP64__ +#ifdef CONFIG_64BIT /* Setup PDCE_PROC entry */ copy %arg0,%r3 #else @@ -378,7 +343,7 @@ smp_slave_stext: .procend #endif /* CONFIG_SMP */ -#ifndef __LP64__ +#ifndef CONFIG_64BIT .data .align 4 @@ -388,4 +353,4 @@ smp_slave_stext: .size $global$,4 $global$: .word 0 -#endif /*!LP64*/ +#endif /*!CONFIG_64BIT*/