X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fppc%2Fkernel%2Fhead_booke.h;h=6f54039c88737447a690b0a408275fde82211c55;hb=6f71f83334a552167ccbbd42fe5dd979428c89e4;hp=0c655c116604d2b7e166af9a2bc01909ca54ab6a;hpb=8d40237c730b8be87c1b80a5d96b9c603fefa829;p=linux-2.6.git

diff --git a/arch/ppc/kernel/head_booke.h b/arch/ppc/kernel/head_booke.h
index 0c655c116..6f54039c8 100644
--- a/arch/ppc/kernel/head_booke.h
+++ b/arch/ppc/kernel/head_booke.h
@@ -237,70 +237,4 @@ label:
 			  ret_from_except)
 
 
-/* Check for a single step debug exception while in an exception
- * handler before state has been saved.  This is to catch the case
- * where an instruction that we are trying to single step causes
- * an exception (eg ITLB/DTLB miss) and thus the first instruction of
- * the exception handler generates a single step debug exception.
- *
- * If we get a debug trap on the first instruction of an exception handler,
- * we reset the MSR_DE in the _exception handler's_ MSR (the debug trap is
- * a critical exception, so we are using SPRN_CSRR1 to manipulate the MSR).
- * The exception handler was handling a non-critical interrupt, so it will
- * save (and later restore) the MSR via SPRN_CSRR1, which will still have
- * the MSR_DE bit set.
- */
-#define DEBUG_EXCEPTION							      \
-	START_EXCEPTION(Debug);						      \
-	CRITICAL_EXCEPTION_PROLOG;					      \
-									      \
-	/*								      \
-	 * If there is a single step or branch-taken exception in an	      \
-	 * exception entry sequence, it was probably meant to apply to	      \
-	 * the code where the exception occurred (since exception entry	      \
-	 * doesn't turn off DE automatically).  We simulate the effect	      \
-	 * of turning off DE on entry to an exception handler by turning      \
-	 * off DE in the CSRR1 value and clearing the debug status.	      \
-	 */								      \
-	mfspr	r10,SPRN_DBSR;		/* check single-step/branch taken */  \
-	andis.	r10,r10,DBSR_IC@h;					      \
-	beq+	2f;							      \
-									      \
-	lis	r10,KERNELBASE@h;	/* check if exception in vectors */   \
-	ori	r10,r10,KERNELBASE@l;					      \
-	cmplw	r12,r10;						      \
-	blt+	2f;			/* addr below exception vectors */    \
-									      \
-	lis	r10,Debug@h;						      \
-	ori	r10,r10,Debug@l;					      \
-	cmplw	r12,r10;						      \
-	bgt+	2f;			/* addr above exception vectors */    \
-									      \
-	/* here it looks like we got an inappropriate debug exception. */     \
-1:	rlwinm	r9,r9,0,~MSR_DE;	/* clear DE in the CSRR1 value */     \
-	lis	r10,DBSR_IC@h;		/* clear the IC event */	      \
-	mtspr	SPRN_DBSR,r10;						      \
-	/* restore state and get out */					      \
-	lwz	r10,_CCR(r11);						      \
-	lwz	r0,GPR0(r11);						      \
-	lwz	r1,GPR1(r11);						      \
-	mtcrf	0x80,r10;						      \
-	mtspr	CSRR0,r12;						      \
-	mtspr	CSRR1,r9;						      \
-	lwz	r9,GPR9(r11);						      \
-	lwz	r12,GPR12(r11);						      \
-	mtspr	SPRG2,r8;		/* SPRG2 only used in criticals */    \
-	lis	r8,crit_save@ha;					      \
-	lwz	r10,crit_r10@l(r8);					      \
-	lwz	r11,crit_r11@l(r8);					      \
-	mfspr	r8,SPRG2;						      \
-									      \
-	rfci;								      \
-	b	.;							      \
-									      \
-	/* continue normal handling for a critical exception... */	      \
-2:	mfspr	r4,SPRN_DBSR;						      \
-	addi	r3,r1,STACK_FRAME_OVERHEAD;				      \
-	EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, crit_transfer_to_handler, ret_from_crit_exc)
-
 #endif /* __HEAD_BOOKE_H__ */