X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fppc%2Fmm%2F44x_mmu.c;h=1d79838d90acbd2db532cf0036a0b10f30b6ce67;hb=9bf4aaab3e101692164d49b7ca357651eb691cb6;hp=b970dd51dd95a3d1e33d141e7703354906552a92;hpb=db216c3d5e4c040e557a50f8f5d35d5c415e8c1c;p=linux-2.6.git

diff --git a/arch/ppc/mm/44x_mmu.c b/arch/ppc/mm/44x_mmu.c
index b970dd51d..1d79838d9 100644
--- a/arch/ppc/mm/44x_mmu.c
+++ b/arch/ppc/mm/44x_mmu.c
@@ -93,10 +93,14 @@ ppc44x_pin_tlb(int slot, unsigned int virt, unsigned int phys)
 }
 
 /*
- * Configure PPC44x TLB for AS0 exception processing.
+ * MMU_init_hw does the chip-specific initialization of the MMU hardware.
  */
-static void __init
-ppc44x_tlb_config(void)
+void __init MMU_init_hw(void)
+{
+	flush_instruction_cache();
+}
+
+unsigned long __init mmu_mapin_ram(void)
 {
 	unsigned int pinned_tlbs = 1;
 	int i;
@@ -124,39 +128,6 @@ ppc44x_tlb_config(void)
 			unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC44x_PIN_SIZE;
 			ppc44x_pin_tlb(i, phys_addr+PAGE_OFFSET, phys_addr);
 		}
-}
-
-/*
- * MMU_init_hw does the chip-specific initialization of the MMU hardware.
- */
-void __init MMU_init_hw(void)
-{
-	flush_instruction_cache();
-
-	ppc44x_tlb_config();
-}
-
-/* TODO: Add large page lowmem mapping support */
-unsigned long __init mmu_mapin_ram(void)
-{
-	unsigned long v, s, f = _PAGE_GUARDED;
-	phys_addr_t p;
-
-	v = KERNELBASE;
-	p = PPC_MEMSTART;
-
-	for (s = 0; s < total_lowmem; s += PAGE_SIZE) {
-		if ((char *) v >= _stext && (char *) v < etext)
-			f |= _PAGE_RAM_TEXT;
-		else
-			f |= _PAGE_RAM;
-		map_page(v, p, f);
-		v += PAGE_SIZE;
-		p += PAGE_SIZE;
-	}
-
-	if (ppc_md.progress)
-		ppc_md.progress("MMU:mmu_mapin_ram done", 0x401);
 
-	return s;
+	return total_lowmem;
 }