X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fppc%2Fplatforms%2F83xx%2Fmpc834x_sys.c;h=3397f0de1592da081f70bda02826cb9665816e16;hb=16c70f8c1b54b61c3b951b6fb220df250fe09b32;hp=e6348b5a1ddc6a56e81908fbd8a8e8434f471e44;hpb=4b659086703c3cfdabfc916b517590ad55d1ddfa;p=linux-2.6.git diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.c b/arch/ppc/platforms/83xx/mpc834x_sys.c index e6348b5a1..3397f0de1 100644 --- a/arch/ppc/platforms/83xx/mpc834x_sys.c +++ b/arch/ppc/platforms/83xx/mpc834x_sys.c @@ -1,9 +1,7 @@ /* - * arch/ppc/platforms/83xx/mpc834x_sys.c - * * MPC834x SYS board specific routines * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2005 Freescale Semiconductor Inc. * @@ -13,7 +11,6 @@ * option) any later version. */ -#include #include #include #include @@ -24,7 +21,6 @@ #include #include #include -#include #include #include #include @@ -41,7 +37,6 @@ #include #include #include -#include #include #include #include @@ -63,9 +58,36 @@ extern unsigned long total_memory; /* in mm/init */ unsigned char __res[sizeof (bd_t)]; #ifdef CONFIG_PCI -#error "PCI is not supported" -/* NEED mpc83xx_map_irq & mpc83xx_exclude_device - see platforms/85xx/mpc85xx_ads_common.c */ +int +mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) +{ + static char pci_irq_table[][4] = + /* + * PCI IDSEL/INTPIN->INTLINE + * A B C D + */ + { + {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x11 */ + {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x12 */ + {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x13 */ + {0, 0, 0, 0}, + {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x15 */ + {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x16 */ + {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x17 */ + {PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x18 */ + {0, 0, 0, 0}, /* idsel 0x19 */ + {0, 0, 0, 0}, /* idsel 0x20 */ + }; + + const long min_idsel = 0x11, max_idsel = 0x20, irqs_per_slot = 4; + return PCI_IRQ_TABLE_LOOKUP; +} + +int +mpc83xx_exclude_device(u_char bus, u_char devfn) +{ + return PCIBIOS_SUCCESSFUL; +} #endif /* CONFIG_PCI */ /* ************************************************************************ @@ -79,6 +101,7 @@ mpc834x_sys_setup_arch(void) bd_t *binfo = (bd_t *) __res; unsigned int freq; struct gianfar_platform_data *pdata; + struct gianfar_mdio_data *mdata; /* get the core frequency */ freq = binfo->bi_intfreq; @@ -89,26 +112,34 @@ mpc834x_sys_setup_arch(void) #ifdef CONFIG_PCI /* setup PCI host bridges */ - mpc83xx_sys_setup_hose(); + mpc83xx_setup_hose(); #endif mpc83xx_early_serial_map(); + /* setup the board related info for the MDIO bus */ + mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC83xx_MDIO); + + mdata->irq[0] = MPC83xx_IRQ_EXT1; + mdata->irq[1] = MPC83xx_IRQ_EXT2; + mdata->irq[2] = -1; + mdata->irq[31] = -1; + /* setup the board related information for the enet controllers */ pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1); - pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; - pdata->interruptPHY = MPC83xx_IRQ_EXT1; - pdata->phyid = 0; - /* fixup phy address */ - pdata->phy_reg_addr += binfo->bi_immr_base; - memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); + if (pdata) { + pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; + pdata->bus_id = 0; + pdata->phy_id = 0; + memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); + } pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2); - pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; - pdata->interruptPHY = MPC83xx_IRQ_EXT2; - pdata->phyid = 1; - /* fixup phy address */ - pdata->phy_reg_addr += binfo->bi_immr_base; - memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); + if (pdata) { + pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; + pdata->bus_id = 0; + pdata->phy_id = 1; + memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); + } #ifdef CONFIG_BLK_DEV_INITRD if (initrd_start) @@ -172,10 +203,17 @@ mpc834x_sys_init_IRQ(void) IRQ_SENSE_LEVEL, /* EXT 1 */ IRQ_SENSE_LEVEL, /* EXT 2 */ 0, /* EXT 3 */ +#ifdef CONFIG_PCI + IRQ_SENSE_LEVEL, /* EXT 4 */ + IRQ_SENSE_LEVEL, /* EXT 5 */ + IRQ_SENSE_LEVEL, /* EXT 6 */ + IRQ_SENSE_LEVEL, /* EXT 7 */ +#else 0, /* EXT 4 */ 0, /* EXT 5 */ 0, /* EXT 6 */ 0, /* EXT 7 */ +#endif }; ipic_init(binfo->bi_immr_base + 0x00700, 0, MPC83xx_IPIC_IRQ_OFFSET, senses, 8); @@ -186,6 +224,26 @@ mpc834x_sys_init_IRQ(void) ipic_set_default_priority(); } +#if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374) +extern ulong ds1374_get_rtc_time(void); +extern int ds1374_set_rtc_time(ulong); + +static int __init +mpc834x_rtc_hookup(void) +{ + struct timespec tv; + + ppc_md.get_rtc_time = ds1374_get_rtc_time; + ppc_md.set_rtc_time = ds1374_set_rtc_time; + + tv.tv_nsec = 0; + tv.tv_sec = (ppc_md.get_rtc_time)(); + do_settimeofday(&tv); + + return 0; +} +late_initcall(mpc834x_rtc_hookup); +#endif static __inline__ void mpc834x_sys_set_bat(void) { @@ -240,14 +298,14 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, struct uart_port p; memset(&p, 0, sizeof (p)); - p.iotype = SERIAL_IO_MEM; + p.iotype = UPIO_MEM; p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4500); p.uartclk = binfo->bi_busfreq; gen550_init(0, &p); memset(&p, 0, sizeof (p)); - p.iotype = SERIAL_IO_MEM; + p.iotype = UPIO_MEM; p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4600); p.uartclk = binfo->bi_busfreq;