X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fppc%2Fplatforms%2F85xx%2Fmpc8560_ads.c;h=16c8c7b5d1b997c83315781c06485dc10ef2b952;hb=6a77f38946aaee1cd85eeec6cf4229b204c15071;hp=0cb2c34588cd3aef0e87efcdaf9cbe916c3a2af5;hpb=87fc8d1bb10cd459024a742c6a10961fefcef18f;p=linux-2.6.git diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.c b/arch/ppc/platforms/85xx/mpc8560_ads.c index 0cb2c3458..16c8c7b5d 100644 --- a/arch/ppc/platforms/85xx/mpc8560_ads.c +++ b/arch/ppc/platforms/85xx/mpc8560_ads.c @@ -32,6 +32,7 @@ #include #include #include +#include #include #include @@ -48,7 +49,7 @@ #include #include #include -#include +#include #include #include @@ -58,34 +59,6 @@ extern void cpm2_reset(void); -struct ocp_gfar_data mpc85xx_tsec1_def = { - .interruptTransmit = MPC85xx_IRQ_TSEC1_TX, - .interruptError = MPC85xx_IRQ_TSEC1_ERROR, - .interruptReceive = MPC85xx_IRQ_TSEC1_RX, - .interruptPHY = MPC85xx_IRQ_EXT5, - .flags = (GFAR_HAS_GIGABIT | GFAR_HAS_MULTI_INTR - | GFAR_HAS_RMON | GFAR_HAS_COALESCE - | GFAR_HAS_PHY_INTR), - .phyid = 0, - .phyregidx = 0, -}; - -struct ocp_gfar_data mpc85xx_tsec2_def = { - .interruptTransmit = MPC85xx_IRQ_TSEC2_TX, - .interruptError = MPC85xx_IRQ_TSEC2_ERROR, - .interruptReceive = MPC85xx_IRQ_TSEC2_RX, - .interruptPHY = MPC85xx_IRQ_EXT5, - .flags = (GFAR_HAS_GIGABIT | GFAR_HAS_MULTI_INTR - | GFAR_HAS_RMON | GFAR_HAS_COALESCE - | GFAR_HAS_PHY_INTR), - .phyid = 1, - .phyregidx = 0, -}; - -struct ocp_fs_i2c_data mpc85xx_i2c1_def = { - .flags = FS_I2C_SEPARATE_DFSRR, -}; - /* ************************************************************************ * * Setup the architecture @@ -95,10 +68,9 @@ struct ocp_fs_i2c_data mpc85xx_i2c1_def = { static void __init mpc8560ads_setup_arch(void) { - struct ocp_def *def; - struct ocp_gfar_data *einfo; bd_t *binfo = (bd_t *) __res; unsigned int freq; + struct gianfar_platform_data *pdata; cpm2_reset(); @@ -117,17 +89,22 @@ mpc8560ads_setup_arch(void) mpc85xx_setup_hose(); #endif - def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 0); - if (def) { - einfo = (struct ocp_gfar_data *) def->additions; - memcpy(einfo->mac_addr, binfo->bi_enetaddr, 6); - } - - def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 1); - if (def) { - einfo = (struct ocp_gfar_data *) def->additions; - memcpy(einfo->mac_addr, binfo->bi_enet1addr, 6); - } + /* setup the board related information for the enet controllers */ + pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); + pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; + pdata->interruptPHY = MPC85xx_IRQ_EXT5; + pdata->phyid = 0; + /* fixup phy address */ + pdata->phy_reg_addr += binfo->bi_immr_base; + memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); + + pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); + pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; + pdata->interruptPHY = MPC85xx_IRQ_EXT5; + pdata->phyid = 1; + /* fixup phy address */ + pdata->phy_reg_addr += binfo->bi_immr_base; + memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); #ifdef CONFIG_BLK_DEV_INITRD if (initrd_start) @@ -139,18 +116,22 @@ mpc8560ads_setup_arch(void) #else ROOT_DEV = Root_HDA1; #endif - - ocp_for_each_device(mpc85xx_update_paddr_ocp, &(binfo->bi_immr_base)); } static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs) { - while ((irq = cpm2_get_irq(regs)) >= 0) { - ppc_irq_dispatch_handler(regs, irq); - } + while ((irq = cpm2_get_irq(regs)) >= 0) + __do_IRQ(irq, regs); return IRQ_HANDLED; } +static struct irqaction cpm2_irqaction = { + .handler = cpm2_cascade, + .flags = SA_INTERRUPT, + .mask = CPU_MASK_NONE, + .name = "cpm2_cascade", +}; + static void __init mpc8560_ads_init_IRQ(void) { @@ -174,7 +155,7 @@ mpc8560_ads_init_IRQ(void) immap->im_intctl.ic_scprrh = 0x05309770; immap->im_intctl.ic_scprrl = 0x05309770; - request_irq(MPC85xx_IRQ_CPM, cpm2_cascade, SA_INTERRUPT, "cpm2_cascade", NULL); + setup_irq(MPC85xx_IRQ_CPM, &cpm2_irqaction); return; } @@ -216,6 +197,8 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, strcpy(cmd_line, (char *) (r6 + KERNELBASE)); } + identify_ppc_sys_by_id(mfspr(SVR)); + /* setup the PowerPC module struct */ ppc_md.setup_arch = mpc8560ads_setup_arch; ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo;