X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fppc%2Fsyslib%2Fxilinx_pic.c;h=39a93dc6375b82a074aad29b9774865e27f001a5;hb=16c70f8c1b54b61c3b951b6fb220df250fe09b32;hp=89b5ac1692217995f62c318afc3f50c193481ffd;hpb=87fc8d1bb10cd459024a742c6a10961fefcef18f;p=linux-2.6.git diff --git a/arch/ppc/syslib/xilinx_pic.c b/arch/ppc/syslib/xilinx_pic.c index 89b5ac169..39a93dc63 100644 --- a/arch/ppc/syslib/xilinx_pic.c +++ b/arch/ppc/syslib/xilinx_pic.c @@ -1,6 +1,4 @@ /* - * arch/ppc/syslib/xilinx_pic.c - * * Interrupt controller driver for Xilinx Virtex-II Pro. * * Author: MontaVista Software, Inc. @@ -15,8 +13,9 @@ #include #include #include -#include +#include #include +#include /* No one else should require these constants, so define them locally here. */ #define ISR 0 /* Interrupt Status Register */ @@ -38,9 +37,6 @@ static volatile u32 *intc; #define intc_in_be32(addr) mfdcr((addr)) #endif -/* Global Variables */ -struct hw_interrupt_type *ppc4xx_pic; - static void xilinx_intc_enable(unsigned int irq) { @@ -82,14 +78,11 @@ xilinx_intc_end(unsigned int irq) } static struct hw_interrupt_type xilinx_intc = { - "Xilinx Interrupt Controller", - NULL, - NULL, - xilinx_intc_enable, - xilinx_intc_disable, - xilinx_intc_disable_and_ack, - xilinx_intc_end, - 0 + .typename = "Xilinx Interrupt Controller", + .enable = xilinx_intc_enable, + .disable = xilinx_intc_disable, + .ack = xilinx_intc_disable_and_ack, + .end = xilinx_intc_end, }; int @@ -115,6 +108,16 @@ xilinx_pic_get_irq(struct pt_regs *regs) void __init ppc4xx_pic_init(void) { + int i; + + /* + * NOTE: The assumption here is that NR_IRQS is 32 or less + * (NR_IRQS is 32 for PowerPC 405 cores by default). + */ +#if (NR_IRQS > 32) +#error NR_IRQS > 32 not supported +#endif + #if XPAR_XINTC_USE_DCR == 0 intc = ioremap(XPAR_INTC_0_BASEADDR, 32); @@ -137,6 +140,14 @@ ppc4xx_pic_init(void) /* Turn on the Master Enable. */ intc_out_be32(intc + MER, 0x3UL); - ppc4xx_pic = &xilinx_intc; ppc_md.get_irq = xilinx_pic_get_irq; + + for (i = 0; i < NR_IRQS; ++i) { + irq_desc[i].chip = &xilinx_intc; + + if (XPAR_INTC_0_KIND_OF_INTR & (0x00000001 << i)) + irq_desc[i].status &= ~IRQ_LEVEL; + else + irq_desc[i].status |= IRQ_LEVEL; + } }