X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fppc64%2Fkernel%2Fpmac_setup.c;h=41fa6e95a06f93022f27199f71b0c93a62e7f36a;hb=6a77f38946aaee1cd85eeec6cf4229b204c15071;hp=3d1de0f9bf83b51e7b1d0c564b8781a54ba6b9e0;hpb=87fc8d1bb10cd459024a742c6a10961fefcef18f;p=linux-2.6.git diff --git a/arch/ppc64/kernel/pmac_setup.c b/arch/ppc64/kernel/pmac_setup.c index 3d1de0f9b..41fa6e95a 100644 --- a/arch/ppc64/kernel/pmac_setup.c +++ b/arch/ppc64/kernel/pmac_setup.c @@ -53,13 +53,12 @@ #include #include #include +#include #include #include #include #include -#include -#include #include #include #include @@ -73,6 +72,7 @@ #include #include "pmac.h" +#include "mpic.h" #ifdef DEBUG #define DBG(fmt...) udbg_printf(fmt) @@ -166,11 +166,6 @@ void __init pmac_setup_arch(void) pmac_setup_smp(); #endif - /* Setup the PCI DMA to "direct" by default. May be overriden - * by iommu later on - */ - pci_dma_init_direct(); - /* Lookup PCI hosts */ pmac_pci_init(); @@ -315,34 +310,16 @@ void __init pmac_init_early(void) } /* Setup interrupt mapping options */ - naca->interrupt_controller = IC_OPEN_PIC; + ppc64_interrupt_controller = IC_OPEN_PIC; + + iommu_init_early_u3(); DBG(" <- pmac_init_early\n"); } -extern void* OpenPIC_Addr; -extern void* OpenPIC2_Addr; -extern u_int OpenPIC_NumInitSenses; -extern u_char *OpenPIC_InitSenses; -extern void openpic_init(int main_pic, int offset, unsigned char* chrp_ack, - int programmer_switch_irq); -extern void openpic2_init(int offset); -extern int openpic_get_irq(struct pt_regs *regs); -extern int openpic2_get_irq(struct pt_regs *regs); - -static int pmac_cascade_irq = -1; - -static irqreturn_t pmac_u3_do_cascade(int cpl, void *dev_id, struct pt_regs *regs) +static int pmac_u3_cascade(struct pt_regs *regs, void *data) { - int irq; - - for (;;) { - irq = openpic2_get_irq(regs); - if (irq == -1) - break; - ppc_irq_dispatch_handler(regs, irq); - } - return IRQ_HANDLED; + return mpic_get_one_irq((struct mpic *)data, regs); } static __init void pmac_init_IRQ(void) @@ -350,6 +327,7 @@ static __init void pmac_init_IRQ(void) struct device_node *irqctrler = NULL; struct device_node *irqctrler2 = NULL; struct device_node *np = NULL; + struct mpic *mpic1, *mpic2; /* We first try to detect Apple's new Core99 chipset, since mac-io * is quite different on those machines and contains an IBM MPIC2. @@ -369,44 +347,37 @@ static __init void pmac_init_IRQ(void) (unsigned int)irqctrler->addrs[0].address); prom_get_irq_senses(senses, 0, 128); - OpenPIC_InitSenses = senses; - OpenPIC_NumInitSenses = 128; - OpenPIC_Addr = ioremap(irqctrler->addrs[0].address, - irqctrler->addrs[0].size); - openpic_init(1, 0, NULL, -1); + mpic1 = mpic_alloc(irqctrler->addrs[0].address, + MPIC_PRIMARY | MPIC_WANTS_RESET, + 0, 0, 128, 256, senses, 128, " K2-MPIC "); + BUG_ON(mpic1 == NULL); + mpic_init(mpic1); if (irqctrler2 != NULL && irqctrler2->n_intrs > 0 && irqctrler2->n_addrs > 0) { printk(KERN_INFO "Slave OpenPIC at 0x%08x hooked on IRQ %d\n", (u32)irqctrler2->addrs[0].address, irqctrler2->intrs[0].line); + pmac_call_feature(PMAC_FTR_ENABLE_MPIC, irqctrler2, 0, 0); - OpenPIC2_Addr = ioremap(irqctrler2->addrs[0].address, - irqctrler2->addrs[0].size); prom_get_irq_senses(senses, 128, 128 + 128); - OpenPIC_InitSenses = senses; - OpenPIC_NumInitSenses = 128; - openpic2_init(128); - pmac_cascade_irq = irqctrler2->intrs[0].line; + + /* We don't need to set MPIC_BROKEN_U3 here since we don't have + * hypertransport interrupts routed to it + */ + mpic2 = mpic_alloc(irqctrler2->addrs[0].address, + MPIC_BIG_ENDIAN | MPIC_WANTS_RESET, + 0, 128, 128, 0, senses, 128, " U3-MPIC "); + BUG_ON(mpic2 == NULL); + mpic_init(mpic2); + mpic_setup_cascade(irqctrler2->intrs[0].line, + pmac_u3_cascade, mpic2); } } of_node_put(irqctrler); of_node_put(irqctrler2); } -/* We cannot do request_irq too early ... Right now, we get the - * cascade as a core_initcall, which should be fine for our needs - */ -static int __init pmac_irq_cascade_init(void) -{ - if (request_irq(pmac_cascade_irq, pmac_u3_do_cascade, 0, - "U3->K2 Cascade", NULL)) - printk(KERN_ERR "Unable to get OpenPIC IRQ for cascade\n"); - return 0; -} - -core_initcall(pmac_irq_cascade_init); - static void __init pmac_progress(char *s, unsigned short hex) { if (sccdbg) { @@ -421,6 +392,15 @@ static void __init pmac_progress(char *s, unsigned short hex) #endif /* CONFIG_BOOTX_TEXT */ } +/* + * pmac has no legacy IO, anything calling this function has to + * fail or bad things will happen + */ +static int pmac_check_legacy_ioport(unsigned int baseport) +{ + return -ENODEV; +} + static int __init pmac_declare_of_platform_devices(void) { struct device_node *np; @@ -464,7 +444,7 @@ struct machdep_calls __initdata pmac_md = { .init_early = pmac_init_early, .get_cpuinfo = pmac_show_cpuinfo, .init_IRQ = pmac_init_IRQ, - .get_irq = openpic_get_irq, + .get_irq = mpic_get_irq, .pcibios_fixup = pmac_pcibios_fixup, .restart = pmac_restart, .power_off = pmac_power_off, @@ -475,4 +455,5 @@ struct machdep_calls __initdata pmac_md = { .calibrate_decr = pmac_calibrate_decr, .feature_call = pmac_do_feature_call, .progress = pmac_progress, + .check_legacy_ioport = pmac_check_legacy_ioport };