X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=drivers%2Fchar%2Fagp%2Fefficeon-agp.c;h=86a966b652368c84d5331ab62cb25a357fefcfb8;hb=43bc926fffd92024b46cafaf7350d669ba9ca884;hp=ac19fdcd21c1c7583246256edba92157b42d278e;hpb=cee37fe97739d85991964371c1f3a745c00dd236;p=linux-2.6.git diff --git a/drivers/char/agp/efficeon-agp.c b/drivers/char/agp/efficeon-agp.c index ac19fdcd2..86a966b65 100644 --- a/drivers/char/agp/efficeon-agp.c +++ b/drivers/char/agp/efficeon-agp.c @@ -1,6 +1,6 @@ /* * Transmeta's Efficeon AGPGART driver. - * + * * Based upon a diff by Linus around November '02. * * Ported to the 2.6 kernel by Carlos Puchol @@ -9,7 +9,7 @@ /* * NOTE-cpg-040217: - * + * * - when compiled as a module, after loading the module, * it will refuse to unload, indicating it is in use, * when it is not. @@ -45,7 +45,7 @@ * 8: Present * 7:6: reserved, write as zero * 5:0: GATT directory index: which 1st-level entry - * + * * The Efficeon AGP spec requires pages to be WB-cacheable * but to be explicitly CLFLUSH'd after any changes. */ @@ -64,6 +64,12 @@ static struct gatt_mask efficeon_generic_masks[] = {.mask = 0x00000001, .type = 0} }; +/* This function does the same thing as mask_memory() for this chipset... */ +static inline unsigned long efficeon_mask_memory(unsigned long addr) +{ + return addr | 0x00000001; +} + static struct aper_size_info_lvl2 efficeon_generic_sizes[4] = { {256, 65536, 0}, @@ -125,7 +131,7 @@ static int efficeon_configure(void) struct aper_size_info_lvl2 *current_size; printk(KERN_DEBUG PFX "efficeon_configure()\n"); - + current_size = A_SIZE_LVL2(agp_bridge->current_size); /* aperture size */ @@ -190,7 +196,7 @@ static int efficeon_create_gatt_table(struct agp_bridge_data *bridge) const int present = EFFICEON_PRESENT; const int clflush_chunk = ((cpuid_ebx(1) >> 8) & 0xff) << 3; int num_entries, l1_pages; - + num_entries = A_SIZE_LVL2(agp_bridge->current_size)->num_entries; printk(KERN_DEBUG PFX "efficeon_create_gatt_table(%d)\n", num_entries); @@ -219,7 +225,7 @@ static int efficeon_create_gatt_table(struct agp_bridge_data *bridge) efficeon_private.l1_table[index] = page; - value = virt_to_gart(page) | pati | present | index; + value = virt_to_gart((unsigned long *)page) | pati | present | index; pci_write_config_dword(agp_bridge->dev, EFFICEON_ATTPAGE, value); @@ -251,18 +257,18 @@ static int efficeon_insert_memory(struct agp_memory * mem, off_t pg_start, int t last_page = NULL; for (i = 0; i < count; i++) { int index = pg_start + i; - unsigned long insert = mem->memory[i]; + unsigned long insert = efficeon_mask_memory(mem->memory[i]); page = (unsigned int *) efficeon_private.l1_table[index >> 10]; if (!page) continue; - + page += (index & 0x3ff); *page = insert; /* clflush is slow, so don't clflush until we have to */ - if ( last_page && + if ( last_page && ((unsigned long)page^(unsigned long)last_page) & clflush_mask ) asm volatile("clflush %0" : : "m" (*last_page)); @@ -373,7 +379,7 @@ static int __devinit agp_efficeon_probe(struct pci_dev *pdev, */ r = &pdev->resource[0]; if (!r->start && r->end) { - if(pci_assign_resource(pdev, 0)) { + if (pci_assign_resource(pdev, 0)) { printk(KERN_ERR PFX "could not assign resource 0\n"); return -ENODEV; }