X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=drivers%2Fchar%2Frio%2Fboard.h;h=bdea633a9076a217804f9aa6734a3e6ef3631aef;hb=43bc926fffd92024b46cafaf7350d669ba9ca884;hp=0b397e1c8f1c7a153abbbcea4c7ff01606993494;hpb=cee37fe97739d85991964371c1f3a745c00dd236;p=linux-2.6.git diff --git a/drivers/char/rio/board.h b/drivers/char/rio/board.h index 0b397e1c8..bdea633a9 100644 --- a/drivers/char/rio/board.h +++ b/drivers/char/rio/board.h @@ -33,10 +33,6 @@ #ifndef __rio_board_h__ #define __rio_board_h__ -#ifdef SCCS_LABELS -static char *_board_h_sccs_ = "@(#)board.h 1.2"; -#endif - /* ** board.h contains the definitions for the *hardware* of the host cards. ** It describes the memory overlay for the dual port RAM area. @@ -52,63 +48,57 @@ static char *_board_h_sccs_ = "@(#)board.h 1.2"; /* ** The shape of the Host Control area, at offset 0x7C00, Write Only */ -struct s_Ctrl -{ - BYTE DpCtl; /* 7C00 */ - BYTE Dp_Unused2_[127]; - BYTE DpIntSet; /* 7C80 */ - BYTE Dp_Unused3_[127]; - BYTE DpTpuReset; /* 7D00 */ - BYTE Dp_Unused4_[127]; - BYTE DpIntReset; /* 7D80 */ - BYTE Dp_Unused5_[127]; +struct s_Ctrl { + u8 DpCtl; /* 7C00 */ + u8 Dp_Unused2_[127]; + u8 DpIntSet; /* 7C80 */ + u8 Dp_Unused3_[127]; + u8 DpTpuReset; /* 7D00 */ + u8 Dp_Unused4_[127]; + u8 DpIntReset; /* 7D80 */ + u8 Dp_Unused5_[127]; }; /* ** The PROM data area on the host (0x7C00), Read Only */ -struct s_Prom -{ - WORD DpSlxCode[2]; - WORD DpRev; - WORD Dp_Unused6_; - WORD DpUniq[4]; - WORD DpJahre; - WORD DpWoche; - WORD DpHwFeature[5]; - WORD DpOemId; - WORD DpSiggy[16]; +struct s_Prom { + u16 DpSlxCode[2]; + u16 DpRev; + u16 Dp_Unused6_; + u16 DpUniq[4]; + u16 DpJahre; + u16 DpWoche; + u16 DpHwFeature[5]; + u16 DpOemId; + u16 DpSiggy[16]; }; /* ** Union of the Ctrl and Prom areas */ -union u_CtrlProm /* This is the control/PROM area (0x7C00) */ -{ - struct s_Ctrl DpCtrl; - struct s_Prom DpProm; +union u_CtrlProm { /* This is the control/PROM area (0x7C00) */ + struct s_Ctrl DpCtrl; + struct s_Prom DpProm; }; /* ** The top end of memory! */ -struct s_ParmMapS /* Area containing Parm Map Pointer */ -{ - BYTE Dp_Unused8_[DP_PARMMAP_ADDR]; - WORD DpParmMapAd; +struct s_ParmMapS { /* Area containing Parm Map Pointer */ + u8 Dp_Unused8_[DP_PARMMAP_ADDR]; + u16 DpParmMapAd; }; -struct s_StartUpS -{ - BYTE Dp_Unused9_[DP_STARTUP_ADDR]; - BYTE Dp_LongJump[0x4]; - BYTE Dp_Unused10_[2]; - BYTE Dp_ShortJump[0x2]; +struct s_StartUpS { + u8 Dp_Unused9_[DP_STARTUP_ADDR]; + u8 Dp_LongJump[0x4]; + u8 Dp_Unused10_[2]; + u8 Dp_ShortJump[0x2]; }; -union u_Sram2ParmMap /* This is the top of memory (0x7E00-0x7FFF) */ -{ - BYTE DpSramMem[DP_SRAM2_SIZE]; +union u_Sram2ParmMap { /* This is the top of memory (0x7E00-0x7FFF) */ + u8 DpSramMem[DP_SRAM2_SIZE]; struct s_ParmMapS DpParmMapS; struct s_StartUpS DpStartUpS; }; @@ -116,13 +106,12 @@ union u_Sram2ParmMap /* This is the top of memory (0x7E00-0x7FFF) */ /* ** This is the DP RAM overlay. */ -struct DpRam -{ - BYTE DpSram1[DP_SRAM1_SIZE]; /* 0000 - 7BFF */ - union u_CtrlProm DpCtrlProm; /* 7C00 - 7DFF */ - union u_Sram2ParmMap DpSram2ParmMap; /* 7E00 - 7FFF */ - BYTE DpScratch[DP_SCRATCH_SIZE]; /* 8000 - 8FFF */ - BYTE DpSram3[DP_SRAM3_SIZE]; /* 9000 - FFFF */ +struct DpRam { + u8 DpSram1[DP_SRAM1_SIZE]; /* 0000 - 7BFF */ + union u_CtrlProm DpCtrlProm; /* 7C00 - 7DFF */ + union u_Sram2ParmMap DpSram2ParmMap; /* 7E00 - 7FFF */ + u8 DpScratch[DP_SCRATCH_SIZE]; /* 8000 - 8FFF */ + u8 DpSram3[DP_SRAM3_SIZE]; /* 9000 - FFFF */ }; #define DpControl DpCtrlProm.DpCtrl.DpCtl