X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=drivers%2Fmtd%2Fmaps%2Fl440gx.c;h=67620adf48114713366d24a8e0175b71e7e65501;hb=refs%2Fheads%2Fvserver;hp=046f7efbd8e676765c45810c26309844d7e8efd1;hpb=9bf4aaab3e101692164d49b7ca357651eb691cb6;p=linux-2.6.git

diff --git a/drivers/mtd/maps/l440gx.c b/drivers/mtd/maps/l440gx.c
index 046f7efbd..67620adf4 100644
--- a/drivers/mtd/maps/l440gx.c
+++ b/drivers/mtd/maps/l440gx.c
@@ -1,5 +1,5 @@
 /*
- * $Id: l440gx.c,v 1.13 2004/07/12 21:59:44 dwmw2 Exp $
+ * $Id: l440gx.c,v 1.18 2005/11/07 11:14:27 gleixner Exp $
  *
  * BIOS Flash chip on Intel 440GX board.
  *
@@ -13,7 +13,6 @@
 #include <asm/io.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/map.h>
-#include <linux/config.h>
 
 #define PIIXE_IOBASE_RESOURCE	11
 
@@ -30,7 +29,7 @@ static struct mtd_info *mymtd;
 
 
 /* Is this really the vpp port? */
-void l440gx_set_vpp(struct map_info *map, int vpp)
+static void l440gx_set_vpp(struct map_info *map, int vpp)
 {
 	unsigned long l;
 
@@ -43,13 +42,13 @@ void l440gx_set_vpp(struct map_info *map, int vpp)
 	outl(l, VPP_PORT);
 }
 
-struct map_info l440gx_map = {
+static struct map_info l440gx_map = {
 	.name = "L440GX BIOS",
 	.size = WINDOW_SIZE,
 	.bankwidth = BUSWIDTH,
 	.phys = WINDOW_ADDR,
 #if 0
-	/* FIXME verify that this is the 
+	/* FIXME verify that this is the
 	 * appripriate code for vpp enable/disable
 	 */
 	.set_vpp = l440gx_set_vpp
@@ -62,30 +61,34 @@ static int __init init_l440gx(void)
 	struct resource *pm_iobase;
 	__u16 word;
 
-	dev = pci_find_device(PCI_VENDOR_ID_INTEL, 
+	dev = pci_get_device(PCI_VENDOR_ID_INTEL,
 		PCI_DEVICE_ID_INTEL_82371AB_0, NULL);
 
-	pm_dev = pci_find_device(PCI_VENDOR_ID_INTEL, 
+	pm_dev = pci_get_device(PCI_VENDOR_ID_INTEL,
 		PCI_DEVICE_ID_INTEL_82371AB_3, NULL);
 
+	pci_dev_put(dev);
+
 	if (!dev || !pm_dev) {
 		printk(KERN_NOTICE "L440GX flash mapping: failed to find PIIX4 ISA bridge, cannot continue\n");
+		pci_dev_put(pm_dev);
 		return -ENODEV;
 	}
 
-	l440gx_map.virt = (unsigned long)ioremap_nocache(WINDOW_ADDR, WINDOW_SIZE);
+	l440gx_map.virt = ioremap_nocache(WINDOW_ADDR, WINDOW_SIZE);
 
 	if (!l440gx_map.virt) {
 		printk(KERN_WARNING "Failed to ioremap L440GX flash region\n");
+		pci_dev_put(pm_dev);
 		return -ENOMEM;
 	}
 	simple_map_init(&l440gx_map);
 	printk(KERN_NOTICE "window_addr = 0x%08lx\n", (unsigned long)l440gx_map.virt);
 
-	/* Setup the pm iobase resource 
+	/* Setup the pm iobase resource
 	 * This code should move into some kind of generic bridge
 	 * driver but for the moment I'm content with getting the
-	 * allocation correct. 
+	 * allocation correct.
 	 */
 	pm_iobase = &pm_dev->resource[PIIXE_IOBASE_RESOURCE];
 	if (!(pm_iobase->flags & IORESOURCE_IO)) {
@@ -100,17 +103,21 @@ static int __init init_l440gx(void)
 		pm_iobase->start += iobase & ~1;
 		pm_iobase->end += iobase & ~1;
 
+		pci_dev_put(pm_dev);
+
 		/* Allocate the resource region */
 		if (pci_assign_resource(pm_dev, PIIXE_IOBASE_RESOURCE) != 0) {
+			pci_dev_put(dev);
+			pci_dev_put(pm_dev);
 			printk(KERN_WARNING "Could not allocate pm iobase resource\n");
-			iounmap((void *)l440gx_map.virt);
+			iounmap(l440gx_map.virt);
 			return -ENXIO;
 		}
 	}
 	/* Set the iobase */
 	iobase = pm_iobase->start;
 	pci_write_config_dword(pm_dev, 0x40, iobase | 1);
-	
+
 
 	/* Set XBCS# */
 	pci_read_config_word(dev, 0x4e, &word);
@@ -122,7 +129,7 @@ static int __init init_l440gx(void)
 
 	/* Enable the gate on the WE line */
 	outb(inb(TRIBUF_PORT) & ~1, TRIBUF_PORT);
-	
+
        	printk(KERN_NOTICE "Enabled WE line to L440GX BIOS flash chip.\n");
 
 	mymtd = do_map_probe("jedec_probe", &l440gx_map);
@@ -137,7 +144,7 @@ static int __init init_l440gx(void)
 		return 0;
 	}
 
-	iounmap((void *)l440gx_map.virt);
+	iounmap(l440gx_map.virt);
 	return -ENXIO;
 }
 
@@ -145,8 +152,8 @@ static void __exit cleanup_l440gx(void)
 {
 	del_mtd_device(mymtd);
 	map_destroy(mymtd);
-	
-	iounmap((void *)l440gx_map.virt);
+
+	iounmap(l440gx_map.virt);
 }
 
 module_init(init_l440gx);