X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=drivers%2Fnet%2Fmeth.c;h=e23655f5049fa340ba432fc3ecb4fb90b1bd3d1e;hb=f7f1b0f1e2fbadeab12d24236000e778aa9b1ead;hp=619a67a8c2112eed7018ccae5003eccd9cb46e45;hpb=5273a3df6485dc2ad6aa7ddd441b9a21970f003b;p=linux-2.6.git diff --git a/drivers/net/meth.c b/drivers/net/meth.c index 619a67a8c..e23655f50 100644 --- a/drivers/net/meth.c +++ b/drivers/net/meth.c @@ -27,7 +27,7 @@ #include /* struct iphdr */ #include /* struct tcphdr */ #include -#include /*MII definitions */ +#include /* MII definitions */ #include #include @@ -105,27 +105,27 @@ static inline void load_eaddr(struct net_device *dev) (int)o2meth_eaddr[3]&0xFF,(int)o2meth_eaddr[4]&0xFF,(int)o2meth_eaddr[5]&0xFF); for (i = 0; i < 6; i++) dev->dev_addr[i] = o2meth_eaddr[i]; - mace_eth_write((*(u64*)o2meth_eaddr)>>16, mac_addr); + mace->eth.mac_addr = (*(unsigned long*)o2meth_eaddr) >> 16; } /* * Waits for BUSY status of mdio bus to clear */ -#define WAIT_FOR_PHY(___rval) \ - while ((___rval = mace_eth_read(phy_data)) & MDIO_BUSY) { \ - udelay(25); \ +#define WAIT_FOR_PHY(___rval) \ + while ((___rval = mace->eth.phy_data) & MDIO_BUSY) { \ + udelay(25); \ } /*read phy register, return value read */ static unsigned long mdio_read(struct meth_private *priv, unsigned long phyreg) { unsigned long rval; WAIT_FOR_PHY(rval); - mace_eth_write((priv->phy_addr << 5) | (phyreg & 0x1f), phy_regs); + mace->eth.phy_regs = (priv->phy_addr << 5) | (phyreg & 0x1f); udelay(25); - mace_eth_write(1, phy_trans_go); + mace->eth.phy_trans_go = 1; udelay(25); WAIT_FOR_PHY(rval); - return rval&MDIO_DATA_MASK; + return rval & MDIO_DATA_MASK; } static int mdio_probe(struct meth_private *priv) @@ -191,7 +191,7 @@ static void meth_check_link(struct net_device *dev) priv->mac_ctrl |= METH_PHY_FDX; else priv->mac_ctrl &= ~METH_PHY_FDX; - mace_eth_write(priv->mac_ctrl, mac_ctrl); + mace->eth.mac_ctrl = priv->mac_ctrl; } if ((priv->mac_ctrl & METH_100MBIT) ^ speed) { @@ -200,7 +200,7 @@ static void meth_check_link(struct net_device *dev) priv->mac_ctrl |= METH_100MBIT; else priv->mac_ctrl &= ~METH_100MBIT; - mace_eth_write(priv->mac_ctrl, mac_ctrl); + mace->eth.mac_ctrl = priv->mac_ctrl; } } @@ -214,26 +214,28 @@ static int meth_init_tx_ring(struct meth_private *priv) return -ENOMEM; memset(priv->tx_ring, 0, TX_RING_BUFFER_SIZE); priv->tx_count = priv->tx_read = priv->tx_write = 0; - mace_eth_write(priv->tx_ring_dma, tx_ring_base); + mace->eth.tx_ring_base = priv->tx_ring_dma; /* Now init skb save area */ - memset(priv->tx_skbs,0,sizeof(priv->tx_skbs)); - memset(priv->tx_skb_dmas,0,sizeof(priv->tx_skb_dmas)); + memset(priv->tx_skbs, 0, sizeof(priv->tx_skbs)); + memset(priv->tx_skb_dmas, 0, sizeof(priv->tx_skb_dmas)); return 0; } static int meth_init_rx_ring(struct meth_private *priv) { int i; - for(i=0;irx_skbs[i]=alloc_skb(METH_RX_BUFF_SIZE,0); - /* 8byte status vector+3quad padding + 2byte padding, - to put data on 64bit aligned boundary */ + + for (i = 0; i < RX_RING_ENTRIES; i++) { + priv->rx_skbs[i] = alloc_skb(METH_RX_BUFF_SIZE, 0); + /* 8byte status vector + 3quad padding + 2byte padding, + * to put data on 64bit aligned boundary */ skb_reserve(priv->rx_skbs[i],METH_RX_HEAD); priv->rx_ring[i]=(rx_packet*)(priv->rx_skbs[i]->head); /* I'll need to re-sync it after each RX */ - priv->rx_ring_dmas[i]=dma_map_single(NULL,priv->rx_ring[i], - METH_RX_BUFF_SIZE,DMA_FROM_DEVICE); - mace_eth_write(priv->rx_ring_dmas[i], rx_fifo); + priv->rx_ring_dmas[i] = + dma_map_single(NULL, priv->rx_ring[i], + METH_RX_BUFF_SIZE, DMA_FROM_DEVICE); + mace->eth.rx_fifo = priv->rx_ring_dmas[i]; } priv->rx_write = 0; return 0; @@ -257,10 +259,11 @@ static void meth_free_rx_ring(struct meth_private *priv) { int i; - for(i=0;irx_ring_dmas[i],METH_RX_BUFF_SIZE,DMA_FROM_DEVICE); - priv->rx_ring[i]=0; - priv->rx_ring_dmas[i]=0; + for (i = 0; i < RX_RING_ENTRIES; i++) { + dma_unmap_single(NULL, priv->rx_ring_dmas[i], + METH_RX_BUFF_SIZE, DMA_FROM_DEVICE); + priv->rx_ring[i] = 0; + priv->rx_ring_dmas[i] = 0; kfree_skb(priv->rx_skbs[i]); } } @@ -270,8 +273,9 @@ int meth_reset(struct net_device *dev) struct meth_private *priv = (struct meth_private *) dev->priv; /* Reset card */ - mace_eth_write(SGI_MAC_RESET, mac_ctrl); - mace_eth_write(0, mac_ctrl); + mace->eth.mac_ctrl = SGI_MAC_RESET; + udelay(1); + mace->eth.mac_ctrl = 0; udelay(25); /* Load ethernet address */ @@ -279,24 +283,24 @@ int meth_reset(struct net_device *dev) /* Should load some "errata", but later */ /* Check for device */ - if(mdio_probe(priv) < 0) { + if (mdio_probe(priv) < 0) { DPRINTK("Unable to find PHY\n"); return -ENODEV; } /* Initial mode: 10 | Half-duplex | Accept normal packets */ priv->mac_ctrl = METH_ACCEPT_MCAST | METH_DEFAULT_IPG; - if(dev->flags | IFF_PROMISC) + if (dev->flags | IFF_PROMISC) priv->mac_ctrl |= METH_PROMISC; - mace_eth_write(priv->mac_ctrl, mac_ctrl); + mace->eth.mac_ctrl = priv->mac_ctrl; /* Autonegotiate speed and duplex mode */ meth_check_link(dev); /* Now set dma control, but don't enable DMA, yet */ - priv->dma_ctrl= (4 << METH_RX_OFFSET_SHIFT) | - (RX_RING_ENTRIES << METH_RX_DEPTH_SHIFT); - mace_eth_write(priv->dma_ctrl, dma_ctrl); + priv->dma_ctrl = (4 << METH_RX_OFFSET_SHIFT) | + (RX_RING_ENTRIES << METH_RX_DEPTH_SHIFT); + mace->eth.dma_ctrl = priv->dma_ctrl; return 0; } @@ -335,7 +339,7 @@ static int meth_open(struct net_device *dev) /* Start DMA */ priv->dma_ctrl |= METH_DMA_TX_EN | /*METH_DMA_TX_INT_EN |*/ METH_DMA_RX_EN | METH_DMA_RX_INT_EN; - mace_eth_write(priv->dma_ctrl, dma_ctrl); + mace->eth.dma_ctrl = priv->dma_ctrl; DPRINTK("About to start queue\n"); netif_start_queue(dev); @@ -359,7 +363,7 @@ static int meth_release(struct net_device *dev) /* shut down DMA */ priv->dma_ctrl &= ~(METH_DMA_TX_EN | METH_DMA_TX_INT_EN | METH_DMA_RX_EN | METH_DMA_RX_INT_EN); - mace_eth_write(priv->dma_ctrl, dma_ctrl); + mace->eth.dma_ctrl = priv->dma_ctrl; free_irq(dev->irq, dev); meth_free_tx_ring(priv); meth_free_rx_ring(priv); @@ -367,87 +371,63 @@ static int meth_release(struct net_device *dev) return 0; } -/* - * Configuration changes (passed on by ifconfig) - */ -static int meth_config(struct net_device *dev, struct ifmap *map) -{ - if (dev->flags & IFF_UP) /* can't act on a running interface */ - return -EBUSY; - - /* Don't allow changing the I/O address */ - if (map->base_addr != dev->base_addr) { - printk(KERN_WARNING "meth: Can't change I/O address\n"); - return -EOPNOTSUPP; - } - - /* Don't allow changing the IRQ */ - if (map->irq != dev->irq) { - printk(KERN_WARNING "meth: Can't change IRQ\n"); - return -EOPNOTSUPP; - } - DPRINTK("Configured\n"); - - /* ignore other fields */ - return 0; -} - /* * Receive a packet: retrieve, encapsulate and pass over to upper levels */ static void meth_rx(struct net_device* dev, unsigned long int_status) { struct sk_buff *skb; + unsigned long status; struct meth_private *priv = (struct meth_private *) dev->priv; - unsigned long fifo_rptr=(int_status&METH_INT_RX_RPTR_MASK)>>8; + unsigned long fifo_rptr = (int_status & METH_INT_RX_RPTR_MASK) >> 8; + spin_lock(&priv->meth_lock); - priv->dma_ctrl&=~METH_DMA_RX_INT_EN; - mace_eth_write(priv->dma_ctrl, dma_ctrl); + priv->dma_ctrl &= ~METH_DMA_RX_INT_EN; + mace->eth.dma_ctrl = priv->dma_ctrl; spin_unlock(&priv->meth_lock); - if (int_status & METH_INT_RX_UNDERFLOW){ - fifo_rptr=(fifo_rptr-1)&(0xF); + if (int_status & METH_INT_RX_UNDERFLOW) { + fifo_rptr = (fifo_rptr - 1) & 0x0f; } - while(priv->rx_write != fifo_rptr) { - u64 status; - dma_unmap_single(NULL,priv->rx_ring_dmas[priv->rx_write], - METH_RX_BUFF_SIZE,DMA_FROM_DEVICE); - status=priv->rx_ring[priv->rx_write]->status.raw; + while (priv->rx_write != fifo_rptr) { + dma_unmap_single(NULL, priv->rx_ring_dmas[priv->rx_write], + METH_RX_BUFF_SIZE, DMA_FROM_DEVICE); + status = priv->rx_ring[priv->rx_write]->status.raw; #if MFE_DEBUG - if(!(status&METH_RX_ST_VALID)) { + if (!(status & METH_RX_ST_VALID)) { DPRINTK("Not received? status=%016lx\n",status); } #endif - if((!(status&METH_RX_STATUS_ERRORS))&&(status&METH_RX_ST_VALID)){ - int len=(status&0xFFFF) - 4; /* omit CRC */ + if ((!(status & METH_RX_STATUS_ERRORS)) && (status & METH_RX_ST_VALID)) { + int len = (status & 0xffff) - 4; /* omit CRC */ /* length sanity check */ - if(len < 60 || len > 1518) { - printk(KERN_DEBUG "%s: bogus packet size: %d, status=%#2lx.\n", + if (len < 60 || len > 1518) { + printk(KERN_DEBUG "%s: bogus packet size: %ld, status=%#2lx.\n", dev->name, priv->rx_write, priv->rx_ring[priv->rx_write]->status.raw); priv->stats.rx_errors++; priv->stats.rx_length_errors++; - skb=priv->rx_skbs[priv->rx_write]; + skb = priv->rx_skbs[priv->rx_write]; } else { - skb=alloc_skb(METH_RX_BUFF_SIZE,GFP_ATOMIC|GFP_DMA); - if(!skb){ + skb = alloc_skb(METH_RX_BUFF_SIZE, GFP_ATOMIC | GFP_DMA); + if (!skb) { /* Ouch! No memory! Drop packet on the floor */ DPRINTK("No mem: dropping packet\n"); priv->stats.rx_dropped++; - skb=priv->rx_skbs[priv->rx_write]; + skb = priv->rx_skbs[priv->rx_write]; } else { - struct sk_buff *skb_c=priv->rx_skbs[priv->rx_write]; - /* 8byte status vector+3quad padding + 2byte padding, - to put data on 64bit aligned boundary */ - skb_reserve(skb,METH_RX_HEAD); + struct sk_buff *skb_c = priv->rx_skbs[priv->rx_write]; + /* 8byte status vector + 3quad padding + 2byte padding, + * to put data on 64bit aligned boundary */ + skb_reserve(skb, METH_RX_HEAD); /* Write metadata, and then pass to the receive level */ - skb_put(skb_c,len); - priv->rx_skbs[priv->rx_write]=skb; + skb_put(skb_c, len); + priv->rx_skbs[priv->rx_write] = skb; skb_c->dev = dev; skb_c->protocol = eth_type_trans(skb_c, dev); dev->last_rx = jiffies; priv->stats.rx_packets++; - priv->stats.rx_bytes+=len; + priv->stats.rx_bytes += len; netif_rx(skb_c); } } @@ -470,18 +450,19 @@ static void meth_rx(struct net_device* dev, unsigned long int_status) printk(KERN_WARNING "Carrier Event Seen\n"); #endif } - priv->rx_ring[priv->rx_write]=(rx_packet*)skb->head; - priv->rx_ring[priv->rx_write]->status.raw=0; - priv->rx_ring_dmas[priv->rx_write]=dma_map_single(NULL,priv->rx_ring[priv->rx_write], - METH_RX_BUFF_SIZE,DMA_FROM_DEVICE); - mace_eth_write(priv->rx_ring_dmas[priv->rx_write], rx_fifo); + priv->rx_ring[priv->rx_write] = (rx_packet*)skb->head; + priv->rx_ring[priv->rx_write]->status.raw = 0; + priv->rx_ring_dmas[priv->rx_write] = + dma_map_single(NULL, priv->rx_ring[priv->rx_write], + METH_RX_BUFF_SIZE, DMA_FROM_DEVICE); + mace->eth.rx_fifo = priv->rx_ring_dmas[priv->rx_write]; ADVANCE_RX_PTR(priv->rx_write); } spin_lock(&priv->meth_lock); /* In case there was underflow, and Rx DMA was disabled */ - priv->dma_ctrl|=METH_DMA_RX_INT_EN|METH_DMA_RX_EN; - mace_eth_write(priv->dma_ctrl, dma_ctrl); - mace_eth_write(METH_INT_RX_THRESHOLD, int_stat); + priv->dma_ctrl |= METH_DMA_RX_INT_EN | METH_DMA_RX_EN; + mace->eth.dma_ctrl = priv->dma_ctrl; + mace->eth.int_stat = METH_INT_RX_THRESHOLD; spin_unlock(&priv->meth_lock); } @@ -489,31 +470,31 @@ static int meth_tx_full(struct net_device *dev) { struct meth_private *priv = (struct meth_private *) dev->priv; - return(priv->tx_count >= TX_RING_ENTRIES-1); + return (priv->tx_count >= TX_RING_ENTRIES - 1); } static void meth_tx_cleanup(struct net_device* dev, unsigned long int_status) { struct meth_private *priv = dev->priv; - u64 status; + unsigned long status; struct sk_buff *skb; - unsigned long rptr=(int_status&TX_INFO_RPTR)>>16; + unsigned long rptr = (int_status&TX_INFO_RPTR) >> 16; spin_lock(&priv->meth_lock); /* Stop DMA notification */ priv->dma_ctrl &= ~(METH_DMA_TX_INT_EN); - mace_eth_write(priv->dma_ctrl, dma_ctrl); + mace->eth.dma_ctrl = priv->dma_ctrl; - while(priv->tx_read != rptr){ + while (priv->tx_read != rptr) { skb = priv->tx_skbs[priv->tx_read]; status = priv->tx_ring[priv->tx_read].header.raw; #if MFE_DEBUG>=1 - if(priv->tx_read==priv->tx_write) - DPRINTK("Auchi! tx_read=%d,tx_write=%d,rptr=%d?\n",priv->tx_read,priv->tx_write,rptr); + if (priv->tx_read == priv->tx_write) + DPRINTK("Auchi! tx_read=%d,tx_write=%d,rptr=%d?\n", priv->tx_read, priv->tx_write,rptr); #endif - if(status & METH_TX_ST_DONE) { - if(status & METH_TX_ST_SUCCESS){ + if (status & METH_TX_ST_DONE) { + if (status & METH_TX_ST_SUCCESS){ priv->stats.tx_packets++; priv->stats.tx_bytes += skb->len; } else { @@ -543,19 +524,19 @@ static void meth_tx_cleanup(struct net_device* dev, unsigned long int_status) priv->tx_skbs[priv->tx_read] = NULL; priv->tx_ring[priv->tx_read].header.raw = 0; priv->tx_read = (priv->tx_read+1)&(TX_RING_ENTRIES-1); - priv->tx_count --; + priv->tx_count--; } /* wake up queue if it was stopped */ - if (netif_queue_stopped(dev) && ! meth_tx_full(dev)) { + if (netif_queue_stopped(dev) && !meth_tx_full(dev)) { netif_wake_queue(dev); } - mace_eth_write(METH_INT_TX_EMPTY | METH_INT_TX_PKT, int_stat); + mace->eth.int_stat = METH_INT_TX_EMPTY | METH_INT_TX_PKT; spin_unlock(&priv->meth_lock); } -static void meth_error(struct net_device* dev, u32 status) +static void meth_error(struct net_device* dev, unsigned status) { struct meth_private *priv = (struct meth_private *) dev->priv; @@ -573,17 +554,16 @@ static void meth_error(struct net_device* dev, u32 status) if (status & (METH_INT_RX_UNDERFLOW)) { printk(KERN_WARNING "meth: Rx underflow\n"); spin_lock(&priv->meth_lock); - mace_eth_write(METH_INT_RX_UNDERFLOW, int_stat); + mace->eth.int_stat = METH_INT_RX_UNDERFLOW; /* more underflow interrupts will be delivered, - effectively throwing us into an infinite loop. - Thus I stop processing Rx in this case. - */ - priv->dma_ctrl&=~METH_DMA_RX_EN; - mace_eth_write(priv->dma_ctrl, dma_ctrl); + * effectively throwing us into an infinite loop. + * Thus I stop processing Rx in this case. */ + priv->dma_ctrl &= ~METH_DMA_RX_EN; + mace->eth.dma_ctrl = priv->dma_ctrl; DPRINTK("Disabled meth Rx DMA temporarily\n"); spin_unlock(&priv->meth_lock); } - mace_eth_write(METH_INT_ERROR, int_stat); + mace->eth.int_stat = METH_INT_ERROR; } /* @@ -595,12 +575,12 @@ static irqreturn_t meth_interrupt(int irq, void *dev_id, struct pt_regs *pregs) struct meth_private *priv = (struct meth_private *) dev->priv; unsigned long status; - status = mace_eth_read(int_stat); - while (status & 0xFF) { + status = mace->eth.int_stat; + while (status & 0xff) { /* First handle errors - if we get Rx underflow, - Rx DMA will be disabled, and Rx handler will reenable - it. I don't think it's possible to get Rx underflow, - without getting Rx interrupt */ + * Rx DMA will be disabled, and Rx handler will reenable + * it. I don't think it's possible to get Rx underflow, + * without getting Rx interrupt */ if (status & METH_INT_ERROR) { meth_error(dev, status); } @@ -614,7 +594,7 @@ static irqreturn_t meth_interrupt(int irq, void *dev_id, struct pt_regs *pregs) /* send it to meth_rx for handling */ meth_rx(dev, status); } - status = mace_eth_read(int_stat); + status = mace->eth.int_stat; } return IRQ_HANDLED; @@ -626,45 +606,45 @@ static irqreturn_t meth_interrupt(int irq, void *dev_id, struct pt_regs *pregs) static void meth_tx_short_prepare(struct meth_private *priv, struct sk_buff *skb) { - tx_packet *desc=&priv->tx_ring[priv->tx_write]; - int len = (skb->lenlen; + tx_packet *desc = &priv->tx_ring[priv->tx_write]; + int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len; - desc->header.raw=METH_TX_CMD_INT_EN|(len-1)|((128-len)<<16); + desc->header.raw = METH_TX_CMD_INT_EN | (len-1) | ((128-len) << 16); /* maybe I should set whole thing to 0 first... */ - memcpy(desc->data.dt+(120-len),skb->data,skb->len); - if(skb->len < len) - memset(desc->data.dt+120-len+skb->len,0,len-skb->len); + memcpy(desc->data.dt + (120 - len), skb->data, skb->len); + if (skb->len < len) + memset(desc->data.dt + 120 - len + skb->len, 0, len-skb->len); } #define TX_CATBUF1 BIT(25) static void meth_tx_1page_prepare(struct meth_private *priv, struct sk_buff *skb) { - tx_packet *desc=&priv->tx_ring[priv->tx_write]; + tx_packet *desc = &priv->tx_ring[priv->tx_write]; void *buffer_data = (void *)(((unsigned long)skb->data + 7) & ~7); int unaligned_len = (int)((unsigned long)buffer_data - (unsigned long)skb->data); int buffer_len = skb->len - unaligned_len; dma_addr_t catbuf; - desc->header.raw=METH_TX_CMD_INT_EN|TX_CATBUF1|(skb->len-1); + desc->header.raw = METH_TX_CMD_INT_EN | TX_CATBUF1 | (skb->len - 1); /* unaligned part */ - if(unaligned_len){ - memcpy(desc->data.dt+(120-unaligned_len), + if (unaligned_len) { + memcpy(desc->data.dt + (120 - unaligned_len), skb->data, unaligned_len); - desc->header.raw |= (128-unaligned_len) << 16; + desc->header.raw |= (128 - unaligned_len) << 16; } /* first page */ catbuf = dma_map_single(NULL, buffer_data, buffer_len, DMA_TO_DEVICE); desc->data.cat_buf[0].form.start_addr = catbuf >> 3; - desc->data.cat_buf[0].form.len = buffer_len-1; + desc->data.cat_buf[0].form.len = buffer_len - 1; } #define TX_CATBUF2 BIT(26) static void meth_tx_2page_prepare(struct meth_private *priv, struct sk_buff *skb) { - tx_packet *desc=&priv->tx_ring[priv->tx_write]; + tx_packet *desc = &priv->tx_ring[priv->tx_write]; void *buffer1_data = (void *)(((unsigned long)skb->data + 7) & ~7); void *buffer2_data = (void *)PAGE_ALIGN((unsigned long)skb->data); int unaligned_len = (int)((unsigned long)buffer1_data - (unsigned long)skb->data); @@ -672,44 +652,44 @@ static void meth_tx_2page_prepare(struct meth_private *priv, int buffer2_len = skb->len - buffer1_len - unaligned_len; dma_addr_t catbuf1, catbuf2; - desc->header.raw=METH_TX_CMD_INT_EN|TX_CATBUF1|TX_CATBUF2|(skb->len-1); + desc->header.raw = METH_TX_CMD_INT_EN | TX_CATBUF1 | TX_CATBUF2| (skb->len - 1); /* unaligned part */ - if(unaligned_len){ - memcpy(desc->data.dt+(120-unaligned_len), + if (unaligned_len){ + memcpy(desc->data.dt + (120 - unaligned_len), skb->data, unaligned_len); - desc->header.raw |= (128-unaligned_len) << 16; + desc->header.raw |= (128 - unaligned_len) << 16; } /* first page */ catbuf1 = dma_map_single(NULL, buffer1_data, buffer1_len, DMA_TO_DEVICE); desc->data.cat_buf[0].form.start_addr = catbuf1 >> 3; - desc->data.cat_buf[0].form.len = buffer1_len-1; + desc->data.cat_buf[0].form.len = buffer1_len - 1; /* second page */ catbuf2 = dma_map_single(NULL, buffer2_data, buffer2_len, DMA_TO_DEVICE); desc->data.cat_buf[1].form.start_addr = catbuf2 >> 3; - desc->data.cat_buf[1].form.len = buffer2_len-1; + desc->data.cat_buf[1].form.len = buffer2_len - 1; } static void meth_add_to_tx_ring(struct meth_private *priv, struct sk_buff *skb) { /* Remember the skb, so we can free it at interrupt time */ priv->tx_skbs[priv->tx_write] = skb; - if(skb->len <= 120) { + if (skb->len <= 120) { /* Whole packet fits into descriptor */ - meth_tx_short_prepare(priv,skb); - } else if(PAGE_ALIGN((unsigned long)skb->data) != - PAGE_ALIGN((unsigned long)skb->data+skb->len-1)) { + meth_tx_short_prepare(priv, skb); + } else if (PAGE_ALIGN((unsigned long)skb->data) != + PAGE_ALIGN((unsigned long)skb->data + skb->len - 1)) { /* Packet crosses page boundary */ - meth_tx_2page_prepare(priv,skb); + meth_tx_2page_prepare(priv, skb); } else { /* Packet is in one page */ - meth_tx_1page_prepare(priv,skb); + meth_tx_1page_prepare(priv, skb); } - priv->tx_write = (priv->tx_write+1) & (TX_RING_ENTRIES-1); - mace_eth_write(priv->tx_write, tx_info); - priv->tx_count ++; + priv->tx_write = (priv->tx_write + 1) & (TX_RING_ENTRIES - 1); + mace->eth.tx_info = priv->tx_write; + priv->tx_count++; } /* @@ -720,10 +700,10 @@ static int meth_tx(struct sk_buff *skb, struct net_device *dev) struct meth_private *priv = (struct meth_private *) dev->priv; unsigned long flags; - spin_lock_irqsave(&priv->meth_lock,flags); + spin_lock_irqsave(&priv->meth_lock, flags); /* Stop DMA notification */ priv->dma_ctrl &= ~(METH_DMA_TX_INT_EN); - mace_eth_write(priv->dma_ctrl, dma_ctrl); + mace->eth.dma_ctrl = priv->dma_ctrl; meth_add_to_tx_ring(priv, skb); dev->trans_start = jiffies; /* save the timestamp */ @@ -736,9 +716,9 @@ static int meth_tx(struct sk_buff *skb, struct net_device *dev) /* Restart DMA notification */ priv->dma_ctrl |= METH_DMA_TX_INT_EN; - mace_eth_write(priv->dma_ctrl, dma_ctrl); + mace->eth.dma_ctrl = priv->dma_ctrl; - spin_unlock_irqrestore(&priv->meth_lock,flags); + spin_unlock_irqrestore(&priv->meth_lock, flags); return 0; } @@ -768,11 +748,11 @@ static void meth_tx_timeout(struct net_device *dev) meth_init_rx_ring(priv); /* Restart dma */ - priv->dma_ctrl|=METH_DMA_TX_EN|METH_DMA_RX_EN|METH_DMA_RX_INT_EN; - mace_eth_write(priv->dma_ctrl, dma_ctrl); + priv->dma_ctrl |= METH_DMA_TX_EN | METH_DMA_RX_EN | METH_DMA_RX_INT_EN; + mace->eth.dma_ctrl = priv->dma_ctrl; /* Enable interrupt */ - spin_unlock_irqrestore(&priv->meth_lock,flags); + spin_unlock_irqrestore(&priv->meth_lock, flags); dev->trans_start = jiffies; netif_wake_queue(dev); @@ -785,8 +765,14 @@ static void meth_tx_timeout(struct net_device *dev) */ static int meth_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) { - DPRINTK("ioctl\n"); - return 0; + /* XXX Not yet implemented */ + switch(cmd) { + case SIOCGMIIPHY: + case SIOCGMIIREG: + case SIOCSMIIREG: + default: + return -EOPNOTSUPP; + } } /* @@ -813,7 +799,6 @@ static struct net_device *meth_init(void) dev->open = meth_open; dev->stop = meth_release; - dev->set_config = meth_config; dev->hard_start_xmit = meth_tx; dev->do_ioctl = meth_ioctl; dev->get_stats = meth_stats; @@ -834,7 +819,7 @@ static struct net_device *meth_init(void) } printk(KERN_INFO "%s: SGI MACE Ethernet rev. %d\n", - dev->name, (unsigned int)mace_eth_read(mac_ctrl) >> 29); + dev->name, (unsigned int)(mace->eth.mac_ctrl >> 29)); return 0; }