X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=drivers%2Fnet%2Fmv643xx_eth.c;h=411f4d809c477d99175ee0eaa10257938a08d407;hb=43bc926fffd92024b46cafaf7350d669ba9ca884;hp=41d38b3b3b4f2d9c185c3cf38d118f5d79dae708;hpb=a2c21200f1c81b08cb55e417b68150bba439b646;p=linux-2.6.git diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c index 41d38b3b3..411f4d809 100644 --- a/drivers/net/mv643xx_eth.c +++ b/drivers/net/mv643xx_eth.c @@ -1,15 +1,21 @@ /* - * drivers/net/mv64340_eth.c - Driver for MV64340X ethernet ports + * drivers/net/mv643xx_eth.c - Driver for MV643XX ethernet ports * Copyright (C) 2002 Matthew Dharm * * Based on the 64360 driver from: * Copyright (C) 2002 rabeeh@galileo.co.il * * Copyright (C) 2003 PMC-Sierra, Inc., - * written by Manish Lachwani (lachwani@pmc-sierra.com) + * written by Manish Lachwani * * Copyright (C) 2003 Ralf Baechle * + * Copyright (C) 2004-2006 MontaVista Software, Inc. + * Dale Farnsworth + * + * Copyright (C) 2004 Steven J. Hill + * + * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 @@ -24,274 +30,241 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include #include +#include #include -#include -#include -#include -#include +#include #include -#include +#include #include -#include -#include +#include +#include +#include +#include + #include #include #include #include +#include #include "mv643xx_eth.h" -/* - * The first part is the high level driver of the gigE ethernet ports. - */ - -/* Definition for configuring driver */ -#undef MV64340_RX_QUEUE_FILL_ON_TASK - -/* Constants */ -#define EXTRA_BYTES 32 -#define WRAP ETH_HLEN + 2 + 4 + 16 -#define BUFFER_MTU dev->mtu + WRAP -#define INT_CAUSE_UNMASK_ALL 0x0007ffff -#define INT_CAUSE_UNMASK_ALL_EXT 0x0011ffff -#ifdef MV64340_RX_FILL_ON_TASK -#define INT_CAUSE_MASK_ALL 0x00000000 -#define INT_CAUSE_CHECK_BITS INT_CAUSE_UNMASK_ALL -#define INT_CAUSE_CHECK_BITS_EXT INT_CAUSE_UNMASK_ALL_EXT -#endif - /* Static function declarations */ -static int mv64340_eth_real_open(struct net_device *); -static int mv64340_eth_real_stop(struct net_device *); -static int mv64340_eth_change_mtu(struct net_device *, int); -static struct net_device_stats *mv64340_eth_get_stats(struct net_device *); +static void eth_port_uc_addr_get(struct net_device *dev, + unsigned char *MacAddr); +static void eth_port_set_multicast_list(struct net_device *); +static void mv643xx_eth_port_enable_tx(unsigned int port_num, + unsigned int queues); +static void mv643xx_eth_port_enable_rx(unsigned int port_num, + unsigned int queues); +static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num); +static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num); +static int mv643xx_eth_open(struct net_device *); +static int mv643xx_eth_stop(struct net_device *); +static int mv643xx_eth_change_mtu(struct net_device *, int); +static struct net_device_stats *mv643xx_eth_get_stats(struct net_device *); static void eth_port_init_mac_tables(unsigned int eth_port_num); -#ifdef MV64340_NAPI -static int mv64340_poll(struct net_device *dev, int *budget); +#ifdef MV643XX_NAPI +static int mv643xx_poll(struct net_device *dev, int *budget); #endif +static int ethernet_phy_get(unsigned int eth_port_num); +static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr); +static int ethernet_phy_detect(unsigned int eth_port_num); +static int mv643xx_mdio_read(struct net_device *dev, int phy_id, int location); +static void mv643xx_mdio_write(struct net_device *dev, int phy_id, int location, int val); +static int mv643xx_eth_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); +static struct ethtool_ops mv643xx_ethtool_ops; + +static char mv643xx_driver_name[] = "mv643xx_eth"; +static char mv643xx_driver_version[] = "1.0"; + +static void __iomem *mv643xx_eth_shared_base; + +/* used to protect MV643XX_ETH_SMI_REG, which is shared across ports */ +static DEFINE_SPINLOCK(mv643xx_eth_phy_lock); + +static inline u32 mv_read(int offset) +{ + void __iomem *reg_base; -unsigned char prom_mac_addr_base[6]; -unsigned long mv64340_sram_base; + reg_base = mv643xx_eth_shared_base - MV643XX_ETH_SHARED_REGS; + + return readl(reg_base + offset); +} + +static inline void mv_write(int offset, u32 data) +{ + void __iomem *reg_base; + + reg_base = mv643xx_eth_shared_base - MV643XX_ETH_SHARED_REGS; + writel(data, reg_base + offset); +} /* * Changes MTU (maximum transfer unit) of the gigabit ethenret port * - * Input : pointer to ethernet interface network device structure - * new mtu size - * Output : 0 upon success, -EINVAL upon failure + * Input : pointer to ethernet interface network device structure + * new mtu size + * Output : 0 upon success, -EINVAL upon failure */ -static int mv64340_eth_change_mtu(struct net_device *dev, int new_mtu) +static int mv643xx_eth_change_mtu(struct net_device *dev, int new_mtu) { - struct mv64340_private *mp = netdev_priv(dev); - unsigned long flags; - - spin_lock_irqsave(&mp->lock, flags); - - if ((new_mtu > 9500) || (new_mtu < 64)) { - spin_unlock_irqrestore(&mp->lock, flags); + if ((new_mtu > 9500) || (new_mtu < 64)) return -EINVAL; - } dev->mtu = new_mtu; - /* + /* * Stop then re-open the interface. This will allocate RX skb's with * the new MTU. * There is a possible danger that the open will not successed, due * to memory is full, which might fail the open function. */ if (netif_running(dev)) { - if (mv64340_eth_real_stop(dev)) - printk(KERN_ERR - "%s: Fatal error on stopping device\n", - dev->name); - if (mv64340_eth_real_open(dev)) + mv643xx_eth_stop(dev); + if (mv643xx_eth_open(dev)) printk(KERN_ERR - "%s: Fatal error on opening device\n", - dev->name); + "%s: Fatal error on opening device\n", + dev->name); } - spin_unlock_irqrestore(&mp->lock, flags); return 0; } /* - * mv64340_eth_rx_task - * + * mv643xx_eth_rx_refill_descs + * * Fills / refills RX queue on a certain gigabit ethernet port * - * Input : pointer to ethernet interface network device structure - * Output : N/A + * Input : pointer to ethernet interface network device structure + * Output : N/A */ -static void mv64340_eth_rx_task(void *data) +static void mv643xx_eth_rx_refill_descs(struct net_device *dev) { - struct net_device *dev = (struct net_device *) data; - struct mv64340_private *mp = netdev_priv(dev); + struct mv643xx_private *mp = netdev_priv(dev); struct pkt_info pkt_info; struct sk_buff *skb; + int unaligned; - if (test_and_set_bit(0, &mp->rx_task_busy)) - panic("%s: Error in test_set_bit / clear_bit", dev->name); - - while (mp->rx_ring_skbs < (mp->rx_ring_size - 5)) { - /* The +8 for buffer allignment and another 32 byte extra */ - - skb = dev_alloc_skb(BUFFER_MTU + 8 + EXTRA_BYTES); + while (mp->rx_desc_count < mp->rx_ring_size) { + skb = dev_alloc_skb(ETH_RX_SKB_SIZE + ETH_DMA_ALIGN); if (!skb) - /* Better luck next time */ break; - mp->rx_ring_skbs++; + mp->rx_desc_count++; + unaligned = (u32)skb->data & (ETH_DMA_ALIGN - 1); + if (unaligned) + skb_reserve(skb, ETH_DMA_ALIGN - unaligned); pkt_info.cmd_sts = ETH_RX_ENABLE_INTERRUPT; - pkt_info.byte_cnt = dev->mtu + ETH_HLEN + 4 + 2 + EXTRA_BYTES; - /* Allign buffer to 8 bytes */ - if (pkt_info.byte_cnt & ~0x7) { - pkt_info.byte_cnt &= ~0x7; - pkt_info.byte_cnt += 8; - } - pkt_info.buf_ptr = - pci_map_single(0, skb->data, - dev->mtu + ETH_HLEN + 4 + 2 + EXTRA_BYTES, - PCI_DMA_FROMDEVICE); + pkt_info.byte_cnt = ETH_RX_SKB_SIZE; + pkt_info.buf_ptr = dma_map_single(NULL, skb->data, + ETH_RX_SKB_SIZE, DMA_FROM_DEVICE); pkt_info.return_info = skb; if (eth_rx_return_buff(mp, &pkt_info) != ETH_OK) { printk(KERN_ERR - "%s: Error allocating RX Ring\n", dev->name); + "%s: Error allocating RX Ring\n", dev->name); break; } - skb_reserve(skb, 2); + skb_reserve(skb, ETH_HW_IP_ALIGN); } - clear_bit(0, &mp->rx_task_busy); /* * If RX ring is empty of SKB, set a timer to try allocating - * again in a later time . + * again at a later time. */ - if ((mp->rx_ring_skbs == 0) && (mp->rx_timer_flag == 0)) { + if (mp->rx_desc_count == 0) { printk(KERN_INFO "%s: Rx ring is empty\n", dev->name); - /* After 100mSec */ - mp->timeout.expires = jiffies + (HZ / 10); + mp->timeout.expires = jiffies + (HZ / 10); /* 100 mSec */ add_timer(&mp->timeout); - mp->rx_timer_flag = 1; - } -#if MV64340_RX_QUEUE_FILL_ON_TASK - else { - /* Return interrupts */ - MV_WRITE(MV64340_ETH_INTERRUPT_MASK_REG(mp->port_num), - INT_CAUSE_UNMASK_ALL); } -#endif } /* - * mv64340_eth_rx_task_timer_wrapper - * + * mv643xx_eth_rx_refill_descs_timer_wrapper + * * Timer routine to wake up RX queue filling task. This function is * used only in case the RX queue is empty, and all alloc_skb has * failed (due to out of memory event). * - * Input : pointer to ethernet interface network device structure - * Output : N/A + * Input : pointer to ethernet interface network device structure + * Output : N/A */ -static void mv64340_eth_rx_task_timer_wrapper(unsigned long data) +static inline void mv643xx_eth_rx_refill_descs_timer_wrapper(unsigned long data) { - struct net_device *dev = (struct net_device *) data; - struct mv64340_private *mp = netdev_priv(dev); - - mp->rx_timer_flag = 0; - mv64340_eth_rx_task((void *) data); + mv643xx_eth_rx_refill_descs((struct net_device *)data); } - /* - * mv64340_eth_update_mac_address - * + * mv643xx_eth_update_mac_address + * * Update the MAC address of the port in the address table * - * Input : pointer to ethernet interface network device structure - * Output : N/A + * Input : pointer to ethernet interface network device structure + * Output : N/A */ -static void mv64340_eth_update_mac_address(struct net_device *dev) +static void mv643xx_eth_update_mac_address(struct net_device *dev) { - struct mv64340_private *mp = netdev_priv(dev); + struct mv643xx_private *mp = netdev_priv(dev); unsigned int port_num = mp->port_num; eth_port_init_mac_tables(port_num); - memcpy(mp->port_mac_addr, dev->dev_addr, 6); - eth_port_uc_addr_set(port_num, mp->port_mac_addr); + eth_port_uc_addr_set(port_num, dev->dev_addr); } /* - * mv64340_eth_set_rx_mode - * + * mv643xx_eth_set_rx_mode + * * Change from promiscuos to regular rx mode * - * Input : pointer to ethernet interface network device structure - * Output : N/A + * Input : pointer to ethernet interface network device structure + * Output : N/A */ -static void mv64340_eth_set_rx_mode(struct net_device *dev) +static void mv643xx_eth_set_rx_mode(struct net_device *dev) { - struct mv64340_private *mp = netdev_priv(dev); + struct mv643xx_private *mp = netdev_priv(dev); + u32 config_reg; - if (dev->flags & IFF_PROMISC) { - ethernet_set_config_reg - (mp->port_num, - ethernet_get_config_reg(mp->port_num) | - ETH_UNICAST_PROMISCUOUS_MODE); - } else { - ethernet_set_config_reg - (mp->port_num, - ethernet_get_config_reg(mp->port_num) & - ~(unsigned int) ETH_UNICAST_PROMISCUOUS_MODE); - } -} + config_reg = mv_read(MV643XX_ETH_PORT_CONFIG_REG(mp->port_num)); + if (dev->flags & IFF_PROMISC) + config_reg |= (u32) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE; + else + config_reg &= ~(u32) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE; + mv_write(MV643XX_ETH_PORT_CONFIG_REG(mp->port_num), config_reg); + eth_port_set_multicast_list(dev); +} /* - * mv64340_eth_set_mac_address - * + * mv643xx_eth_set_mac_address + * * Change the interface's mac address. * No special hardware thing should be done because interface is always * put in promiscuous mode. * - * Input : pointer to ethernet interface network device structure and - * a pointer to the designated entry to be added to the cache. - * Output : zero upon success, negative upon failure + * Input : pointer to ethernet interface network device structure and + * a pointer to the designated entry to be added to the cache. + * Output : zero upon success, negative upon failure */ -static int mv64340_eth_set_mac_address(struct net_device *dev, void *addr) +static int mv643xx_eth_set_mac_address(struct net_device *dev, void *addr) { int i; for (i = 0; i < 6; i++) /* +2 is for the offset of the HW addr type */ - dev->dev_addr[i] = ((unsigned char *) addr)[i + 2]; - mv64340_eth_update_mac_address(dev); + dev->dev_addr[i] = ((unsigned char *)addr)[i + 2]; + mv643xx_eth_update_mac_address(dev); return 0; } /* - * mv64340_eth_tx_timeout - * + * mv643xx_eth_tx_timeout + * * Called upon a timeout on transmitting a packet * - * Input : pointer to ethernet interface network device structure. - * Output : N/A + * Input : pointer to ethernet interface network device structure. + * Output : N/A */ -static void mv64340_eth_tx_timeout(struct net_device *dev) +static void mv643xx_eth_tx_timeout(struct net_device *dev) { - struct mv64340_private *mp = netdev_priv(dev); + struct mv643xx_private *mp = netdev_priv(dev); printk(KERN_INFO "%s: TX timeout ", dev->name); @@ -300,136 +273,145 @@ static void mv64340_eth_tx_timeout(struct net_device *dev) } /* - * mv64340_eth_tx_timeout_task + * mv643xx_eth_tx_timeout_task * * Actual routine to reset the adapter when a timeout on Tx has occurred */ -static void mv64340_eth_tx_timeout_task(struct net_device *dev) +static void mv643xx_eth_tx_timeout_task(struct net_device *dev) { - struct mv64340_private *mp = netdev_priv(dev); + struct mv643xx_private *mp = netdev_priv(dev); + + if (!netif_running(dev)) + return; + + netif_stop_queue(dev); + + eth_port_reset(mp->port_num); + eth_port_start(dev); - netif_device_detach(dev); - eth_port_reset(mp->port_num); - eth_port_start(mp); - netif_device_attach(dev); + if (mp->tx_ring_size - mp->tx_desc_count >= MAX_DESCS_PER_SKB) + netif_wake_queue(dev); } -/* - * mv64340_eth_free_tx_queue +/** + * mv643xx_eth_free_tx_descs - Free the tx desc data for completed descriptors * - * Input : dev - a pointer to the required interface - * - * Output : 0 if was able to release skb , nonzero otherwise + * If force is non-zero, frees uncompleted descriptors as well */ -static int mv64340_eth_free_tx_queue(struct net_device *dev, - unsigned int eth_int_cause_ext) +int mv643xx_eth_free_tx_descs(struct net_device *dev, int force) { - struct mv64340_private *mp = netdev_priv(dev); - struct net_device_stats *stats = &mp->stats; - struct pkt_info pkt_info; - int released = 1; + struct mv643xx_private *mp = netdev_priv(dev); + struct eth_tx_desc *desc; + u32 cmd_sts; + struct sk_buff *skb; + unsigned long flags; + int tx_index; + dma_addr_t addr; + int count; + int released = 0; + + while (mp->tx_desc_count > 0) { + spin_lock_irqsave(&mp->lock, flags); + tx_index = mp->tx_used_desc_q; + desc = &mp->p_tx_desc_area[tx_index]; + cmd_sts = desc->cmd_sts; + + if (!force && (cmd_sts & ETH_BUFFER_OWNED_BY_DMA)) { + spin_unlock_irqrestore(&mp->lock, flags); + return released; + } + + mp->tx_used_desc_q = (tx_index + 1) % mp->tx_ring_size; + mp->tx_desc_count--; - if (!(eth_int_cause_ext & (BIT0 | BIT8))) - return released; + addr = desc->buf_ptr; + count = desc->byte_cnt; + skb = mp->tx_skb[tx_index]; + if (skb) + mp->tx_skb[tx_index] = NULL; - spin_lock(&mp->lock); + spin_unlock_irqrestore(&mp->lock, flags); - /* Check only queue 0 */ - while (eth_tx_return_desc(mp, &pkt_info) == ETH_OK) { - if (pkt_info.cmd_sts & BIT0) { + if (cmd_sts & ETH_ERROR_SUMMARY) { printk("%s: Error in TX\n", dev->name); - stats->tx_errors++; + mp->stats.tx_errors++; } - /* - * If return_info is different than 0, release the skb. - * The case where return_info is not 0 is only in case - * when transmitted a scatter/gather packet, where only - * last skb releases the whole chain. - */ - if (pkt_info.return_info) { - dev_kfree_skb_irq((struct sk_buff *) - pkt_info.return_info); - released = 0; - if (skb_shinfo(pkt_info.return_info)->nr_frags) - pci_unmap_page(NULL, pkt_info.buf_ptr, - pkt_info.byte_cnt, PCI_DMA_TODEVICE); - - if (mp->tx_ring_skbs != 1) - mp->tx_ring_skbs--; - } else - pci_unmap_page(NULL, pkt_info.buf_ptr, - pkt_info.byte_cnt, PCI_DMA_TODEVICE); - - /* - * Decrement the number of outstanding skbs counter on - * the TX queue. - */ - if (mp->tx_ring_skbs == 0) - panic("ERROR - TX outstanding SKBs counter is corrupted"); + if (cmd_sts & ETH_TX_FIRST_DESC) + dma_unmap_single(NULL, addr, count, DMA_TO_DEVICE); + else + dma_unmap_page(NULL, addr, count, DMA_TO_DEVICE); - } + if (skb) + dev_kfree_skb_irq(skb); - spin_unlock(&mp->lock); + released = 1; + } return released; } +static void mv643xx_eth_free_completed_tx_descs(struct net_device *dev) +{ + struct mv643xx_private *mp = netdev_priv(dev); + + if (mv643xx_eth_free_tx_descs(dev, 0) && + mp->tx_ring_size - mp->tx_desc_count >= MAX_DESCS_PER_SKB) + netif_wake_queue(dev); +} + +static void mv643xx_eth_free_all_tx_descs(struct net_device *dev) +{ + mv643xx_eth_free_tx_descs(dev, 1); +} + /* - * mv64340_eth_receive + * mv643xx_eth_receive * * This function is forward packets that are received from the port's * queues toward kernel core or FastRoute them to another interface. * - * Input : dev - a pointer to the required interface - * max - maximum number to receive (0 means unlimted) + * Input : dev - a pointer to the required interface + * max - maximum number to receive (0 means unlimted) * - * Output : number of served packets + * Output : number of served packets */ -#ifdef MV64340_NAPI -static int mv64340_eth_receive_queue(struct net_device *dev, unsigned int max, - int budget) -#else -static int mv64340_eth_receive_queue(struct net_device *dev, unsigned int max) -#endif +static int mv643xx_eth_receive_queue(struct net_device *dev, int budget) { - struct mv64340_private *mp = netdev_priv(dev); + struct mv643xx_private *mp = netdev_priv(dev); struct net_device_stats *stats = &mp->stats; unsigned int received_packets = 0; struct sk_buff *skb; struct pkt_info pkt_info; -#ifdef MV64340_NAPI - while (eth_port_receive(mp, &pkt_info) == ETH_OK && budget > 0) { -#else - while ((--max) && eth_port_receive(mp, &pkt_info) == ETH_OK) { -#endif - mp->rx_ring_skbs--; + while (budget-- > 0 && eth_port_receive(mp, &pkt_info) == ETH_OK) { + mp->rx_desc_count--; received_packets++; -#ifdef MV64340_NAPI - budget--; -#endif - /* Update statistics. Note byte count includes 4 byte CRC count */ + + /* + * Update statistics. + * Note byte count includes 4 byte CRC count + */ stats->rx_packets++; stats->rx_bytes += pkt_info.byte_cnt; - skb = (struct sk_buff *) pkt_info.return_info; + skb = pkt_info.return_info; /* * In case received a packet without first / last bits on OR * the error summary bit is on, the packets needs to be dropeed. */ if (((pkt_info.cmd_sts - & (ETH_RX_FIRST_DESC | ETH_RX_LAST_DESC)) != - (ETH_RX_FIRST_DESC | ETH_RX_LAST_DESC)) - || (pkt_info.cmd_sts & ETH_ERROR_SUMMARY)) { + & (ETH_RX_FIRST_DESC | ETH_RX_LAST_DESC)) != + (ETH_RX_FIRST_DESC | ETH_RX_LAST_DESC)) + || (pkt_info.cmd_sts & ETH_ERROR_SUMMARY)) { stats->rx_dropped++; if ((pkt_info.cmd_sts & (ETH_RX_FIRST_DESC | - ETH_RX_LAST_DESC)) != - (ETH_RX_FIRST_DESC | ETH_RX_LAST_DESC)) { + ETH_RX_LAST_DESC)) != + (ETH_RX_FIRST_DESC | ETH_RX_LAST_DESC)) { if (net_ratelimit()) printk(KERN_ERR - "%s: Received packet spread on multiple" - " descriptors\n", - dev->name); + "%s: Received packet spread " + "on multiple descriptors\n", + dev->name); } if (pkt_info.cmd_sts & ETH_ERROR_SUMMARY) stats->rx_errors++; @@ -445,120 +427,140 @@ static int mv64340_eth_receive_queue(struct net_device *dev, unsigned int max) if (pkt_info.cmd_sts & ETH_LAYER_4_CHECKSUM_OK) { skb->ip_summed = CHECKSUM_UNNECESSARY; - skb->csum = htons((pkt_info.cmd_sts - & 0x0007fff8) >> 3); + skb->csum = htons( + (pkt_info.cmd_sts & 0x0007fff8) >> 3); } skb->protocol = eth_type_trans(skb, dev); -#ifdef MV64340_NAPI +#ifdef MV643XX_NAPI netif_receive_skb(skb); #else netif_rx(skb); #endif } + dev->last_rx = jiffies; } + mv643xx_eth_rx_refill_descs(dev); /* Fill RX ring with skb's */ return received_packets; } +/* Set the mv643xx port configuration register for the speed/duplex mode. */ +static void mv643xx_eth_update_pscr(struct net_device *dev, + struct ethtool_cmd *ecmd) +{ + struct mv643xx_private *mp = netdev_priv(dev); + int port_num = mp->port_num; + u32 o_pscr, n_pscr; + unsigned int queues; + + o_pscr = mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num)); + n_pscr = o_pscr; + + /* clear speed, duplex and rx buffer size fields */ + n_pscr &= ~(MV643XX_ETH_SET_MII_SPEED_TO_100 | + MV643XX_ETH_SET_GMII_SPEED_TO_1000 | + MV643XX_ETH_SET_FULL_DUPLEX_MODE | + MV643XX_ETH_MAX_RX_PACKET_MASK); + + if (ecmd->duplex == DUPLEX_FULL) + n_pscr |= MV643XX_ETH_SET_FULL_DUPLEX_MODE; + + if (ecmd->speed == SPEED_1000) + n_pscr |= MV643XX_ETH_SET_GMII_SPEED_TO_1000 | + MV643XX_ETH_MAX_RX_PACKET_9700BYTE; + else { + if (ecmd->speed == SPEED_100) + n_pscr |= MV643XX_ETH_SET_MII_SPEED_TO_100; + n_pscr |= MV643XX_ETH_MAX_RX_PACKET_1522BYTE; + } + + if (n_pscr != o_pscr) { + if ((o_pscr & MV643XX_ETH_SERIAL_PORT_ENABLE) == 0) + mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), + n_pscr); + else { + queues = mv643xx_eth_port_disable_tx(port_num); + + o_pscr &= ~MV643XX_ETH_SERIAL_PORT_ENABLE; + mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), + o_pscr); + mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), + n_pscr); + mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), + n_pscr); + if (queues) + mv643xx_eth_port_enable_tx(port_num, queues); + } + } +} + /* - * mv64340_eth_int_handler + * mv643xx_eth_int_handler * * Main interrupt handler for the gigbit ethernet ports * - * Input : irq - irq number (not used) - * dev_id - a pointer to the required interface's data structure - * regs - not used - * Output : N/A + * Input : irq - irq number (not used) + * dev_id - a pointer to the required interface's data structure + * regs - not used + * Output : N/A */ -static irqreturn_t mv64340_eth_int_handler(int irq, void *dev_id, - struct pt_regs *regs) +static irqreturn_t mv643xx_eth_int_handler(int irq, void *dev_id, + struct pt_regs *regs) { - struct net_device *dev = (struct net_device *) dev_id; - struct mv64340_private *mp = netdev_priv(dev); + struct net_device *dev = (struct net_device *)dev_id; + struct mv643xx_private *mp = netdev_priv(dev); u32 eth_int_cause, eth_int_cause_ext = 0; unsigned int port_num = mp->port_num; /* Read interrupt cause registers */ - eth_int_cause = MV_READ(MV64340_ETH_INTERRUPT_CAUSE_REG(port_num)) & - INT_CAUSE_UNMASK_ALL; - - if (eth_int_cause & BIT1) - eth_int_cause_ext = - MV_READ(MV64340_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num)) & - INT_CAUSE_UNMASK_ALL_EXT; + eth_int_cause = mv_read(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num)) & + ETH_INT_UNMASK_ALL; + if (eth_int_cause & ETH_INT_CAUSE_EXT) { + eth_int_cause_ext = mv_read( + MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num)) & + ETH_INT_UNMASK_ALL_EXT; + mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num), + ~eth_int_cause_ext); + } -#ifdef MV64340_NAPI - if (!(eth_int_cause & 0x0007fffd)) { - /* Dont ack the Rx interrupt */ -#endif - /* - * Clear specific ethernet port intrerrupt registers by - * acknowleding relevant bits. - */ - MV_WRITE(MV64340_ETH_INTERRUPT_CAUSE_REG(port_num), - ~eth_int_cause); - if (eth_int_cause_ext != 0x0) - MV_WRITE(MV64340_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num), - ~eth_int_cause_ext); - - /* UDP change : We may need this */ - if ((eth_int_cause_ext & 0x0000ffff) && - (mv64340_eth_free_tx_queue(dev, eth_int_cause_ext) == 0) && - (MV64340_TX_QUEUE_SIZE > mp->tx_ring_skbs + 1)) - netif_wake_queue(dev); -#ifdef MV64340_NAPI - } else { - if (netif_rx_schedule_prep(dev)) { - /* Mask all the interrupts */ - MV_WRITE(MV64340_ETH_INTERRUPT_MASK_REG(port_num),0); - MV_WRITE(MV64340_ETH_INTERRUPT_EXTEND_MASK_REG(port_num), 0); - __netif_rx_schedule(dev); + /* PHY status changed */ + if (eth_int_cause_ext & ETH_INT_CAUSE_PHY) { + struct ethtool_cmd cmd; + + if (mii_link_ok(&mp->mii)) { + mii_ethtool_gset(&mp->mii, &cmd); + mv643xx_eth_update_pscr(dev, &cmd); + mv643xx_eth_port_enable_tx(port_num, + ETH_TX_QUEUES_ENABLED); + if (!netif_carrier_ok(dev)) { + netif_carrier_on(dev); + if (mp->tx_ring_size - mp->tx_desc_count >= + MAX_DESCS_PER_SKB) + netif_wake_queue(dev); + } + } else if (netif_carrier_ok(dev)) { + netif_stop_queue(dev); + netif_carrier_off(dev); } -#else - { - if (eth_int_cause & (BIT2 | BIT11)) - mv64340_eth_receive_queue(dev, 0); - - /* - * After forwarded received packets to upper layer, add a task - * in an interrupts enabled context that refills the RX ring - * with skb's. - */ -#if MV64340_RX_QUEUE_FILL_ON_TASK - /* Unmask all interrupts on ethernet port */ - MV_WRITE(MV64340_ETH_INTERRUPT_MASK_REG(port_num), - INT_CAUSE_MASK_ALL); - queue_task(&mp->rx_task, &tq_immediate); - mark_bh(IMMEDIATE_BH); -#else - mp->rx_task.func(dev); -#endif -#endif } - /* PHY status changed */ - if (eth_int_cause_ext & (BIT16 | BIT20)) { - unsigned int phy_reg_data; - /* Check Link status on ethernet port */ - eth_port_read_smi_reg(port_num, 1, &phy_reg_data); - if (!(phy_reg_data & 0x20)) { - netif_stop_queue(dev); - } else { - netif_wake_queue(dev); +#ifdef MV643XX_NAPI + if (eth_int_cause & ETH_INT_CAUSE_RX) { + /* schedule the NAPI poll routine to maintain port */ + mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), + ETH_INT_MASK_ALL); + /* wait for previous write to complete */ + mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num)); - /* - * Start all TX queues on ethernet port. This is good in - * case of previous packets where not transmitted, due - * to link down and this command re-enables all TX - * queues. - * Note that it is possible to get a TX resource error - * interrupt after issuing this, since not all TX queues - * are enabled, or has anything to send. - */ - MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num), 1); - } + netif_rx_schedule(dev); } +#else + if (eth_int_cause & ETH_INT_CAUSE_RX) + mv643xx_eth_receive_queue(dev, INT_MAX); +#endif + if (eth_int_cause_ext & ETH_INT_CAUSE_TX) + mv643xx_eth_free_completed_tx_descs(dev); /* * If no real interrupt occured, exit. @@ -570,7 +572,7 @@ static irqreturn_t mv64340_eth_int_handler(int irq, void *dev_id, return IRQ_HANDLED; } -#ifdef MV64340_COAL +#ifdef MV643XX_COAL /* * eth_port_set_rx_coal - Sets coalescing interrupt mechanism on RX path @@ -584,9 +586,9 @@ static irqreturn_t mv64340_eth_int_handler(int irq, void *dev_id, * , and the required delay of the interrupt in usec. * * INPUT: - * unsigned int eth_port_num Ethernet port number - * unsigned int t_clk t_clk of the MV-643xx chip in HZ units - * unsigned int delay Delay in usec + * unsigned int eth_port_num Ethernet port number + * unsigned int t_clk t_clk of the MV-643xx chip in HZ units + * unsigned int delay Delay in usec * * OUTPUT: * Interrupt coalescing mechanism value is set in MV-643xx chip. @@ -596,15 +598,15 @@ static irqreturn_t mv64340_eth_int_handler(int irq, void *dev_id, * */ static unsigned int eth_port_set_rx_coal(unsigned int eth_port_num, - unsigned int t_clk, unsigned int delay) + unsigned int t_clk, unsigned int delay) { unsigned int coal = ((t_clk / 1000000) * delay) / 64; /* Set RX Coalescing mechanism */ - MV_WRITE(MV64340_ETH_SDMA_CONFIG_REG(eth_port_num), - ((coal & 0x3fff) << 8) | - (MV_READ(MV64340_ETH_SDMA_CONFIG_REG(eth_port_num)) - & 0xffc000ff)); + mv_write(MV643XX_ETH_SDMA_CONFIG_REG(eth_port_num), + ((coal & 0x3fff) << 8) | + (mv_read(MV643XX_ETH_SDMA_CONFIG_REG(eth_port_num)) + & 0xffc000ff)); return coal; } @@ -618,13 +620,13 @@ static unsigned int eth_port_set_rx_coal(unsigned int eth_port_num, * This parameter is a timeout counter, that counts in 64 t_clk * chunks ; that when timeout event occurs a maskable interrupt * occurs. - * The parameter is calculated using the t_cLK frequency of the + * The parameter is calculated using the t_cLK frequency of the * MV-643xx chip and the required delay in the interrupt in uSec * * INPUT: - * unsigned int eth_port_num Ethernet port number - * unsigned int t_clk t_clk of the MV-643xx chip in HZ units - * unsigned int delay Delay in uSeconds + * unsigned int eth_port_num Ethernet port number + * unsigned int t_clk t_clk of the MV-643xx chip in HZ units + * unsigned int delay Delay in uSeconds * * OUTPUT: * Interrupt coalescing mechanism value is set in MV-643xx chip. @@ -634,130 +636,49 @@ static unsigned int eth_port_set_rx_coal(unsigned int eth_port_num, * */ static unsigned int eth_port_set_tx_coal(unsigned int eth_port_num, - unsigned int t_clk, unsigned int delay) + unsigned int t_clk, unsigned int delay) { unsigned int coal; coal = ((t_clk / 1000000) * delay) / 64; /* Set TX Coalescing mechanism */ - MV_WRITE(MV64340_ETH_TX_FIFO_URGENT_THRESHOLD_REG(eth_port_num), - coal << 4); + mv_write(MV643XX_ETH_TX_FIFO_URGENT_THRESHOLD_REG(eth_port_num), + coal << 4); return coal; } -/* - * mv64340_eth_open - * - * This function is called when openning the network device. The function - * should initialize all the hardware, initialize cyclic Rx/Tx - * descriptors chain and buffers and allocate an IRQ to the network - * device. - * - * Input : a pointer to the network device structure - * - * Output : zero of success , nonzero if fails. - */ - -static int mv64340_eth_open(struct net_device *dev) -{ - struct mv64340_private *mp = netdev_priv(dev); - unsigned int port_num = mp->port_num; - int err = err; - - spin_lock_irq(&mp->lock); - - err = request_irq(dev->irq, mv64340_eth_int_handler, - SA_INTERRUPT | SA_SAMPLE_RANDOM, dev->name, dev); - - if (err) { - printk(KERN_ERR "Can not assign IRQ number to MV64340_eth%d\n", - port_num); - err = -EAGAIN; - goto out; - } - - if (mv64340_eth_real_open(dev)) { - printk("%s: Error opening interface\n", dev->name); - err = -EBUSY; - goto out_free; - } - - spin_unlock_irq(&mp->lock); - - return 0; - -out_free: - free_irq(dev->irq, dev); - -out: - spin_unlock_irq(&mp->lock); - - return err; -} - /* * ether_init_rx_desc_ring - Curve a Rx chain desc list and buffer in memory. * * DESCRIPTION: - * This function prepares a Rx chained list of descriptors and packet - * buffers in a form of a ring. The routine must be called after port - * initialization routine and before port start routine. - * The Ethernet SDMA engine uses CPU bus addresses to access the various - * devices in the system (i.e. DRAM). This function uses the ethernet - * struct 'virtual to physical' routine (set by the user) to set the ring - * with physical addresses. + * This function prepares a Rx chained list of descriptors and packet + * buffers in a form of a ring. The routine must be called after port + * initialization routine and before port start routine. + * The Ethernet SDMA engine uses CPU bus addresses to access the various + * devices in the system (i.e. DRAM). This function uses the ethernet + * struct 'virtual to physical' routine (set by the user) to set the ring + * with physical addresses. * * INPUT: - * struct mv64340_private *mp Ethernet Port Control srtuct. - * int rx_desc_num Number of Rx descriptors - * int rx_buff_size Size of Rx buffer - * unsigned int rx_desc_base_addr Rx descriptors memory area base addr. - * unsigned int rx_buff_base_addr Rx buffer memory area base addr. + * struct mv643xx_private *mp Ethernet Port Control srtuct. * * OUTPUT: - * The routine updates the Ethernet port control struct with information - * regarding the Rx descriptors and buffers. + * The routine updates the Ethernet port control struct with information + * regarding the Rx descriptors and buffers. * * RETURN: - * false if the given descriptors memory area is not aligned according to - * Ethernet SDMA specifications. - * true otherwise. + * None. */ -static int ether_init_rx_desc_ring(struct mv64340_private * mp, - unsigned long rx_buff_base_addr) +static void ether_init_rx_desc_ring(struct mv643xx_private *mp) { - unsigned long buffer_addr = rx_buff_base_addr; volatile struct eth_rx_desc *p_rx_desc; int rx_desc_num = mp->rx_ring_size; - unsigned long rx_desc_base_addr = (unsigned long) mp->p_rx_desc_area; - int rx_buff_size = 1536; /* Dummy, will be replaced later */ int i; - p_rx_desc = (struct eth_rx_desc *) rx_desc_base_addr; - - /* Rx desc Must be 4LW aligned (i.e. Descriptor_Address[3:0]=0000). */ - if (rx_buff_base_addr & 0xf) - return 0; - - /* Rx buffers are limited to 64K bytes and Minimum size is 8 bytes */ - if ((rx_buff_size < 8) || (rx_buff_size > RX_BUFFER_MAX_SIZE)) - return 0; - - /* Rx buffers must be 64-bit aligned. */ - if ((rx_buff_base_addr + rx_buff_size) & 0x7) - return 0; - - /* initialize the Rx descriptors ring */ + /* initialize the next_desc_ptr links in the Rx descriptors ring */ + p_rx_desc = (struct eth_rx_desc *)mp->p_rx_desc_area; for (i = 0; i < rx_desc_num; i++) { - p_rx_desc[i].buf_size = rx_buff_size; - p_rx_desc[i].byte_cnt = 0x0000; - p_rx_desc[i].cmd_sts = - ETH_BUFFER_OWNED_BY_DMA | ETH_RX_ENABLE_INTERRUPT; p_rx_desc[i].next_desc_ptr = mp->rx_desc_dma + ((i + 1) % rx_desc_num) * sizeof(struct eth_rx_desc); - p_rx_desc[i].buf_ptr = buffer_addr; - - mp->rx_skb[i] = NULL; - buffer_addr += rx_buff_size; } /* Save Rx desc pointer to driver struct. */ @@ -765,355 +686,335 @@ static int ether_init_rx_desc_ring(struct mv64340_private * mp, mp->rx_used_desc_q = 0; mp->rx_desc_area_size = rx_desc_num * sizeof(struct eth_rx_desc); - - mp->port_rx_queue_command |= 1; - - return 1; } /* * ether_init_tx_desc_ring - Curve a Tx chain desc list and buffer in memory. * * DESCRIPTION: - * This function prepares a Tx chained list of descriptors and packet - * buffers in a form of a ring. The routine must be called after port - * initialization routine and before port start routine. - * The Ethernet SDMA engine uses CPU bus addresses to access the various - * devices in the system (i.e. DRAM). This function uses the ethernet - * struct 'virtual to physical' routine (set by the user) to set the ring - * with physical addresses. + * This function prepares a Tx chained list of descriptors and packet + * buffers in a form of a ring. The routine must be called after port + * initialization routine and before port start routine. + * The Ethernet SDMA engine uses CPU bus addresses to access the various + * devices in the system (i.e. DRAM). This function uses the ethernet + * struct 'virtual to physical' routine (set by the user) to set the ring + * with physical addresses. * * INPUT: - * struct mv64340_private *mp Ethernet Port Control srtuct. - * int tx_desc_num Number of Tx descriptors - * int tx_buff_size Size of Tx buffer - * unsigned int tx_desc_base_addr Tx descriptors memory area base addr. + * struct mv643xx_private *mp Ethernet Port Control srtuct. * * OUTPUT: - * The routine updates the Ethernet port control struct with information - * regarding the Tx descriptors and buffers. + * The routine updates the Ethernet port control struct with information + * regarding the Tx descriptors and buffers. * * RETURN: - * false if the given descriptors memory area is not aligned according to - * Ethernet SDMA specifications. - * true otherwise. + * None. */ -static int ether_init_tx_desc_ring(struct mv64340_private *mp) +static void ether_init_tx_desc_ring(struct mv643xx_private *mp) { - unsigned long tx_desc_base_addr = (unsigned long) mp->p_tx_desc_area; int tx_desc_num = mp->tx_ring_size; struct eth_tx_desc *p_tx_desc; int i; - /* Tx desc Must be 4LW aligned (i.e. Descriptor_Address[3:0]=0000). */ - if (tx_desc_base_addr & 0xf) - return 0; - - /* save the first desc pointer to link with the last descriptor */ - p_tx_desc = (struct eth_tx_desc *) tx_desc_base_addr; - - /* Initialize the Tx descriptors ring */ + /* Initialize the next_desc_ptr links in the Tx descriptors ring */ + p_tx_desc = (struct eth_tx_desc *)mp->p_tx_desc_area; for (i = 0; i < tx_desc_num; i++) { - p_tx_desc[i].byte_cnt = 0x0000; - p_tx_desc[i].l4i_chk = 0x0000; - p_tx_desc[i].cmd_sts = 0x00000000; p_tx_desc[i].next_desc_ptr = mp->tx_desc_dma + ((i + 1) % tx_desc_num) * sizeof(struct eth_tx_desc); - p_tx_desc[i].buf_ptr = 0x00000000; - mp->tx_skb[i] = NULL; } - /* Set Tx desc pointer in driver struct. */ mp->tx_curr_desc_q = 0; mp->tx_used_desc_q = 0; -#ifdef MV64340_CHECKSUM_OFFLOAD_TX - mp->tx_first_desc_q = 0; -#endif - /* Init Tx ring base and size parameters */ - mp->tx_desc_area_size = tx_desc_num * sizeof(struct eth_tx_desc); - /* Add the queue to the list of Tx queues of this port */ - mp->port_tx_queue_command |= 1; + mp->tx_desc_area_size = tx_desc_num * sizeof(struct eth_tx_desc); +} + +static int mv643xx_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) +{ + struct mv643xx_private *mp = netdev_priv(dev); + int err; + + spin_lock_irq(&mp->lock); + err = mii_ethtool_sset(&mp->mii, cmd); + spin_unlock_irq(&mp->lock); - return 1; + return err; } -/* Helper function for mv64340_eth_open */ -static int mv64340_eth_real_open(struct net_device *dev) +static int mv643xx_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) { - struct mv64340_private *mp = netdev_priv(dev); - unsigned int port_num = mp->port_num; - u32 phy_reg_data; - unsigned int size; + struct mv643xx_private *mp = netdev_priv(dev); + int err; - /* Stop RX Queues */ - MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num), - 0x0000ff00); + spin_lock_irq(&mp->lock); + err = mii_ethtool_gset(&mp->mii, cmd); + spin_unlock_irq(&mp->lock); - /* Clear the ethernet port interrupts */ - MV_WRITE(MV64340_ETH_INTERRUPT_CAUSE_REG(port_num), 0); - MV_WRITE(MV64340_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num), 0); + /* The PHY may support 1000baseT_Half, but the mv643xx does not */ + cmd->supported &= ~SUPPORTED_1000baseT_Half; + cmd->advertising &= ~ADVERTISED_1000baseT_Half; - /* Unmask RX buffer and TX end interrupt */ - MV_WRITE(MV64340_ETH_INTERRUPT_MASK_REG(port_num), - INT_CAUSE_UNMASK_ALL); + return err; +} - /* Unmask phy and link status changes interrupts */ - MV_WRITE(MV64340_ETH_INTERRUPT_EXTEND_MASK_REG(port_num), - INT_CAUSE_UNMASK_ALL_EXT); +/* + * mv643xx_eth_open + * + * This function is called when openning the network device. The function + * should initialize all the hardware, initialize cyclic Rx/Tx + * descriptors chain and buffers and allocate an IRQ to the network + * device. + * + * Input : a pointer to the network device structure + * + * Output : zero of success , nonzero if fails. + */ + +static int mv643xx_eth_open(struct net_device *dev) +{ + struct mv643xx_private *mp = netdev_priv(dev); + unsigned int port_num = mp->port_num; + unsigned int size; + int err; - /* Set the MAC Address */ - memcpy(mp->port_mac_addr, dev->dev_addr, 6); + err = request_irq(dev->irq, mv643xx_eth_int_handler, + SA_SHIRQ | SA_SAMPLE_RANDOM, dev->name, dev); + if (err) { + printk(KERN_ERR "Can not assign IRQ number to MV643XX_eth%d\n", + port_num); + return -EAGAIN; + } eth_port_init(mp); - INIT_WORK(&mp->rx_task, (void (*)(void *)) mv64340_eth_rx_task, dev); - memset(&mp->timeout, 0, sizeof(struct timer_list)); - mp->timeout.function = mv64340_eth_rx_task_timer_wrapper; - mp->timeout.data = (unsigned long) dev; - - mp->rx_task_busy = 0; - mp->rx_timer_flag = 0; + mp->timeout.function = mv643xx_eth_rx_refill_descs_timer_wrapper; + mp->timeout.data = (unsigned long)dev; + + /* Allocate RX and TX skb rings */ + mp->rx_skb = kmalloc(sizeof(*mp->rx_skb) * mp->rx_ring_size, + GFP_KERNEL); + if (!mp->rx_skb) { + printk(KERN_ERR "%s: Cannot allocate Rx skb ring\n", dev->name); + err = -ENOMEM; + goto out_free_irq; + } + mp->tx_skb = kmalloc(sizeof(*mp->tx_skb) * mp->tx_ring_size, + GFP_KERNEL); + if (!mp->tx_skb) { + printk(KERN_ERR "%s: Cannot allocate Tx skb ring\n", dev->name); + err = -ENOMEM; + goto out_free_rx_skb; + } /* Allocate TX ring */ - mp->tx_ring_skbs = 0; - mp->tx_ring_size = MV64340_TX_QUEUE_SIZE; + mp->tx_desc_count = 0; size = mp->tx_ring_size * sizeof(struct eth_tx_desc); mp->tx_desc_area_size = size; - /* Assumes allocated ring is 16 bytes alligned */ - mp->p_tx_desc_area = pci_alloc_consistent(NULL, size, &mp->tx_desc_dma); + if (mp->tx_sram_size) { + mp->p_tx_desc_area = ioremap(mp->tx_sram_addr, + mp->tx_sram_size); + mp->tx_desc_dma = mp->tx_sram_addr; + } else + mp->p_tx_desc_area = dma_alloc_coherent(NULL, size, + &mp->tx_desc_dma, + GFP_KERNEL); + if (!mp->p_tx_desc_area) { printk(KERN_ERR "%s: Cannot allocate Tx Ring (size %d bytes)\n", - dev->name, size); - return -ENOMEM; + dev->name, size); + err = -ENOMEM; + goto out_free_tx_skb; } - memset((void *) mp->p_tx_desc_area, 0, mp->tx_desc_area_size); + BUG_ON((u32) mp->p_tx_desc_area & 0xf); /* check 16-byte alignment */ + memset((void *)mp->p_tx_desc_area, 0, mp->tx_desc_area_size); - /* Dummy will be replaced upon real tx */ ether_init_tx_desc_ring(mp); /* Allocate RX ring */ - /* Meantime RX Ring are fixed - but must be configurable by user */ - mp->rx_ring_size = MV64340_RX_QUEUE_SIZE; - mp->rx_ring_skbs = 0; + mp->rx_desc_count = 0; size = mp->rx_ring_size * sizeof(struct eth_rx_desc); mp->rx_desc_area_size = size; - /* Assumes allocated ring is 16 bytes aligned */ - - mp->p_rx_desc_area = pci_alloc_consistent(NULL, size, &mp->rx_desc_dma); + if (mp->rx_sram_size) { + mp->p_rx_desc_area = ioremap(mp->rx_sram_addr, + mp->rx_sram_size); + mp->rx_desc_dma = mp->rx_sram_addr; + } else + mp->p_rx_desc_area = dma_alloc_coherent(NULL, size, + &mp->rx_desc_dma, + GFP_KERNEL); if (!mp->p_rx_desc_area) { printk(KERN_ERR "%s: Cannot allocate Rx ring (size %d bytes)\n", - dev->name, size); + dev->name, size); printk(KERN_ERR "%s: Freeing previously allocated TX queues...", - dev->name); - pci_free_consistent(0, mp->tx_desc_area_size, - (void *) mp->p_tx_desc_area, - mp->tx_desc_dma); - return -ENOMEM; + dev->name); + if (mp->rx_sram_size) + iounmap(mp->p_tx_desc_area); + else + dma_free_coherent(NULL, mp->tx_desc_area_size, + mp->p_tx_desc_area, mp->tx_desc_dma); + err = -ENOMEM; + goto out_free_tx_skb; } - memset(mp->p_rx_desc_area, 0, size); + memset((void *)mp->p_rx_desc_area, 0, size); - if (!(ether_init_rx_desc_ring(mp, 0))) - panic("%s: Error initializing RX Ring", dev->name); + ether_init_rx_desc_ring(mp); - mv64340_eth_rx_task(dev); /* Fill RX ring with skb's */ + mv643xx_eth_rx_refill_descs(dev); /* Fill RX ring with skb's */ - eth_port_start(mp); + /* Clear any pending ethernet port interrupts */ + mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num), 0); + mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num), 0); + + eth_port_start(dev); /* Interrupt Coalescing */ -#ifdef MV64340_COAL +#ifdef MV643XX_COAL mp->rx_int_coal = - eth_port_set_rx_coal(port_num, 133000000, MV64340_RX_COAL); + eth_port_set_rx_coal(port_num, 133000000, MV643XX_RX_COAL); #endif mp->tx_int_coal = - eth_port_set_tx_coal (port_num, 133000000, MV64340_TX_COAL); - - /* Increase the Rx side buffer size */ + eth_port_set_tx_coal(port_num, 133000000, MV643XX_TX_COAL); - MV_WRITE (MV64340_ETH_PORT_SERIAL_CONTROL_REG(port_num), (0x5 << 17) | - (MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(port_num)) - & 0xfff1ffff)); + /* Unmask phy and link status changes interrupts */ + mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG(port_num), + ETH_INT_UNMASK_ALL_EXT); - /* Check Link status on phy */ - eth_port_read_smi_reg(port_num, 1, &phy_reg_data); - if (!(phy_reg_data & 0x20)) - netif_stop_queue(dev); - else - netif_start_queue(dev); + /* Unmask RX buffer and TX end interrupt */ + mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), ETH_INT_UNMASK_ALL); return 0; + +out_free_tx_skb: + kfree(mp->tx_skb); +out_free_rx_skb: + kfree(mp->rx_skb); +out_free_irq: + free_irq(dev->irq, dev); + + return err; } -static void mv64340_eth_free_tx_rings(struct net_device *dev) +static void mv643xx_eth_free_tx_rings(struct net_device *dev) { - struct mv64340_private *mp = netdev_priv(dev); - unsigned int port_num = mp->port_num; - unsigned int curr; + struct mv643xx_private *mp = netdev_priv(dev); /* Stop Tx Queues */ - MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num), - 0x0000ff00); - - /* Free TX rings */ - /* Free outstanding skb's on TX rings */ - for (curr = 0; - (mp->tx_ring_skbs) && (curr < MV64340_TX_QUEUE_SIZE); - curr++) { - if (mp->tx_skb[curr]) { - dev_kfree_skb(mp->tx_skb[curr]); - mp->tx_ring_skbs--; - } - } - if (mp->tx_ring_skbs != 0) - printk("%s: Error on Tx descriptor free - could not free %d" - " descriptors\n", dev->name, - mp->tx_ring_skbs); - pci_free_consistent(0, mp->tx_desc_area_size, - (void *) mp->p_tx_desc_area, mp->tx_desc_dma); + mv643xx_eth_port_disable_tx(mp->port_num); + + /* Free outstanding skb's on TX ring */ + mv643xx_eth_free_all_tx_descs(dev); + + BUG_ON(mp->tx_used_desc_q != mp->tx_curr_desc_q); + + /* Free TX ring */ + if (mp->tx_sram_size) + iounmap(mp->p_tx_desc_area); + else + dma_free_coherent(NULL, mp->tx_desc_area_size, + mp->p_tx_desc_area, mp->tx_desc_dma); } -static void mv64340_eth_free_rx_rings(struct net_device *dev) +static void mv643xx_eth_free_rx_rings(struct net_device *dev) { - struct mv64340_private *mp = netdev_priv(dev); + struct mv643xx_private *mp = netdev_priv(dev); unsigned int port_num = mp->port_num; int curr; /* Stop RX Queues */ - MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num), - 0x0000ff00); + mv643xx_eth_port_disable_rx(port_num); - /* Free RX rings */ /* Free preallocated skb's on RX rings */ - for (curr = 0; - mp->rx_ring_skbs && (curr < MV64340_RX_QUEUE_SIZE); - curr++) { + for (curr = 0; mp->rx_desc_count && curr < mp->rx_ring_size; curr++) { if (mp->rx_skb[curr]) { dev_kfree_skb(mp->rx_skb[curr]); - mp->rx_ring_skbs--; + mp->rx_desc_count--; } } - if (mp->rx_ring_skbs != 0) + if (mp->rx_desc_count) printk(KERN_ERR - "%s: Error in freeing Rx Ring. %d skb's still" - " stuck in RX Ring - ignoring them\n", dev->name, - mp->rx_ring_skbs); - pci_free_consistent(0, mp->rx_desc_area_size, - (void *) mp->p_rx_desc_area, - mp->rx_desc_dma); + "%s: Error in freeing Rx Ring. %d skb's still" + " stuck in RX Ring - ignoring them\n", dev->name, + mp->rx_desc_count); + /* Free RX ring */ + if (mp->rx_sram_size) + iounmap(mp->p_rx_desc_area); + else + dma_free_coherent(NULL, mp->rx_desc_area_size, + mp->p_rx_desc_area, mp->rx_desc_dma); } /* - * mv64340_eth_stop + * mv643xx_eth_stop * - * This function is used when closing the network device. - * It updates the hardware, + * This function is used when closing the network device. + * It updates the hardware, * release all memory that holds buffers and descriptors and release the IRQ. - * Input : a pointer to the device structure - * Output : zero if success , nonzero if fails + * Input : a pointer to the device structure + * Output : zero if success , nonzero if fails */ -/* Helper function for mv64340_eth_stop */ - -static int mv64340_eth_real_stop(struct net_device *dev) +static int mv643xx_eth_stop(struct net_device *dev) { - struct mv64340_private *mp = netdev_priv(dev); + struct mv643xx_private *mp = netdev_priv(dev); unsigned int port_num = mp->port_num; - netif_stop_queue(dev); + /* Mask all interrupts on ethernet port */ + mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), ETH_INT_MASK_ALL); + /* wait for previous write to complete */ + mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num)); - mv64340_eth_free_tx_rings(dev); - mv64340_eth_free_rx_rings(dev); +#ifdef MV643XX_NAPI + netif_poll_disable(dev); +#endif + netif_carrier_off(dev); + netif_stop_queue(dev); eth_port_reset(mp->port_num); - /* Disable ethernet port interrupts */ - MV_WRITE(MV64340_ETH_INTERRUPT_CAUSE_REG(port_num), 0); - MV_WRITE(MV64340_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num), 0); - - /* Mask RX buffer and TX end interrupt */ - MV_WRITE(MV64340_ETH_INTERRUPT_MASK_REG(port_num), 0); - - /* Mask phy and link status changes interrupts */ - MV_WRITE(MV64340_ETH_INTERRUPT_EXTEND_MASK_REG(port_num), 0); - - return 0; -} - -static int mv64340_eth_stop(struct net_device *dev) -{ - struct mv64340_private *mp = netdev_priv(dev); - - spin_lock_irq(&mp->lock); + mv643xx_eth_free_tx_rings(dev); + mv643xx_eth_free_rx_rings(dev); - mv64340_eth_real_stop(dev); +#ifdef MV643XX_NAPI + netif_poll_enable(dev); +#endif free_irq(dev->irq, dev); - spin_unlock_irq(&mp->lock); return 0; } -#ifdef MV64340_NAPI -static void mv64340_tx(struct net_device *dev) -{ - struct mv64340_private *mp = netdev_priv(dev); - struct pkt_info pkt_info; - - while (eth_tx_return_desc(mp, &pkt_info) == ETH_OK) { - if (pkt_info.return_info) { - dev_kfree_skb_irq((struct sk_buff *) - pkt_info.return_info); - if (skb_shinfo(pkt_info.return_info)->nr_frags) - pci_unmap_page(NULL, pkt_info.buf_ptr, - pkt_info.byte_cnt, - PCI_DMA_TODEVICE); - - if (mp->tx_ring_skbs != 1) - mp->tx_ring_skbs--; - } else - pci_unmap_page(NULL, pkt_info.buf_ptr, pkt_info.byte_cnt, - PCI_DMA_TODEVICE); - } - - if (netif_queue_stopped(dev) && - MV64340_TX_QUEUE_SIZE > mp->tx_ring_skbs + 1) - netif_wake_queue(dev); -} - +#ifdef MV643XX_NAPI /* - * mv64340_poll + * mv643xx_poll * * This function is used in case of NAPI */ -static int mv64340_poll(struct net_device *dev, int *budget) +static int mv643xx_poll(struct net_device *dev, int *budget) { - struct mv64340_private *mp = netdev_priv(dev); - int done = 1, orig_budget, work_done; + struct mv643xx_private *mp = netdev_priv(dev); + int done = 1, orig_budget, work_done; unsigned int port_num = mp->port_num; - unsigned long flags; -#ifdef MV64340_TX_FAST_REFILL +#ifdef MV643XX_TX_FAST_REFILL if (++mp->tx_clean_threshold > 5) { - spin_lock_irqsave(&mp->lock, flags); - mv64340_tx(dev); + mv643xx_eth_free_completed_tx_descs(dev); mp->tx_clean_threshold = 0; - spin_unlock_irqrestore(&mp->lock, flags); } #endif - if ((u32)(MV_READ(MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port_num))) != (u32)mp->rx_used_desc_q) { + if ((mv_read(MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port_num))) + != (u32) mp->rx_used_desc_q) { orig_budget = *budget; if (orig_budget > dev->quota) orig_budget = dev->quota; - work_done = mv64340_eth_receive_queue(dev, 0, orig_budget); - mp->rx_task.func(dev); + work_done = mv643xx_eth_receive_queue(dev, orig_budget); *budget -= work_done; dev->quota -= work_done; if (work_done >= orig_budget) @@ -1121,380 +1022,563 @@ static int mv64340_poll(struct net_device *dev, int *budget) } if (done) { - spin_lock_irqsave(&mp->lock, flags); - __netif_rx_complete(dev); - MV_WRITE(MV64340_ETH_INTERRUPT_CAUSE_REG(port_num),0); - MV_WRITE(MV64340_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num),0); - MV_WRITE(MV64340_ETH_INTERRUPT_MASK_REG(port_num), - INT_CAUSE_UNMASK_ALL); - MV_WRITE(MV64340_ETH_INTERRUPT_EXTEND_MASK_REG(port_num), - INT_CAUSE_UNMASK_ALL_EXT); - spin_unlock_irqrestore(&mp->lock, flags); + netif_rx_complete(dev); + mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num), 0); + mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num), 0); + mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), + ETH_INT_UNMASK_ALL); } return done ? 0 : 1; } #endif -/* - * mv64340_eth_start_xmit +/** + * has_tiny_unaligned_frags - check if skb has any small, unaligned fragments * - * This function is queues a packet in the Tx descriptor for - * required port. - * - * Input : skb - a pointer to socket buffer - * dev - a pointer to the required port - * - * Output : zero upon success + * Hardware can't handle unaligned fragments smaller than 9 bytes. + * This helper function detects that case. */ -static int mv64340_eth_start_xmit(struct sk_buff *skb, struct net_device *dev) + +static inline unsigned int has_tiny_unaligned_frags(struct sk_buff *skb) { - struct mv64340_private *mp = netdev_priv(dev); - struct net_device_stats *stats = &mp->stats; - ETH_FUNC_RET_STATUS status; - unsigned long flags; - struct pkt_info pkt_info; + unsigned int frag; + skb_frag_t *fragp; - if (netif_queue_stopped(dev)) { - printk(KERN_ERR - "%s: Tried sending packet when interface is stopped\n", - dev->name); - return 1; + for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) { + fragp = &skb_shinfo(skb)->frags[frag]; + if (fragp->size <= 8 && fragp->page_offset & 0x7) + return 1; } + return 0; +} - /* This is a hard error, log it. */ - if ((MV64340_TX_QUEUE_SIZE - mp->tx_ring_skbs) <= - (skb_shinfo(skb)->nr_frags + 1)) { - netif_stop_queue(dev); - printk(KERN_ERR - "%s: Bug in mv64340_eth - Trying to transmit when" - " queue full !\n", dev->name); - return 1; - } +/** + * eth_alloc_tx_desc_index - return the index of the next available tx desc + */ +static int eth_alloc_tx_desc_index(struct mv643xx_private *mp) +{ + int tx_desc_curr; - /* Paranoid check - this shouldn't happen */ - if (skb == NULL) { - stats->tx_dropped++; - return 1; + BUG_ON(mp->tx_desc_count >= mp->tx_ring_size); + + tx_desc_curr = mp->tx_curr_desc_q; + mp->tx_curr_desc_q = (tx_desc_curr + 1) % mp->tx_ring_size; + + BUG_ON(mp->tx_curr_desc_q == mp->tx_used_desc_q); + + return tx_desc_curr; +} + +/** + * eth_tx_fill_frag_descs - fill tx hw descriptors for an skb's fragments. + * + * Ensure the data for each fragment to be transmitted is mapped properly, + * then fill in descriptors in the tx hw queue. + */ +static void eth_tx_fill_frag_descs(struct mv643xx_private *mp, + struct sk_buff *skb) +{ + int frag; + int tx_index; + struct eth_tx_desc *desc; + + for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) { + skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag]; + + tx_index = eth_alloc_tx_desc_index(mp); + desc = &mp->p_tx_desc_area[tx_index]; + + desc->cmd_sts = ETH_BUFFER_OWNED_BY_DMA; + /* Last Frag enables interrupt and frees the skb */ + if (frag == (skb_shinfo(skb)->nr_frags - 1)) { + desc->cmd_sts |= ETH_ZERO_PADDING | + ETH_TX_LAST_DESC | + ETH_TX_ENABLE_INTERRUPT; + mp->tx_skb[tx_index] = skb; + } else + mp->tx_skb[tx_index] = 0; + + desc = &mp->p_tx_desc_area[tx_index]; + desc->l4i_chk = 0; + desc->byte_cnt = this_frag->size; + desc->buf_ptr = dma_map_page(NULL, this_frag->page, + this_frag->page_offset, + this_frag->size, + DMA_TO_DEVICE); } +} - spin_lock_irqsave(&mp->lock, flags); +/** + * eth_tx_submit_descs_for_skb - submit data from an skb to the tx hw + * + * Ensure the data for an skb to be transmitted is mapped properly, + * then fill in descriptors in the tx hw queue and start the hardware. + */ +static void eth_tx_submit_descs_for_skb(struct mv643xx_private *mp, + struct sk_buff *skb) +{ + int tx_index; + struct eth_tx_desc *desc; + u32 cmd_sts; + int length; + int nr_frags = skb_shinfo(skb)->nr_frags; - /* Update packet info data structure -- DMA owned, first last */ -#ifdef MV64340_CHECKSUM_OFFLOAD_TX - if (!skb_shinfo(skb)->nr_frags || (skb_shinfo(skb)->nr_frags > 3)) { -#endif - pkt_info.cmd_sts = ETH_TX_ENABLE_INTERRUPT | - ETH_TX_FIRST_DESC | ETH_TX_LAST_DESC; + cmd_sts = ETH_TX_FIRST_DESC | ETH_GEN_CRC | ETH_BUFFER_OWNED_BY_DMA; - pkt_info.byte_cnt = skb->len; - pkt_info.buf_ptr = pci_map_single(0, skb->data, skb->len, - PCI_DMA_TODEVICE); + tx_index = eth_alloc_tx_desc_index(mp); + desc = &mp->p_tx_desc_area[tx_index]; + if (nr_frags) { + eth_tx_fill_frag_descs(mp, skb); - pkt_info.return_info = skb; - status = eth_port_send(mp, &pkt_info); - if ((status == ETH_ERROR) || (status == ETH_QUEUE_FULL)) - printk(KERN_ERR "%s: Error on transmitting packet\n", - dev->name); - mp->tx_ring_skbs++; -#ifdef MV64340_CHECKSUM_OFFLOAD_TX + length = skb_headlen(skb); + mp->tx_skb[tx_index] = 0; } else { - unsigned int frag; - u32 ipheader; - - /* first frag which is skb header */ - pkt_info.byte_cnt = skb_headlen(skb); - pkt_info.buf_ptr = pci_map_single(0, skb->data, - skb_headlen(skb), PCI_DMA_TODEVICE); - pkt_info.return_info = 0; - ipheader = skb->nh.iph->ihl << 11; - pkt_info.cmd_sts = ETH_TX_FIRST_DESC | - ETH_GEN_TCP_UDP_CHECKSUM | - ETH_GEN_IP_V_4_CHECKSUM | - ipheader; - /* CPU already calculated pseudo header checksum. So, use it */ - pkt_info.l4i_chk = skb->h.th->check; - status = eth_port_send(mp, &pkt_info); - if (status != ETH_OK) { - if ((status == ETH_ERROR)) - printk(KERN_ERR "%s: Error on transmitting packet\n", dev->name); - if (status == ETH_QUEUE_FULL) - printk("Error on Queue Full \n"); - if (status == ETH_QUEUE_LAST_RESOURCE) - printk("Tx resource error \n"); + cmd_sts |= ETH_ZERO_PADDING | + ETH_TX_LAST_DESC | + ETH_TX_ENABLE_INTERRUPT; + length = skb->len; + mp->tx_skb[tx_index] = skb; + } + + desc->byte_cnt = length; + desc->buf_ptr = dma_map_single(NULL, skb->data, length, DMA_TO_DEVICE); + + if (skb->ip_summed == CHECKSUM_HW) { + BUG_ON(skb->protocol != ETH_P_IP); + + cmd_sts |= ETH_GEN_TCP_UDP_CHECKSUM | + ETH_GEN_IP_V_4_CHECKSUM | + skb->nh.iph->ihl << ETH_TX_IHL_SHIFT; + + switch (skb->nh.iph->protocol) { + case IPPROTO_UDP: + cmd_sts |= ETH_UDP_FRAME; + desc->l4i_chk = skb->h.uh->check; + break; + case IPPROTO_TCP: + desc->l4i_chk = skb->h.th->check; + break; + default: + BUG(); } + } else { + /* Errata BTS #50, IHL must be 5 if no HW checksum */ + cmd_sts |= 5 << ETH_TX_IHL_SHIFT; + desc->l4i_chk = 0; + } - /* Check for the remaining frags */ - for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) { - skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag]; - pkt_info.l4i_chk = 0x0000; - pkt_info.cmd_sts = 0x00000000; - - /* Last Frag enables interrupt and frees the skb */ - if (frag == (skb_shinfo(skb)->nr_frags - 1)) { - pkt_info.cmd_sts |= ETH_TX_ENABLE_INTERRUPT | - ETH_TX_LAST_DESC; - pkt_info.return_info = skb; - mp->tx_ring_skbs++; - } - else { - pkt_info.return_info = 0; - } - pkt_info.byte_cnt = this_frag->size; - if (this_frag->size < 8) - printk("%d : \n", skb_shinfo(skb)->nr_frags); - - pkt_info.buf_ptr = pci_map_page(NULL, this_frag->page, - this_frag->page_offset, - this_frag->size, PCI_DMA_TODEVICE); - - status = eth_port_send(mp, &pkt_info); - - if (status != ETH_OK) { - if ((status == ETH_ERROR)) - printk(KERN_ERR "%s: Error on transmitting packet\n", dev->name); - - if (status == ETH_QUEUE_LAST_RESOURCE) - printk("Tx resource error \n"); - - if (status == ETH_QUEUE_FULL) - printk("Queue is full \n"); - } - } - } -#endif + /* ensure all other descriptors are written before first cmd_sts */ + wmb(); + desc->cmd_sts = cmd_sts; - /* Check if TX queue can handle another skb. If not, then - * signal higher layers to stop requesting TX - */ - if (MV64340_TX_QUEUE_SIZE <= (mp->tx_ring_skbs + 1)) - /* - * Stop getting skb's from upper layers. - * Getting skb's from upper layers will be enabled again after - * packets are released. - */ + /* ensure all descriptors are written before poking hardware */ + wmb(); + mv643xx_eth_port_enable_tx(mp->port_num, ETH_TX_QUEUES_ENABLED); + + mp->tx_desc_count += nr_frags + 1; +} + +/** + * mv643xx_eth_start_xmit - queue an skb to the hardware for transmission + * + */ +static int mv643xx_eth_start_xmit(struct sk_buff *skb, struct net_device *dev) +{ + struct mv643xx_private *mp = netdev_priv(dev); + struct net_device_stats *stats = &mp->stats; + unsigned long flags; + + BUG_ON(netif_queue_stopped(dev)); + BUG_ON(skb == NULL); + + if (mp->tx_ring_size - mp->tx_desc_count < MAX_DESCS_PER_SKB) { + printk(KERN_ERR "%s: transmit with queue full\n", dev->name); netif_stop_queue(dev); + return 1; + } + + if (has_tiny_unaligned_frags(skb)) { + if ((skb_linearize(skb, GFP_ATOMIC) != 0)) { + stats->tx_dropped++; + printk(KERN_DEBUG "%s: failed to linearize tiny " + "unaligned fragment\n", dev->name); + return 1; + } + } - /* Update statistics and start of transmittion time */ - stats->tx_bytes += skb->len; + spin_lock_irqsave(&mp->lock, flags); + + eth_tx_submit_descs_for_skb(mp, skb); + stats->tx_bytes = skb->len; stats->tx_packets++; dev->trans_start = jiffies; + if (mp->tx_ring_size - mp->tx_desc_count < MAX_DESCS_PER_SKB) + netif_stop_queue(dev); + spin_unlock_irqrestore(&mp->lock, flags); return 0; /* success */ } /* - * mv64340_eth_get_stats + * mv643xx_eth_get_stats * * Returns a pointer to the interface statistics. * - * Input : dev - a pointer to the required interface + * Input : dev - a pointer to the required interface * - * Output : a pointer to the interface's statistics + * Output : a pointer to the interface's statistics */ -static struct net_device_stats *mv64340_eth_get_stats(struct net_device *dev) +static struct net_device_stats *mv643xx_eth_get_stats(struct net_device *dev) { - struct mv64340_private *mp = netdev_priv(dev); + struct mv643xx_private *mp = netdev_priv(dev); return &mp->stats; } +#ifdef CONFIG_NET_POLL_CONTROLLER +static void mv643xx_netpoll(struct net_device *netdev) +{ + struct mv643xx_private *mp = netdev_priv(netdev); + int port_num = mp->port_num; + + mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), ETH_INT_MASK_ALL); + /* wait for previous write to complete */ + mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num)); + + mv643xx_eth_int_handler(netdev->irq, netdev, NULL); + + mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), ETH_INT_UNMASK_ALL); +} +#endif + +static void mv643xx_init_ethtool_cmd(struct net_device *dev, int phy_address, + int speed, int duplex, + struct ethtool_cmd *cmd) +{ + struct mv643xx_private *mp = netdev_priv(dev); + + memset(cmd, 0, sizeof(*cmd)); + + cmd->port = PORT_MII; + cmd->transceiver = XCVR_INTERNAL; + cmd->phy_address = phy_address; + + if (speed == 0) { + cmd->autoneg = AUTONEG_ENABLE; + /* mii lib checks, but doesn't use speed on AUTONEG_ENABLE */ + cmd->speed = SPEED_100; + cmd->advertising = ADVERTISED_10baseT_Half | + ADVERTISED_10baseT_Full | + ADVERTISED_100baseT_Half | + ADVERTISED_100baseT_Full; + if (mp->mii.supports_gmii) + cmd->advertising |= ADVERTISED_1000baseT_Full; + } else { + cmd->autoneg = AUTONEG_DISABLE; + cmd->speed = speed; + cmd->duplex = duplex; + } +} + /*/ - * mv64340_eth_init - * - * First function called after registering the network device. - * It's purpose is to initialize the device as an ethernet device, - * fill the structure that was given in registration with pointers - * to functions, and setting the MAC address of the interface - * - * Input : number of port to initialize - * Output : -ENONMEM if failed , 0 if success + * mv643xx_eth_probe + * + * First function called after registering the network device. + * It's purpose is to initialize the device as an ethernet device, + * fill the ethernet device structure with pointers * to functions, + * and set the MAC address of the interface + * + * Input : struct device * + * Output : -ENOMEM if failed , 0 if success */ -static struct net_device *mv64340_eth_init(int port_num) +static int mv643xx_eth_probe(struct platform_device *pdev) { - struct mv64340_private *mp; + struct mv643xx_eth_platform_data *pd; + int port_num = pdev->id; + struct mv643xx_private *mp; struct net_device *dev; + u8 *p; + struct resource *res; int err; + struct ethtool_cmd cmd; + int duplex = DUPLEX_HALF; + int speed = 0; /* default to auto-negotiation */ - dev = alloc_etherdev(sizeof(struct mv64340_private)); + dev = alloc_etherdev(sizeof(struct mv643xx_private)); if (!dev) - return NULL; + return -ENOMEM; + + platform_set_drvdata(pdev, dev); mp = netdev_priv(dev); - dev->irq = ETH_PORT0_IRQ_NUM + port_num; + res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + BUG_ON(!res); + dev->irq = res->start; + + mp->port_num = port_num; - dev->open = mv64340_eth_open; - dev->stop = mv64340_eth_stop; - dev->hard_start_xmit = mv64340_eth_start_xmit; - dev->get_stats = mv64340_eth_get_stats; - dev->set_mac_address = mv64340_eth_set_mac_address; - dev->set_multicast_list = mv64340_eth_set_rx_mode; + dev->open = mv643xx_eth_open; + dev->stop = mv643xx_eth_stop; + dev->hard_start_xmit = mv643xx_eth_start_xmit; + dev->get_stats = mv643xx_eth_get_stats; + dev->set_mac_address = mv643xx_eth_set_mac_address; + dev->set_multicast_list = mv643xx_eth_set_rx_mode; /* No need to Tx Timeout */ - dev->tx_timeout = mv64340_eth_tx_timeout; -#ifdef MV64340_NAPI - dev->poll = mv64340_poll; - dev->weight = 64; + dev->tx_timeout = mv643xx_eth_tx_timeout; +#ifdef MV643XX_NAPI + dev->poll = mv643xx_poll; + dev->weight = 64; +#endif + +#ifdef CONFIG_NET_POLL_CONTROLLER + dev->poll_controller = mv643xx_netpoll; #endif dev->watchdog_timeo = 2 * HZ; - dev->tx_queue_len = MV64340_TX_QUEUE_SIZE; + dev->tx_queue_len = mp->tx_ring_size; dev->base_addr = 0; - dev->change_mtu = mv64340_eth_change_mtu; + dev->change_mtu = mv643xx_eth_change_mtu; + dev->do_ioctl = mv643xx_eth_do_ioctl; + SET_ETHTOOL_OPS(dev, &mv643xx_ethtool_ops); -#ifdef MV64340_CHECKSUM_OFFLOAD_TX +#ifdef MV643XX_CHECKSUM_OFFLOAD_TX #ifdef MAX_SKB_FRAGS -#ifndef CONFIG_JAGUAR_DMALOW - /* - * Zero copy can only work if we use Discovery II memory. Else, we will - * have to map the buffers to ISA memory which is only 16 MB - */ - dev->features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_HW_CSUM; -#endif + /* + * Zero copy can only work if we use Discovery II memory. Else, we will + * have to map the buffers to ISA memory which is only 16 MB + */ + dev->features = NETIF_F_SG | NETIF_F_IP_CSUM; #endif #endif - mp->port_num = port_num; - /* Configure the timeout task */ - INIT_WORK(&mp->tx_timeout_task, - (void (*)(void *))mv64340_eth_tx_timeout_task, dev); + INIT_WORK(&mp->tx_timeout_task, + (void (*)(void *))mv643xx_eth_tx_timeout_task, dev); spin_lock_init(&mp->lock); - /* set MAC addresses */ - memcpy(dev->dev_addr, prom_mac_addr_base, 6); - dev->dev_addr[5] += port_num; + /* set default config values */ + eth_port_uc_addr_get(dev, dev->dev_addr); + mp->rx_ring_size = MV643XX_ETH_PORT_DEFAULT_RECEIVE_QUEUE_SIZE; + mp->tx_ring_size = MV643XX_ETH_PORT_DEFAULT_TRANSMIT_QUEUE_SIZE; + + pd = pdev->dev.platform_data; + if (pd) { + if (pd->mac_addr) + memcpy(dev->dev_addr, pd->mac_addr, 6); + + if (pd->phy_addr || pd->force_phy_addr) + ethernet_phy_set(port_num, pd->phy_addr); + + if (pd->rx_queue_size) + mp->rx_ring_size = pd->rx_queue_size; + + if (pd->tx_queue_size) + mp->tx_ring_size = pd->tx_queue_size; + + if (pd->tx_sram_size) { + mp->tx_sram_size = pd->tx_sram_size; + mp->tx_sram_addr = pd->tx_sram_addr; + } + + if (pd->rx_sram_size) { + mp->rx_sram_size = pd->rx_sram_size; + mp->rx_sram_addr = pd->rx_sram_addr; + } + + duplex = pd->duplex; + speed = pd->speed; + } + + /* Hook up MII support for ethtool */ + mp->mii.dev = dev; + mp->mii.mdio_read = mv643xx_mdio_read; + mp->mii.mdio_write = mv643xx_mdio_write; + mp->mii.phy_id = ethernet_phy_get(port_num); + mp->mii.phy_id_mask = 0x3f; + mp->mii.reg_num_mask = 0x1f; + + err = ethernet_phy_detect(port_num); + if (err) { + pr_debug("MV643xx ethernet port %d: " + "No PHY detected at addr %d\n", + port_num, ethernet_phy_get(port_num)); + goto out; + } + + ethernet_phy_reset(port_num); + mp->mii.supports_gmii = mii_check_gmii_support(&mp->mii); + mv643xx_init_ethtool_cmd(dev, mp->mii.phy_id, speed, duplex, &cmd); + mv643xx_eth_update_pscr(dev, &cmd); + mv643xx_set_settings(dev, &cmd); + SET_MODULE_OWNER(dev); + SET_NETDEV_DEV(dev, &pdev->dev); err = register_netdev(dev); if (err) - goto out_free_dev; + goto out; - printk(KERN_NOTICE "%s: port %d with MAC address %02x:%02x:%02x:%02x:%02x:%02x\n", - dev->name, port_num, - dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2], - dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]); + p = dev->dev_addr; + printk(KERN_NOTICE + "%s: port %d with MAC address %02x:%02x:%02x:%02x:%02x:%02x\n", + dev->name, port_num, p[0], p[1], p[2], p[3], p[4], p[5]); if (dev->features & NETIF_F_SG) - printk("Scatter Gather Enabled "); + printk(KERN_NOTICE "%s: Scatter Gather Enabled\n", dev->name); if (dev->features & NETIF_F_IP_CSUM) - printk("TX TCP/IP Checksumming Supported \n"); + printk(KERN_NOTICE "%s: TX TCP/IP Checksumming Supported\n", + dev->name); - printk("RX TCP/UDP Checksum Offload ON, \n"); - printk("TX and RX Interrupt Coalescing ON \n"); +#ifdef MV643XX_CHECKSUM_OFFLOAD_TX + printk(KERN_NOTICE "%s: RX TCP/UDP Checksum Offload ON \n", dev->name); +#endif -#ifdef MV64340_NAPI - printk("RX NAPI Enabled \n"); +#ifdef MV643XX_COAL + printk(KERN_NOTICE "%s: TX and RX Interrupt Coalescing ON \n", + dev->name); #endif - return dev; +#ifdef MV643XX_NAPI + printk(KERN_NOTICE "%s: RX NAPI Enabled \n", dev->name); +#endif + + if (mp->tx_sram_size > 0) + printk(KERN_NOTICE "%s: Using SRAM\n", dev->name); + + return 0; -out_free_dev: +out: free_netdev(dev); - return NULL; + return err; } -static void mv64340_eth_remove(struct net_device *dev) +static int mv643xx_eth_remove(struct platform_device *pdev) { - struct mv64340_private *mp = netdev_priv(dev); + struct net_device *dev = platform_get_drvdata(pdev); unregister_netdev(dev); flush_scheduled_work(); + free_netdev(dev); + platform_set_drvdata(pdev, NULL); + return 0; +} + +static int mv643xx_eth_shared_probe(struct platform_device *pdev) +{ + struct resource *res; + + printk(KERN_NOTICE "MV-643xx 10/100/1000 Ethernet Driver\n"); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res == NULL) + return -ENODEV; + + mv643xx_eth_shared_base = ioremap(res->start, + MV643XX_ETH_SHARED_REGS_SIZE); + if (mv643xx_eth_shared_base == NULL) + return -ENOMEM; + + return 0; + } -static struct net_device *mv64340_dev0; -static struct net_device *mv64340_dev1; -static struct net_device *mv64340_dev2; +static int mv643xx_eth_shared_remove(struct platform_device *pdev) +{ + iounmap(mv643xx_eth_shared_base); + mv643xx_eth_shared_base = NULL; + + return 0; +} + +static struct platform_driver mv643xx_eth_driver = { + .probe = mv643xx_eth_probe, + .remove = mv643xx_eth_remove, + .driver = { + .name = MV643XX_ETH_NAME, + }, +}; + +static struct platform_driver mv643xx_eth_shared_driver = { + .probe = mv643xx_eth_shared_probe, + .remove = mv643xx_eth_shared_remove, + .driver = { + .name = MV643XX_ETH_SHARED_NAME, + }, +}; /* - * mv64340_init_module + * mv643xx_init_module * * Registers the network drivers into the Linux kernel * - * Input : N/A + * Input : N/A * - * Output : N/A + * Output : N/A */ -static int __init mv64340_init_module(void) +static int __init mv643xx_init_module(void) { - printk(KERN_NOTICE "MV-643xx 10/100/1000 Ethernet Driver\n"); + int rc; -#ifdef CONFIG_MV643XX_ETH_0 - mv64340_dev0 = mv64340_eth_init(0); - if (!mv64340_dev0) { - printk(KERN_ERR - "Error registering MV-64360 ethernet port 0\n"); + rc = platform_driver_register(&mv643xx_eth_shared_driver); + if (!rc) { + rc = platform_driver_register(&mv643xx_eth_driver); + if (rc) + platform_driver_unregister(&mv643xx_eth_shared_driver); } -#endif -#ifdef CONFIG_MV643XX_ETH_1 - mv64340_dev1 = mv64340_eth_init(1); - if (!mv64340_dev1) { - printk(KERN_ERR - "Error registering MV-64360 ethernet port 1\n"); - } -#endif -#ifdef CONFIG_MV643XX_ETH_2 - mv64340_dev2 = mv64340_eth_init(2); - if (!mv64340_dev2) { - printk(KERN_ERR - "Error registering MV-64360 ethernet port 2\n"); - } -#endif - return 0; + return rc; } /* - * mv64340_cleanup_module + * mv643xx_cleanup_module * * Registers the network drivers into the Linux kernel * - * Input : N/A + * Input : N/A * - * Output : N/A + * Output : N/A */ -static void __exit mv64340_cleanup_module(void) +static void __exit mv643xx_cleanup_module(void) { - if (mv64340_dev2) - mv64340_eth_remove(mv64340_dev2); - if (mv64340_dev1) - mv64340_eth_remove(mv64340_dev1); - if (mv64340_dev0) - mv64340_eth_remove(mv64340_dev0); + platform_driver_unregister(&mv643xx_eth_driver); + platform_driver_unregister(&mv643xx_eth_shared_driver); } -module_init(mv64340_init_module); -module_exit(mv64340_cleanup_module); +module_init(mv643xx_init_module); +module_exit(mv643xx_cleanup_module); MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Rabeeh Khoury, Assaf Hoffman, Matthew Dharm and Manish Lachwani"); -MODULE_DESCRIPTION("Ethernet driver for Marvell MV64340"); +MODULE_AUTHOR( "Rabeeh Khoury, Assaf Hoffman, Matthew Dharm, Manish Lachwani" + " and Dale Farnsworth"); +MODULE_DESCRIPTION("Ethernet driver for Marvell MV643XX"); /* - * The second part is the low level driver of the gigE ethernet ports. + * The second part is the low level driver of the gigE ethernet ports. */ /* * Marvell's Gigabit Ethernet controller low level driver * * DESCRIPTION: - * This file introduce low level API to Marvell's Gigabit Ethernet + * This file introduce low level API to Marvell's Gigabit Ethernet * controller. This Gigabit Ethernet Controller driver API controls * 1) Operations (i.e. port init, start, reset etc'). * 2) Data flow (i.e. port send, receive etc'). * Each Gigabit Ethernet port is controlled via - * struct mv64340_private. + * struct mv643xx_private. * This struct includes user configuration information as well as * driver internal data needed for its operations. * - * Supported Features: + * Supported Features: * - This low level driver is OS independent. Allocating memory for * the descriptor rings and buffers are not within the scope of * this driver. @@ -1511,12 +1595,12 @@ MODULE_DESCRIPTION("Ethernet driver for Marvell MV64340"); * - PHY access and control API. * - Port control register configuration API. * - Full control over Unicast and Multicast MAC configurations. - * + * * Operation flow: * * Initialization phase - * This phase complete the initialization of the the mv64340_private - * struct. + * This phase complete the initialization of the the + * mv643xx_private struct. * User information regarding port configuration has to be set * prior to calling the port initialization routine. * @@ -1525,7 +1609,7 @@ MODULE_DESCRIPTION("Ethernet driver for Marvell MV64340"); * access to DRAM and internal SRAM memory spaces. * * Driver ring initialization - * Allocating memory for the descriptor rings and buffers is not + * Allocating memory for the descriptor rings and buffers is not * within the scope of this driver. Thus, the user is required to * allocate memory for the descriptors ring and buffers. Those * memory parameters are used by the Rx and Tx ring initialization @@ -1533,250 +1617,198 @@ MODULE_DESCRIPTION("Ethernet driver for Marvell MV64340"); * of a ring. * Note: Pay special attention to alignment issues when using * cached descriptors/buffers. In this phase the driver store - * information in the mv64340_private struct regarding each queue + * information in the mv643xx_private struct regarding each queue * ring. * - * Driver start + * Driver start * This phase prepares the Ethernet port for Rx and Tx activity. - * It uses the information stored in the mv64340_private struct to + * It uses the information stored in the mv643xx_private struct to * initialize the various port registers. * * Data flow: * All packet references to/from the driver are done using - * struct pkt_info. - * This struct is a unified struct used with Rx and Tx operations. + * struct pkt_info. + * This struct is a unified struct used with Rx and Tx operations. * This way the user is not required to be familiar with neither * Tx nor Rx descriptors structures. * The driver's descriptors rings are management by indexes. * Those indexes controls the ring resources and used to indicate * a SW resource error: - * 'current' - * This index points to the current available resource for use. For - * example in Rx process this index will point to the descriptor - * that will be passed to the user upon calling the receive routine. - * In Tx process, this index will point to the descriptor + * 'current' + * This index points to the current available resource for use. For + * example in Rx process this index will point to the descriptor + * that will be passed to the user upon calling the receive + * routine. In Tx process, this index will point to the descriptor * that will be assigned with the user packet info and transmitted. - * 'used' - * This index points to the descriptor that need to restore its + * 'used' + * This index points to the descriptor that need to restore its * resources. For example in Rx process, using the Rx buffer return * API will attach the buffer returned in packet info to the * descriptor pointed by 'used'. In Tx process, using the Tx * descriptor return will merely return the user packet info with - * the command status of the transmitted buffer pointed by the + * the command status of the transmitted buffer pointed by the * 'used' index. Nevertheless, it is essential to use this routine * to update the 'used' index. * 'first' - * This index supports Tx Scatter-Gather. It points to the first - * descriptor of a packet assembled of multiple buffers. For example - * when in middle of Such packet we have a Tx resource error the - * 'curr' index get the value of 'first' to indicate that the ring - * returned to its state before trying to transmit this packet. + * This index supports Tx Scatter-Gather. It points to the first + * descriptor of a packet assembled of multiple buffers. For + * example when in middle of Such packet we have a Tx resource + * error the 'curr' index get the value of 'first' to indicate + * that the ring returned to its state before trying to transmit + * this packet. * * Receive operation: * The eth_port_receive API set the packet information struct, - * passed by the caller, with received information from the - * 'current' SDMA descriptor. + * passed by the caller, with received information from the + * 'current' SDMA descriptor. * It is the user responsibility to return this resource back * to the Rx descriptor ring to enable the reuse of this source. * Return Rx resource is done using the eth_rx_return_buff API. * - * Transmit operation: - * The eth_port_send API supports Scatter-Gather which enables to - * send a packet spanned over multiple buffers. This means that - * for each packet info structure given by the user and put into - * the Tx descriptors ring, will be transmitted only if the 'LAST' - * bit will be set in the packet info command status field. This - * API also consider restriction regarding buffer alignments and - * sizes. - * The user must return a Tx resource after ensuring the buffer - * has been transmitted to enable the Tx ring indexes to update. - * - * BOARD LAYOUT - * This device is on-board. No jumper diagram is necessary. - * - * EXTERNAL INTERFACE - * - * Prior to calling the initialization routine eth_port_init() the user - * must set the following fields under mv64340_private struct: - * port_num User Ethernet port number. - * port_mac_addr[6] User defined port MAC address. - * port_config User port configuration value. - * port_config_extend User port config extend value. - * port_sdma_config User port SDMA config value. - * port_serial_control User port serial control value. - * - * This driver introduce a set of default values: - * PORT_CONFIG_VALUE Default port configuration value - * PORT_CONFIG_EXTEND_VALUE Default port extend configuration value - * PORT_SDMA_CONFIG_VALUE Default sdma control value - * PORT_SERIAL_CONTROL_VALUE Default port serial control value + * Prior to calling the initialization routine eth_port_init() the user + * must set the following fields under mv643xx_private struct: + * port_num User Ethernet port number. + * port_config User port configuration value. + * port_config_extend User port config extend value. + * port_sdma_config User port SDMA config value. + * port_serial_control User port serial control value. * * This driver data flow is done using the struct pkt_info which - * is a unified struct for Rx and Tx operations: + * is a unified struct for Rx and Tx operations: * * byte_cnt Tx/Rx descriptor buffer byte count. * l4i_chk CPU provided TCP Checksum. For Tx operation - * only. + * only. * cmd_sts Tx/Rx descriptor command status. * buf_ptr Tx/Rx descriptor buffer pointer. * return_info Tx/Rx user resource return information. */ -/* defines */ -/* SDMA command macros */ -#define ETH_ENABLE_TX_QUEUE(eth_port) \ - MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(eth_port), 1) - -#define ETH_DISABLE_TX_QUEUE(eth_port) \ - MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(eth_port), \ - (1 << 8)) - -#define ETH_ENABLE_RX_QUEUE(rx_queue, eth_port) \ - MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(eth_port), \ - (1 << rx_queue)) - -#define ETH_DISABLE_RX_QUEUE(rx_queue, eth_port) \ - MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(eth_port), \ - (1 << (8 + rx_queue))) - -#define LINK_UP_TIMEOUT 100000 -#define PHY_BUSY_TIMEOUT 10000000 - -/* locals */ - /* PHY routines */ static int ethernet_phy_get(unsigned int eth_port_num); +static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr); /* Ethernet Port routines */ -static int eth_port_uc_addr(unsigned int eth_port_num, unsigned char uc_nibble, - int option); +static void eth_port_set_filter_table_entry(int table, unsigned char entry); /* * eth_port_init - Initialize the Ethernet port driver * * DESCRIPTION: - * This function prepares the ethernet port to start its activity: - * 1) Completes the ethernet port driver struct initialization toward port - * start routine. - * 2) Resets the device to a quiescent state in case of warm reboot. - * 3) Enable SDMA access to all four DRAM banks as well as internal SRAM. - * 4) Clean MAC tables. The reset status of those tables is unknown. - * 5) Set PHY address. - * Note: Call this routine prior to eth_port_start routine and after - * setting user values in the user fields of Ethernet port control - * struct. + * This function prepares the ethernet port to start its activity: + * 1) Completes the ethernet port driver struct initialization toward port + * start routine. + * 2) Resets the device to a quiescent state in case of warm reboot. + * 3) Enable SDMA access to all four DRAM banks as well as internal SRAM. + * 4) Clean MAC tables. The reset status of those tables is unknown. + * 5) Set PHY address. + * Note: Call this routine prior to eth_port_start routine and after + * setting user values in the user fields of Ethernet port control + * struct. * * INPUT: - * struct mv64340_private *mp Ethernet port control struct + * struct mv643xx_private *mp Ethernet port control struct * * OUTPUT: - * See description. + * See description. * * RETURN: - * None. + * None. */ -static void eth_port_init(struct mv64340_private * mp) -{ - mp->port_config = PORT_CONFIG_VALUE; - mp->port_config_extend = PORT_CONFIG_EXTEND_VALUE; -#if defined(__BIG_ENDIAN) - mp->port_sdma_config = PORT_SDMA_CONFIG_VALUE; -#elif defined(__LITTLE_ENDIAN) - mp->port_sdma_config = PORT_SDMA_CONFIG_VALUE | - ETH_BLM_RX_NO_SWAP | ETH_BLM_TX_NO_SWAP; -#else -#error One of __LITTLE_ENDIAN or __BIG_ENDIAN must be defined! -#endif - mp->port_serial_control = PORT_SERIAL_CONTROL_VALUE; - - mp->port_rx_queue_command = 0; - mp->port_tx_queue_command = 0; - +static void eth_port_init(struct mv643xx_private *mp) +{ mp->rx_resource_err = 0; - mp->tx_resource_err = 0; eth_port_reset(mp->port_num); eth_port_init_mac_tables(mp->port_num); - - ethernet_phy_reset(mp->port_num); } /* * eth_port_start - Start the Ethernet port activity. * * DESCRIPTION: - * This routine prepares the Ethernet port for Rx and Tx activity: - * 1. Initialize Tx and Rx Current Descriptor Pointer for each queue that - * has been initialized a descriptor's ring (using - * ether_init_tx_desc_ring for Tx and ether_init_rx_desc_ring for Rx) - * 2. Initialize and enable the Ethernet configuration port by writing to - * the port's configuration and command registers. - * 3. Initialize and enable the SDMA by writing to the SDMA's - * configuration and command registers. After completing these steps, - * the ethernet port SDMA can starts to perform Rx and Tx activities. - * - * Note: Each Rx and Tx queue descriptor's list must be initialized prior - * to calling this function (use ether_init_tx_desc_ring for Tx queues - * and ether_init_rx_desc_ring for Rx queues). + * This routine prepares the Ethernet port for Rx and Tx activity: + * 1. Initialize Tx and Rx Current Descriptor Pointer for each queue that + * has been initialized a descriptor's ring (using + * ether_init_tx_desc_ring for Tx and ether_init_rx_desc_ring for Rx) + * 2. Initialize and enable the Ethernet configuration port by writing to + * the port's configuration and command registers. + * 3. Initialize and enable the SDMA by writing to the SDMA's + * configuration and command registers. After completing these steps, + * the ethernet port SDMA can starts to perform Rx and Tx activities. + * + * Note: Each Rx and Tx queue descriptor's list must be initialized prior + * to calling this function (use ether_init_tx_desc_ring for Tx queues + * and ether_init_rx_desc_ring for Rx queues). * * INPUT: - * struct mv64340_private *mp Ethernet port control struct + * dev - a pointer to the required interface * * OUTPUT: - * Ethernet port is ready to receive and transmit. + * Ethernet port is ready to receive and transmit. * * RETURN: - * false if the port PHY is not up. - * true otherwise. + * None. */ -static int eth_port_start(struct mv64340_private *mp) +static void eth_port_start(struct net_device *dev) { - unsigned int eth_port_num = mp->port_num; + struct mv643xx_private *mp = netdev_priv(dev); + unsigned int port_num = mp->port_num; int tx_curr_desc, rx_curr_desc; - unsigned int phy_reg_data; + u32 pscr; + struct ethtool_cmd ethtool_cmd; /* Assignment of Tx CTRP of given queue */ tx_curr_desc = mp->tx_curr_desc_q; - MV_WRITE(MV64340_ETH_TX_CURRENT_QUEUE_DESC_PTR_0(eth_port_num), - (struct eth_tx_desc *) mp->tx_desc_dma + tx_curr_desc); + mv_write(MV643XX_ETH_TX_CURRENT_QUEUE_DESC_PTR_0(port_num), + (u32)((struct eth_tx_desc *)mp->tx_desc_dma + tx_curr_desc)); /* Assignment of Rx CRDP of given queue */ rx_curr_desc = mp->rx_curr_desc_q; - MV_WRITE(MV64340_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(eth_port_num), - (struct eth_rx_desc *) mp->rx_desc_dma + rx_curr_desc); + mv_write(MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port_num), + (u32)((struct eth_rx_desc *)mp->rx_desc_dma + rx_curr_desc)); /* Add the assigned Ethernet address to the port's address table */ - eth_port_uc_addr_set(mp->port_num, mp->port_mac_addr); + eth_port_uc_addr_set(port_num, dev->dev_addr); /* Assign port configuration and command. */ - MV_WRITE(MV64340_ETH_PORT_CONFIG_REG(eth_port_num), - mp->port_config); + mv_write(MV643XX_ETH_PORT_CONFIG_REG(port_num), + MV643XX_ETH_PORT_CONFIG_DEFAULT_VALUE); + + mv_write(MV643XX_ETH_PORT_CONFIG_EXTEND_REG(port_num), + MV643XX_ETH_PORT_CONFIG_EXTEND_DEFAULT_VALUE); + + pscr = mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num)); - MV_WRITE(MV64340_ETH_PORT_CONFIG_EXTEND_REG(eth_port_num), - mp->port_config_extend); + pscr &= ~(MV643XX_ETH_SERIAL_PORT_ENABLE | MV643XX_ETH_FORCE_LINK_PASS); + mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), pscr); - MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(eth_port_num), - mp->port_serial_control); + pscr |= MV643XX_ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL | + MV643XX_ETH_DISABLE_AUTO_NEG_SPEED_GMII | + MV643XX_ETH_DISABLE_AUTO_NEG_FOR_DUPLX | + MV643XX_ETH_DO_NOT_FORCE_LINK_FAIL | + MV643XX_ETH_SERIAL_PORT_CONTROL_RESERVED; - MV_SET_REG_BITS(MV64340_ETH_PORT_SERIAL_CONTROL_REG(eth_port_num), - ETH_SERIAL_PORT_ENABLE); + mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), pscr); + + pscr |= MV643XX_ETH_SERIAL_PORT_ENABLE; + mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), pscr); /* Assign port SDMA configuration */ - MV_WRITE(MV64340_ETH_SDMA_CONFIG_REG(eth_port_num), - mp->port_sdma_config); + mv_write(MV643XX_ETH_SDMA_CONFIG_REG(port_num), + MV643XX_ETH_PORT_SDMA_CONFIG_DEFAULT_VALUE); /* Enable port Rx. */ - MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(eth_port_num), - mp->port_rx_queue_command); - - /* Check if link is up */ - eth_port_read_smi_reg(eth_port_num, 1, &phy_reg_data); + mv643xx_eth_port_enable_rx(port_num, ETH_RX_QUEUES_ENABLED); - if (!(phy_reg_data & 0x20)) - return 0; + /* Disable port bandwidth limits by clearing MTU register */ + mv_write(MV643XX_ETH_MAXIMUM_TRANSMIT_UNIT(port_num), 0); - return 1; + /* save phy settings across reset */ + mv643xx_get_settings(dev, ðtool_cmd); + ethernet_phy_reset(mp->port_num); + mv643xx_set_settings(dev, ðtool_cmd); } /* @@ -1786,120 +1818,277 @@ static int eth_port_start(struct mv64340_private *mp) * This function Set the port Ethernet MAC address. * * INPUT: - * unsigned int eth_port_num Port number. - * char * p_addr Address to be set + * unsigned int eth_port_num Port number. + * char * p_addr Address to be set * * OUTPUT: - * Set MAC address low and high registers. also calls eth_port_uc_addr() - * To set the unicast table with the proper information. + * Set MAC address low and high registers. also calls + * eth_port_set_filter_table_entry() to set the unicast + * table with the proper information. * * RETURN: * N/A. * */ static void eth_port_uc_addr_set(unsigned int eth_port_num, - unsigned char *p_addr) + unsigned char *p_addr) { unsigned int mac_h; unsigned int mac_l; + int table; mac_l = (p_addr[4] << 8) | (p_addr[5]); - mac_h = (p_addr[0] << 24) | (p_addr[1] << 16) | - (p_addr[2] << 8) | (p_addr[3] << 0); + mac_h = (p_addr[0] << 24) | (p_addr[1] << 16) | (p_addr[2] << 8) | + (p_addr[3] << 0); - MV_WRITE(MV64340_ETH_MAC_ADDR_LOW(eth_port_num), mac_l); - MV_WRITE(MV64340_ETH_MAC_ADDR_HIGH(eth_port_num), mac_h); + mv_write(MV643XX_ETH_MAC_ADDR_LOW(eth_port_num), mac_l); + mv_write(MV643XX_ETH_MAC_ADDR_HIGH(eth_port_num), mac_h); /* Accept frames of this address */ - eth_port_uc_addr(eth_port_num, p_addr[5], ACCEPT_MAC_ADDR); - - return; + table = MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE(eth_port_num); + eth_port_set_filter_table_entry(table, p_addr[5] & 0x0f); } /* - * eth_port_uc_addr - This function Set the port unicast address table + * eth_port_uc_addr_get - This function retrieves the port Unicast address + * (MAC address) from the ethernet hw registers. * * DESCRIPTION: - * This function locates the proper entry in the Unicast table for the - * specified MAC nibble and sets its properties according to function - * parameters. + * This function retrieves the port Ethernet MAC address. * * INPUT: - * unsigned int eth_port_num Port number. - * unsigned char uc_nibble Unicast MAC Address last nibble. - * int option 0 = Add, 1 = remove address. + * unsigned int eth_port_num Port number. + * char *MacAddr pointer where the MAC address is stored * * OUTPUT: - * This function add/removes MAC addresses from the port unicast address - * table. + * Copy the MAC address to the location pointed to by MacAddr * * RETURN: - * true is output succeeded. - * false if option parameter is invalid. + * N/A. * */ -static int eth_port_uc_addr(unsigned int eth_port_num, - unsigned char uc_nibble, int option) +static void eth_port_uc_addr_get(struct net_device *dev, unsigned char *p_addr) +{ + struct mv643xx_private *mp = netdev_priv(dev); + unsigned int mac_h; + unsigned int mac_l; + + mac_h = mv_read(MV643XX_ETH_MAC_ADDR_HIGH(mp->port_num)); + mac_l = mv_read(MV643XX_ETH_MAC_ADDR_LOW(mp->port_num)); + + p_addr[0] = (mac_h >> 24) & 0xff; + p_addr[1] = (mac_h >> 16) & 0xff; + p_addr[2] = (mac_h >> 8) & 0xff; + p_addr[3] = mac_h & 0xff; + p_addr[4] = (mac_l >> 8) & 0xff; + p_addr[5] = mac_l & 0xff; +} + +/* + * The entries in each table are indexed by a hash of a packet's MAC + * address. One bit in each entry determines whether the packet is + * accepted. There are 4 entries (each 8 bits wide) in each register + * of the table. The bits in each entry are defined as follows: + * 0 Accept=1, Drop=0 + * 3-1 Queue (ETH_Q0=0) + * 7-4 Reserved = 0; + */ +static void eth_port_set_filter_table_entry(int table, unsigned char entry) { - unsigned int unicast_reg; + unsigned int table_reg; unsigned int tbl_offset; unsigned int reg_offset; - /* Locate the Unicast table entry */ - uc_nibble = (0xf & uc_nibble); - tbl_offset = (uc_nibble / 4) * 4; /* Register offset from unicast table base */ - reg_offset = uc_nibble % 4; /* Entry offset within the above register */ + tbl_offset = (entry / 4) * 4; /* Register offset of DA table entry */ + reg_offset = entry % 4; /* Entry offset within the register */ - switch (option) { - case REJECT_MAC_ADDR: - /* Clear accepts frame bit at specified unicast DA table entry */ - unicast_reg = MV_READ((MV64340_ETH_DA_FILTER_UNICAST_TABLE_BASE - (eth_port_num) + tbl_offset)); + /* Set "accepts frame bit" at specified table entry */ + table_reg = mv_read(table + tbl_offset); + table_reg |= 0x01 << (8 * reg_offset); + mv_write(table + tbl_offset, table_reg); +} - unicast_reg &= (0x0E << (8 * reg_offset)); +/* + * eth_port_mc_addr - Multicast address settings. + * + * The MV device supports multicast using two tables: + * 1) Special Multicast Table for MAC addresses of the form + * 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_FF). + * The MAC DA[7:0] bits are used as a pointer to the Special Multicast + * Table entries in the DA-Filter table. + * 2) Other Multicast Table for multicast of another type. A CRC-8bit + * is used as an index to the Other Multicast Table entries in the + * DA-Filter table. This function calculates the CRC-8bit value. + * In either case, eth_port_set_filter_table_entry() is then called + * to set to set the actual table entry. + */ +static void eth_port_mc_addr(unsigned int eth_port_num, unsigned char *p_addr) +{ + unsigned int mac_h; + unsigned int mac_l; + unsigned char crc_result = 0; + int table; + int mac_array[48]; + int crc[8]; + int i; - MV_WRITE( - (MV64340_ETH_DA_FILTER_UNICAST_TABLE_BASE - (eth_port_num) + tbl_offset), unicast_reg); - break; + if ((p_addr[0] == 0x01) && (p_addr[1] == 0x00) && + (p_addr[2] == 0x5E) && (p_addr[3] == 0x00) && (p_addr[4] == 0x00)) { + table = MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE + (eth_port_num); + eth_port_set_filter_table_entry(table, p_addr[5]); + return; + } - case ACCEPT_MAC_ADDR: - /* Set accepts frame bit at unicast DA filter table entry */ - unicast_reg = - MV_READ( - (MV64340_ETH_DA_FILTER_UNICAST_TABLE_BASE - (eth_port_num) + tbl_offset)); + /* Calculate CRC-8 out of the given address */ + mac_h = (p_addr[0] << 8) | (p_addr[1]); + mac_l = (p_addr[2] << 24) | (p_addr[3] << 16) | + (p_addr[4] << 8) | (p_addr[5] << 0); + + for (i = 0; i < 32; i++) + mac_array[i] = (mac_l >> i) & 0x1; + for (i = 32; i < 48; i++) + mac_array[i] = (mac_h >> (i - 32)) & 0x1; + + crc[0] = mac_array[45] ^ mac_array[43] ^ mac_array[40] ^ mac_array[39] ^ + mac_array[35] ^ mac_array[34] ^ mac_array[31] ^ mac_array[30] ^ + mac_array[28] ^ mac_array[23] ^ mac_array[21] ^ mac_array[19] ^ + mac_array[18] ^ mac_array[16] ^ mac_array[14] ^ mac_array[12] ^ + mac_array[8] ^ mac_array[7] ^ mac_array[6] ^ mac_array[0]; + + crc[1] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^ mac_array[43] ^ + mac_array[41] ^ mac_array[39] ^ mac_array[36] ^ mac_array[34] ^ + mac_array[32] ^ mac_array[30] ^ mac_array[29] ^ mac_array[28] ^ + mac_array[24] ^ mac_array[23] ^ mac_array[22] ^ mac_array[21] ^ + mac_array[20] ^ mac_array[18] ^ mac_array[17] ^ mac_array[16] ^ + mac_array[15] ^ mac_array[14] ^ mac_array[13] ^ mac_array[12] ^ + mac_array[9] ^ mac_array[6] ^ mac_array[1] ^ mac_array[0]; + + crc[2] = mac_array[47] ^ mac_array[46] ^ mac_array[44] ^ mac_array[43] ^ + mac_array[42] ^ mac_array[39] ^ mac_array[37] ^ mac_array[34] ^ + mac_array[33] ^ mac_array[29] ^ mac_array[28] ^ mac_array[25] ^ + mac_array[24] ^ mac_array[22] ^ mac_array[17] ^ mac_array[15] ^ + mac_array[13] ^ mac_array[12] ^ mac_array[10] ^ mac_array[8] ^ + mac_array[6] ^ mac_array[2] ^ mac_array[1] ^ mac_array[0]; + + crc[3] = mac_array[47] ^ mac_array[45] ^ mac_array[44] ^ mac_array[43] ^ + mac_array[40] ^ mac_array[38] ^ mac_array[35] ^ mac_array[34] ^ + mac_array[30] ^ mac_array[29] ^ mac_array[26] ^ mac_array[25] ^ + mac_array[23] ^ mac_array[18] ^ mac_array[16] ^ mac_array[14] ^ + mac_array[13] ^ mac_array[11] ^ mac_array[9] ^ mac_array[7] ^ + mac_array[3] ^ mac_array[2] ^ mac_array[1]; + + crc[4] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^ mac_array[41] ^ + mac_array[39] ^ mac_array[36] ^ mac_array[35] ^ mac_array[31] ^ + mac_array[30] ^ mac_array[27] ^ mac_array[26] ^ mac_array[24] ^ + mac_array[19] ^ mac_array[17] ^ mac_array[15] ^ mac_array[14] ^ + mac_array[12] ^ mac_array[10] ^ mac_array[8] ^ mac_array[4] ^ + mac_array[3] ^ mac_array[2]; + + crc[5] = mac_array[47] ^ mac_array[46] ^ mac_array[45] ^ mac_array[42] ^ + mac_array[40] ^ mac_array[37] ^ mac_array[36] ^ mac_array[32] ^ + mac_array[31] ^ mac_array[28] ^ mac_array[27] ^ mac_array[25] ^ + mac_array[20] ^ mac_array[18] ^ mac_array[16] ^ mac_array[15] ^ + mac_array[13] ^ mac_array[11] ^ mac_array[9] ^ mac_array[5] ^ + mac_array[4] ^ mac_array[3]; + + crc[6] = mac_array[47] ^ mac_array[46] ^ mac_array[43] ^ mac_array[41] ^ + mac_array[38] ^ mac_array[37] ^ mac_array[33] ^ mac_array[32] ^ + mac_array[29] ^ mac_array[28] ^ mac_array[26] ^ mac_array[21] ^ + mac_array[19] ^ mac_array[17] ^ mac_array[16] ^ mac_array[14] ^ + mac_array[12] ^ mac_array[10] ^ mac_array[6] ^ mac_array[5] ^ + mac_array[4]; + + crc[7] = mac_array[47] ^ mac_array[44] ^ mac_array[42] ^ mac_array[39] ^ + mac_array[38] ^ mac_array[34] ^ mac_array[33] ^ mac_array[30] ^ + mac_array[29] ^ mac_array[27] ^ mac_array[22] ^ mac_array[20] ^ + mac_array[18] ^ mac_array[17] ^ mac_array[15] ^ mac_array[13] ^ + mac_array[11] ^ mac_array[7] ^ mac_array[6] ^ mac_array[5]; + + for (i = 0; i < 8; i++) + crc_result = crc_result | (crc[i] << i); + + table = MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num); + eth_port_set_filter_table_entry(table, crc_result); +} - unicast_reg |= (0x01 << (8 * reg_offset)); +/* + * Set the entire multicast list based on dev->mc_list. + */ +static void eth_port_set_multicast_list(struct net_device *dev) +{ - MV_WRITE( - (MV64340_ETH_DA_FILTER_UNICAST_TABLE_BASE - (eth_port_num) + tbl_offset), unicast_reg); + struct dev_mc_list *mc_list; + int i; + int table_index; + struct mv643xx_private *mp = netdev_priv(dev); + unsigned int eth_port_num = mp->port_num; - break; + /* If the device is in promiscuous mode or in all multicast mode, + * we will fully populate both multicast tables with accept. + * This is guaranteed to yield a match on all multicast addresses... + */ + if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI)) { + for (table_index = 0; table_index <= 0xFC; table_index += 4) { + /* Set all entries in DA filter special multicast + * table (Ex_dFSMT) + * Set for ETH_Q0 for now + * Bits + * 0 Accept=1, Drop=0 + * 3-1 Queue ETH_Q0=0 + * 7-4 Reserved = 0; + */ + mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(eth_port_num) + table_index, 0x01010101); + + /* Set all entries in DA filter other multicast + * table (Ex_dFOMT) + * Set for ETH_Q0 for now + * Bits + * 0 Accept=1, Drop=0 + * 3-1 Queue ETH_Q0=0 + * 7-4 Reserved = 0; + */ + mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num) + table_index, 0x01010101); + } + return; + } - default: - return 0; + /* We will clear out multicast tables every time we get the list. + * Then add the entire new list... + */ + for (table_index = 0; table_index <= 0xFC; table_index += 4) { + /* Clear DA filter special multicast table (Ex_dFSMT) */ + mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE + (eth_port_num) + table_index, 0); + + /* Clear DA filter other multicast table (Ex_dFOMT) */ + mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE + (eth_port_num) + table_index, 0); } - return 1; + /* Get pointer to net_device multicast list and add each one... */ + for (i = 0, mc_list = dev->mc_list; + (i < 256) && (mc_list != NULL) && (i < dev->mc_count); + i++, mc_list = mc_list->next) + if (mc_list->dmi_addrlen == 6) + eth_port_mc_addr(eth_port_num, mc_list->dmi_addr); } /* * eth_port_init_mac_tables - Clear all entrance in the UC, SMC and OMC tables * * DESCRIPTION: - * Go through all the DA filter tables (Unicast, Special Multicast & - * Other Multicast) and set each entry to 0. + * Go through all the DA filter tables (Unicast, Special Multicast & + * Other Multicast) and set each entry to 0. * * INPUT: - * unsigned int eth_port_num Ethernet Port number. + * unsigned int eth_port_num Ethernet Port number. * * OUTPUT: - * Multicast and Unicast packets are rejected. + * Multicast and Unicast packets are rejected. * * RETURN: - * None. + * None. */ static void eth_port_init_mac_tables(unsigned int eth_port_num) { @@ -1907,18 +2096,16 @@ static void eth_port_init_mac_tables(unsigned int eth_port_num) /* Clear DA filter unicast table (Ex_dFUT) */ for (table_index = 0; table_index <= 0xC; table_index += 4) - MV_WRITE( - (MV64340_ETH_DA_FILTER_UNICAST_TABLE_BASE - (eth_port_num) + table_index), 0); + mv_write(MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE + (eth_port_num) + table_index, 0); for (table_index = 0; table_index <= 0xFC; table_index += 4) { /* Clear DA filter special multicast table (Ex_dFSMT) */ - MV_WRITE( - (MV64340_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE - (eth_port_num) + table_index), 0); + mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE + (eth_port_num) + table_index, 0); /* Clear DA filter other multicast table (Ex_dFOMT) */ - MV_WRITE((MV64340_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE - (eth_port_num) + table_index), 0); + mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE + (eth_port_num) + table_index, 0); } } @@ -1926,17 +2113,17 @@ static void eth_port_init_mac_tables(unsigned int eth_port_num) * eth_clear_mib_counters - Clear all MIB counters * * DESCRIPTION: - * This function clears all MIB counters of a specific ethernet port. - * A read from the MIB counter will reset the counter. + * This function clears all MIB counters of a specific ethernet port. + * A read from the MIB counter will reset the counter. * * INPUT: - * unsigned int eth_port_num Ethernet Port number. + * unsigned int eth_port_num Ethernet Port number. * * OUTPUT: - * After reading all MIB counters, the counters resets. + * After reading all MIB counters, the counters resets. * * RETURN: - * MIB counter value. + * MIB counter value. * */ static void eth_clear_mib_counters(unsigned int eth_port_num) @@ -1944,619 +2131,420 @@ static void eth_clear_mib_counters(unsigned int eth_port_num) int i; /* Perform dummy reads from MIB counters */ - for (i = ETH_MIB_GOOD_OCTETS_RECEIVED_LOW; i < ETH_MIB_LATE_COLLISION; i += 4) - MV_READ(MV64340_ETH_MIB_COUNTERS_BASE(eth_port_num) + i); + for (i = ETH_MIB_GOOD_OCTETS_RECEIVED_LOW; i < ETH_MIB_LATE_COLLISION; + i += 4) + mv_read(MV643XX_ETH_MIB_COUNTERS_BASE(eth_port_num) + i); } - -/* - * ethernet_phy_get - Get the ethernet port PHY address. - * - * DESCRIPTION: - * This routine returns the given ethernet port PHY address. - * - * INPUT: - * unsigned int eth_port_num Ethernet Port number. - * - * OUTPUT: - * None. - * - * RETURN: - * PHY address. - * - */ -static int ethernet_phy_get(unsigned int eth_port_num) +static inline u32 read_mib(struct mv643xx_private *mp, int offset) { - unsigned int reg_data; - - reg_data = MV_READ(MV64340_ETH_PHY_ADDR_REG); + return mv_read(MV643XX_ETH_MIB_COUNTERS_BASE(mp->port_num) + offset); +} - return ((reg_data >> (5 * eth_port_num)) & 0x1f); +static void eth_update_mib_counters(struct mv643xx_private *mp) +{ + struct mv643xx_mib_counters *p = &mp->mib_counters; + int offset; + + p->good_octets_received += + read_mib(mp, ETH_MIB_GOOD_OCTETS_RECEIVED_LOW); + p->good_octets_received += + (u64)read_mib(mp, ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH) << 32; + + for (offset = ETH_MIB_BAD_OCTETS_RECEIVED; + offset <= ETH_MIB_FRAMES_1024_TO_MAX_OCTETS; + offset += 4) + *(u32 *)((char *)p + offset) = read_mib(mp, offset); + + p->good_octets_sent += read_mib(mp, ETH_MIB_GOOD_OCTETS_SENT_LOW); + p->good_octets_sent += + (u64)read_mib(mp, ETH_MIB_GOOD_OCTETS_SENT_HIGH) << 32; + + for (offset = ETH_MIB_GOOD_FRAMES_SENT; + offset <= ETH_MIB_LATE_COLLISION; + offset += 4) + *(u32 *)((char *)p + offset) = read_mib(mp, offset); } /* - * ethernet_phy_reset - Reset Ethernet port PHY. + * ethernet_phy_detect - Detect whether a phy is present * * DESCRIPTION: - * This routine utilize the SMI interface to reset the ethernet port PHY. - * The routine waits until the link is up again or link up is timeout. + * This function tests whether there is a PHY present on + * the specified port. * * INPUT: - * unsigned int eth_port_num Ethernet Port number. + * unsigned int eth_port_num Ethernet Port number. * * OUTPUT: - * The ethernet port PHY renew its link. + * None * * RETURN: - * None. + * 0 on success + * -ENODEV on failure * */ -static int ethernet_phy_reset(unsigned int eth_port_num) +static int ethernet_phy_detect(unsigned int port_num) { - unsigned int time_out = 50; - unsigned int phy_reg_data; - - /* Reset the PHY */ - eth_port_read_smi_reg(eth_port_num, 0, &phy_reg_data); - phy_reg_data |= 0x8000; /* Set bit 15 to reset the PHY */ - eth_port_write_smi_reg(eth_port_num, 0, phy_reg_data); + unsigned int phy_reg_data0; + int auto_neg; - /* Poll on the PHY LINK */ - do { - eth_port_read_smi_reg(eth_port_num, 1, &phy_reg_data); + eth_port_read_smi_reg(port_num, 0, &phy_reg_data0); + auto_neg = phy_reg_data0 & 0x1000; + phy_reg_data0 ^= 0x1000; /* invert auto_neg */ + eth_port_write_smi_reg(port_num, 0, phy_reg_data0); - if (time_out-- == 0) - return 0; - } while (!(phy_reg_data & 0x20)); + eth_port_read_smi_reg(port_num, 0, &phy_reg_data0); + if ((phy_reg_data0 & 0x1000) == auto_neg) + return -ENODEV; /* change didn't take */ - return 1; + phy_reg_data0 ^= 0x1000; + eth_port_write_smi_reg(port_num, 0, phy_reg_data0); + return 0; } /* - * eth_port_reset - Reset Ethernet port + * ethernet_phy_get - Get the ethernet port PHY address. * * DESCRIPTION: - * This routine resets the chip by aborting any SDMA engine activity and - * clearing the MIB counters. The Receiver and the Transmit unit are in - * idle state after this command is performed and the port is disabled. + * This routine returns the given ethernet port PHY address. * * INPUT: - * unsigned int eth_port_num Ethernet Port number. + * unsigned int eth_port_num Ethernet Port number. * * OUTPUT: - * Channel activity is halted. + * None. * * RETURN: - * None. + * PHY address. * */ -static void eth_port_reset(unsigned int eth_port_num) +static int ethernet_phy_get(unsigned int eth_port_num) { unsigned int reg_data; - /* Stop Tx port activity. Check port Tx activity. */ - reg_data = - MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(eth_port_num)); - - if (reg_data & 0xFF) { - /* Issue stop command for active channels only */ - MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG - (eth_port_num), (reg_data << 8)); + reg_data = mv_read(MV643XX_ETH_PHY_ADDR_REG); - /* Wait for all Tx activity to terminate. */ - do { - /* Check port cause register that all Tx queues are stopped */ - reg_data = - MV_READ - (MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG - (eth_port_num)); - } - while (reg_data & 0xFF); - } - - /* Stop Rx port activity. Check port Rx activity. */ - reg_data = - MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG - (eth_port_num)); - - if (reg_data & 0xFF) { - /* Issue stop command for active channels only */ - MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG - (eth_port_num), (reg_data << 8)); - - /* Wait for all Rx activity to terminate. */ - do { - /* Check port cause register that all Rx queues are stopped */ - reg_data = - MV_READ - (MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG - (eth_port_num)); - } - while (reg_data & 0xFF); - } - - - /* Clear all MIB counters */ - eth_clear_mib_counters(eth_port_num); - - /* Reset the Enable bit in the Configuration Register */ - reg_data = - MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG (eth_port_num)); - reg_data &= ~ETH_SERIAL_PORT_ENABLE; - MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(eth_port_num), reg_data); - - return; + return ((reg_data >> (5 * eth_port_num)) & 0x1f); } /* - * ethernet_set_config_reg - Set specified bits in configuration register. + * ethernet_phy_set - Set the ethernet port PHY address. * * DESCRIPTION: - * This function sets specified bits in the given ethernet - * configuration register. + * This routine sets the given ethernet port PHY address. * * INPUT: - * unsigned int eth_port_num Ethernet Port number. - * unsigned int value 32 bit value. + * unsigned int eth_port_num Ethernet Port number. + * int phy_addr PHY address. * * OUTPUT: - * The set bits in the value parameter are set in the configuration - * register. + * None. * * RETURN: - * None. + * None. * */ -static void ethernet_set_config_reg(unsigned int eth_port_num, - unsigned int value) +static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr) { - unsigned int eth_config_reg; + u32 reg_data; + int addr_shift = 5 * eth_port_num; - eth_config_reg = - MV_READ(MV64340_ETH_PORT_CONFIG_REG(eth_port_num)); - eth_config_reg |= value; - MV_WRITE(MV64340_ETH_PORT_CONFIG_REG(eth_port_num), - eth_config_reg); + reg_data = mv_read(MV643XX_ETH_PHY_ADDR_REG); + reg_data &= ~(0x1f << addr_shift); + reg_data |= (phy_addr & 0x1f) << addr_shift; + mv_write(MV643XX_ETH_PHY_ADDR_REG, reg_data); } /* - * ethernet_get_config_reg - Get the port configuration register + * ethernet_phy_reset - Reset Ethernet port PHY. * * DESCRIPTION: - * This function returns the configuration register value of the given - * ethernet port. + * This routine utilizes the SMI interface to reset the ethernet port PHY. * * INPUT: - * unsigned int eth_port_num Ethernet Port number. + * unsigned int eth_port_num Ethernet Port number. * * OUTPUT: - * None. + * The PHY is reset. * * RETURN: - * Port configuration register value. + * None. + * */ -static unsigned int ethernet_get_config_reg(unsigned int eth_port_num) +static void ethernet_phy_reset(unsigned int eth_port_num) { - unsigned int eth_config_reg; + unsigned int phy_reg_data; - eth_config_reg = MV_READ(MV64340_ETH_PORT_CONFIG_EXTEND_REG - (eth_port_num)); - return eth_config_reg; -} + /* Reset the PHY */ + eth_port_read_smi_reg(eth_port_num, 0, &phy_reg_data); + phy_reg_data |= 0x8000; /* Set bit 15 to reset the PHY */ + eth_port_write_smi_reg(eth_port_num, 0, phy_reg_data); + /* wait for PHY to come out of reset */ + do { + udelay(1); + eth_port_read_smi_reg(eth_port_num, 0, &phy_reg_data); + } while (phy_reg_data & 0x8000); +} -/* - * eth_port_read_smi_reg - Read PHY registers - * - * DESCRIPTION: - * This routine utilize the SMI interface to interact with the PHY in - * order to perform PHY register read. - * - * INPUT: - * unsigned int eth_port_num Ethernet Port number. - * unsigned int phy_reg PHY register address offset. - * unsigned int *value Register value buffer. - * - * OUTPUT: - * Write the value of a specified PHY register into given buffer. - * - * RETURN: - * false if the PHY is busy or read data is not in valid state. - * true otherwise. - * - */ -static int eth_port_read_smi_reg(unsigned int eth_port_num, - unsigned int phy_reg, unsigned int *value) +static void mv643xx_eth_port_enable_tx(unsigned int port_num, + unsigned int queues) { - int phy_addr = ethernet_phy_get(eth_port_num); - unsigned int time_out = PHY_BUSY_TIMEOUT; - unsigned int reg_value; + mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num), queues); +} - /* first check that it is not busy */ - do { - reg_value = MV_READ(MV64340_ETH_SMI_REG); - if (time_out-- == 0) - return 0; - } while (reg_value & ETH_SMI_BUSY); +static void mv643xx_eth_port_enable_rx(unsigned int port_num, + unsigned int queues) +{ + mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num), queues); +} - /* not busy */ +static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num) +{ + u32 queues; - MV_WRITE(MV64340_ETH_SMI_REG, - (phy_addr << 16) | (phy_reg << 21) | ETH_SMI_OPCODE_READ); + /* Stop Tx port activity. Check port Tx activity. */ + queues = mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num)) + & 0xFF; + if (queues) { + /* Issue stop command for active queues only */ + mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num), + (queues << 8)); - time_out = PHY_BUSY_TIMEOUT; /* initialize the time out var again */ + /* Wait for all Tx activity to terminate. */ + /* Check port cause register that all Tx queues are stopped */ + while (mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num)) + & 0xFF) + udelay(PHY_WAIT_MICRO_SECONDS); + + /* Wait for Tx FIFO to empty */ + while (mv_read(MV643XX_ETH_PORT_STATUS_REG(port_num)) & + ETH_PORT_TX_FIFO_EMPTY) + udelay(PHY_WAIT_MICRO_SECONDS); + } - do { - reg_value = MV_READ(MV64340_ETH_SMI_REG); - if (time_out-- == 0) - return 0; - } while (reg_value & ETH_SMI_READ_VALID); + return queues; +} - /* Wait for the data to update in the SMI register */ - for (time_out = 0; time_out < PHY_BUSY_TIMEOUT; time_out++); +static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num) +{ + u32 queues; - reg_value = MV_READ(MV64340_ETH_SMI_REG); + /* Stop Rx port activity. Check port Rx activity. */ + queues = mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num)) + & 0xFF; + if (queues) { + /* Issue stop command for active queues only */ + mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num), + (queues << 8)); - *value = reg_value & 0xffff; + /* Wait for all Rx activity to terminate. */ + /* Check port cause register that all Rx queues are stopped */ + while (mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num)) + & 0xFF) + udelay(PHY_WAIT_MICRO_SECONDS); + } - return 1; + return queues; } /* - * eth_port_write_smi_reg - Write to PHY registers + * eth_port_reset - Reset Ethernet port * * DESCRIPTION: - * This routine utilize the SMI interface to interact with the PHY in - * order to perform writes to PHY registers. + * This routine resets the chip by aborting any SDMA engine activity and + * clearing the MIB counters. The Receiver and the Transmit unit are in + * idle state after this command is performed and the port is disabled. * * INPUT: - * unsigned int eth_port_num Ethernet Port number. - * unsigned int phy_reg PHY register address offset. - * unsigned int value Register value. + * unsigned int eth_port_num Ethernet Port number. * * OUTPUT: - * Write the given value to the specified PHY register. + * Channel activity is halted. * * RETURN: - * false if the PHY is busy. - * true otherwise. + * None. * */ -static int eth_port_write_smi_reg(unsigned int eth_port_num, - unsigned int phy_reg, unsigned int value) +static void eth_port_reset(unsigned int port_num) { - unsigned int time_out = PHY_BUSY_TIMEOUT; - unsigned int reg_value; - int phy_addr; - - phy_addr = ethernet_phy_get(eth_port_num); + unsigned int reg_data; - /* first check that it is not busy */ - do { - reg_value = MV_READ(MV64340_ETH_SMI_REG); - if (time_out-- == 0) - return 0; - } while (reg_value & ETH_SMI_BUSY); + mv643xx_eth_port_disable_tx(port_num); + mv643xx_eth_port_disable_rx(port_num); - /* not busy */ - MV_WRITE(MV64340_ETH_SMI_REG, (phy_addr << 16) | (phy_reg << 21) | - ETH_SMI_OPCODE_WRITE | (value & 0xffff)); + /* Clear all MIB counters */ + eth_clear_mib_counters(port_num); - return 1; + /* Reset the Enable bit in the Configuration Register */ + reg_data = mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num)); + reg_data &= ~(MV643XX_ETH_SERIAL_PORT_ENABLE | + MV643XX_ETH_DO_NOT_FORCE_LINK_FAIL | + MV643XX_ETH_FORCE_LINK_PASS); + mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), reg_data); } + /* - * eth_port_send - Send an Ethernet packet + * eth_port_read_smi_reg - Read PHY registers * * DESCRIPTION: - * This routine send a given packet described by p_pktinfo parameter. It - * supports transmitting of a packet spaned over multiple buffers. The - * routine updates 'curr' and 'first' indexes according to the packet - * segment passed to the routine. In case the packet segment is first, - * the 'first' index is update. In any case, the 'curr' index is updated. - * If the routine get into Tx resource error it assigns 'curr' index as - * 'first'. This way the function can abort Tx process of multiple - * descriptors per packet. + * This routine utilize the SMI interface to interact with the PHY in + * order to perform PHY register read. * * INPUT: - * struct mv64340_private *mp Ethernet Port Control srtuct. - * struct pkt_info *p_pkt_info User packet buffer. + * unsigned int port_num Ethernet Port number. + * unsigned int phy_reg PHY register address offset. + * unsigned int *value Register value buffer. * * OUTPUT: - * Tx ring 'curr' and 'first' indexes are updated. + * Write the value of a specified PHY register into given buffer. * * RETURN: - * ETH_QUEUE_FULL in case of Tx resource error. - * ETH_ERROR in case the routine can not access Tx desc ring. - * ETH_QUEUE_LAST_RESOURCE if the routine uses the last Tx resource. - * ETH_OK otherwise. + * false if the PHY is busy or read data is not in valid state. + * true otherwise. * */ -#ifdef MV64340_CHECKSUM_OFFLOAD_TX -/* - * Modified to include the first descriptor pointer in case of SG - */ -static ETH_FUNC_RET_STATUS eth_port_send(struct mv64340_private * mp, - struct pkt_info * p_pkt_info) +static void eth_port_read_smi_reg(unsigned int port_num, + unsigned int phy_reg, unsigned int *value) { - int tx_desc_curr, tx_desc_used, tx_first_desc, tx_next_desc; - volatile struct eth_tx_desc *current_descriptor; - volatile struct eth_tx_desc *first_descriptor; - u32 command_status, first_chip_ptr; - - /* Do not process Tx ring in case of Tx ring resource error */ - if (mp->tx_resource_err) - return ETH_QUEUE_FULL; + int phy_addr = ethernet_phy_get(port_num); + unsigned long flags; + int i; - /* Get the Tx Desc ring indexes */ - tx_desc_curr = mp->tx_curr_desc_q; - tx_desc_used = mp->tx_used_desc_q; - - current_descriptor = &mp->p_tx_desc_area[tx_desc_curr]; - if (current_descriptor == NULL) - return ETH_ERROR; - - tx_next_desc = (tx_desc_curr + 1) % MV64340_TX_QUEUE_SIZE; - command_status = p_pkt_info->cmd_sts | ETH_ZERO_PADDING | ETH_GEN_CRC; - - if (command_status & ETH_TX_FIRST_DESC) { - tx_first_desc = tx_desc_curr; - mp->tx_first_desc_q = tx_first_desc; - - /* fill first descriptor */ - first_descriptor = &mp->p_tx_desc_area[tx_desc_curr]; - first_descriptor->l4i_chk = p_pkt_info->l4i_chk; - first_descriptor->cmd_sts = command_status; - first_descriptor->byte_cnt = p_pkt_info->byte_cnt; - first_descriptor->buf_ptr = p_pkt_info->buf_ptr; - first_descriptor->next_desc_ptr = mp->tx_desc_dma + - tx_next_desc * sizeof(struct eth_tx_desc); - wmb(); - } else { - tx_first_desc = mp->tx_first_desc_q; - first_descriptor = &mp->p_tx_desc_area[tx_first_desc]; - if (first_descriptor == NULL) { - printk("First desc is NULL !!\n"); - return ETH_ERROR; - } - if (command_status & ETH_TX_LAST_DESC) - current_descriptor->next_desc_ptr = 0x00000000; - else { - command_status |= ETH_BUFFER_OWNED_BY_DMA; - current_descriptor->next_desc_ptr = mp->tx_desc_dma + - tx_next_desc * sizeof(struct eth_tx_desc); - } - } - - if (p_pkt_info->byte_cnt < 8) { - printk(" < 8 problem \n"); - return ETH_ERROR; - } - - current_descriptor->buf_ptr = p_pkt_info->buf_ptr; - current_descriptor->byte_cnt = p_pkt_info->byte_cnt; - current_descriptor->l4i_chk = p_pkt_info->l4i_chk; - current_descriptor->cmd_sts = command_status; - - mp->tx_skb[tx_desc_curr] = (struct sk_buff*) p_pkt_info->return_info; - - wmb(); - - /* Set last desc with DMA ownership and interrupt enable. */ - if (command_status & ETH_TX_LAST_DESC) { - current_descriptor->cmd_sts = command_status | - ETH_TX_ENABLE_INTERRUPT | - ETH_BUFFER_OWNED_BY_DMA; - - if (!(command_status & ETH_TX_FIRST_DESC)) - first_descriptor->cmd_sts |= ETH_BUFFER_OWNED_BY_DMA; - wmb(); - - first_chip_ptr = MV_READ(MV64340_ETH_CURRENT_SERVED_TX_DESC_PTR(mp->port_num)); - - /* Apply send command */ - if (first_chip_ptr == 0x00000000) - MV_WRITE(MV64340_ETH_TX_CURRENT_QUEUE_DESC_PTR_0(mp->port_num), (struct eth_tx_desc *) mp->tx_desc_dma + tx_first_desc); - - ETH_ENABLE_TX_QUEUE(mp->port_num); + /* the SMI register is a shared resource */ + spin_lock_irqsave(&mv643xx_eth_phy_lock, flags); - /* - * Finish Tx packet. Update first desc in case of Tx resource - * error */ - tx_first_desc = tx_next_desc; - mp->tx_first_desc_q = tx_first_desc; - } else { - if (! (command_status & ETH_TX_FIRST_DESC) ) { - current_descriptor->cmd_sts = command_status; - wmb(); + /* wait for the SMI register to become available */ + for (i = 0; mv_read(MV643XX_ETH_SMI_REG) & ETH_SMI_BUSY; i++) { + if (i == PHY_WAIT_ITERATIONS) { + printk("mv643xx PHY busy timeout, port %d\n", port_num); + goto out; } + udelay(PHY_WAIT_MICRO_SECONDS); } - /* Check for ring index overlap in the Tx desc ring */ - if (tx_next_desc == tx_desc_used) { - mp->tx_resource_err = 1; - mp->tx_curr_desc_q = tx_first_desc; - - return ETH_QUEUE_LAST_RESOURCE; - } - - mp->tx_curr_desc_q = tx_next_desc; - wmb(); + mv_write(MV643XX_ETH_SMI_REG, + (phy_addr << 16) | (phy_reg << 21) | ETH_SMI_OPCODE_READ); - return ETH_OK; -} -#else -static ETH_FUNC_RET_STATUS eth_port_send(struct mv64340_private * mp, - struct pkt_info * p_pkt_info) -{ - int tx_desc_curr; - int tx_desc_used; - volatile struct eth_tx_desc* current_descriptor; - unsigned int command_status; - - /* Do not process Tx ring in case of Tx ring resource error */ - if (mp->tx_resource_err) - return ETH_QUEUE_FULL; - - /* Get the Tx Desc ring indexes */ - tx_desc_curr = mp->tx_curr_desc_q; - tx_desc_used = mp->tx_used_desc_q; - current_descriptor = &mp->p_tx_desc_area[tx_desc_curr]; - - if (current_descriptor == NULL) - return ETH_ERROR; - - command_status = p_pkt_info->cmd_sts | ETH_ZERO_PADDING | ETH_GEN_CRC; - -/* XXX Is this for real ?!?!? */ - /* Buffers with a payload smaller than 8 bytes must be aligned to a - * 64-bit boundary. We use the memory allocated for Tx descriptor. - * This memory is located in TX_BUF_OFFSET_IN_DESC offset within the - * Tx descriptor. */ - if (p_pkt_info->byte_cnt <= 8) { - printk(KERN_ERR - "You have failed in the < 8 bytes errata - fixme\n"); - return ETH_ERROR; - } - current_descriptor->buf_ptr = p_pkt_info->buf_ptr; - current_descriptor->byte_cnt = p_pkt_info->byte_cnt; - mp->tx_skb[tx_desc_curr] = (struct sk_buff *) p_pkt_info->return_info; - - mb(); - - /* Set last desc with DMA ownership and interrupt enable. */ - current_descriptor->cmd_sts = command_status | - ETH_BUFFER_OWNED_BY_DMA | ETH_TX_ENABLE_INTERRUPT; - - /* Apply send command */ - ETH_ENABLE_TX_QUEUE(mp->port_num); - - /* Finish Tx packet. Update first desc in case of Tx resource error */ - tx_desc_curr = (tx_desc_curr + 1) % MV64340_TX_QUEUE_SIZE; - - /* Update the current descriptor */ - mp->tx_curr_desc_q = tx_desc_curr; - - /* Check for ring index overlap in the Tx desc ring */ - if (tx_desc_curr == tx_desc_used) { - mp->tx_resource_err = 1; - return ETH_QUEUE_LAST_RESOURCE; + /* now wait for the data to be valid */ + for (i = 0; !(mv_read(MV643XX_ETH_SMI_REG) & ETH_SMI_READ_VALID); i++) { + if (i == PHY_WAIT_ITERATIONS) { + printk("mv643xx PHY read timeout, port %d\n", port_num); + goto out; + } + udelay(PHY_WAIT_MICRO_SECONDS); } - return ETH_OK; + *value = mv_read(MV643XX_ETH_SMI_REG) & 0xffff; +out: + spin_unlock_irqrestore(&mv643xx_eth_phy_lock, flags); } -#endif /* - * eth_tx_return_desc - Free all used Tx descriptors + * eth_port_write_smi_reg - Write to PHY registers * * DESCRIPTION: - * This routine returns the transmitted packet information to the caller. - * It uses the 'first' index to support Tx desc return in case a transmit - * of a packet spanned over multiple buffer still in process. - * In case the Tx queue was in "resource error" condition, where there are - * no available Tx resources, the function resets the resource error flag. + * This routine utilize the SMI interface to interact with the PHY in + * order to perform writes to PHY registers. * * INPUT: - * struct mv64340_private *mp Ethernet Port Control srtuct. - * struct pkt_info *p_pkt_info User packet buffer. + * unsigned int eth_port_num Ethernet Port number. + * unsigned int phy_reg PHY register address offset. + * unsigned int value Register value. * * OUTPUT: - * Tx ring 'first' and 'used' indexes are updated. + * Write the given value to the specified PHY register. * * RETURN: - * ETH_ERROR in case the routine can not access Tx desc ring. - * ETH_RETRY in case there is transmission in process. - * ETH_END_OF_JOB if the routine has nothing to release. - * ETH_OK otherwise. + * false if the PHY is busy. + * true otherwise. * */ -static ETH_FUNC_RET_STATUS eth_tx_return_desc(struct mv64340_private * mp, - struct pkt_info * p_pkt_info) +static void eth_port_write_smi_reg(unsigned int eth_port_num, + unsigned int phy_reg, unsigned int value) { - int tx_desc_used, tx_desc_curr; -#ifdef MV64340_CHECKSUM_OFFLOAD_TX - int tx_first_desc; -#endif - volatile struct eth_tx_desc *p_tx_desc_used; - unsigned int command_status; - - /* Get the Tx Desc ring indexes */ - tx_desc_curr = mp->tx_curr_desc_q; - tx_desc_used = mp->tx_used_desc_q; -#ifdef MV64340_CHECKSUM_OFFLOAD_TX - tx_first_desc = mp->tx_first_desc_q; -#endif - p_tx_desc_used = &mp->p_tx_desc_area[tx_desc_used]; + int phy_addr; + int i; + unsigned long flags; - /* XXX Sanity check */ - if (p_tx_desc_used == NULL) - return ETH_ERROR; + phy_addr = ethernet_phy_get(eth_port_num); - command_status = p_tx_desc_used->cmd_sts; + /* the SMI register is a shared resource */ + spin_lock_irqsave(&mv643xx_eth_phy_lock, flags); - /* Still transmitting... */ -#ifndef MV64340_CHECKSUM_OFFLOAD_TX - if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) - return ETH_RETRY; -#endif - /* Stop release. About to overlap the current available Tx descriptor */ -#ifdef MV64340_CHECKSUM_OFFLOAD_TX - if (tx_desc_used == tx_first_desc && !mp->tx_resource_err) - return ETH_END_OF_JOB; -#else - if (tx_desc_used == tx_desc_curr && !mp->tx_resource_err) - return ETH_END_OF_JOB; -#endif + /* wait for the SMI register to become available */ + for (i = 0; mv_read(MV643XX_ETH_SMI_REG) & ETH_SMI_BUSY; i++) { + if (i == PHY_WAIT_ITERATIONS) { + printk("mv643xx PHY busy timeout, port %d\n", + eth_port_num); + goto out; + } + udelay(PHY_WAIT_MICRO_SECONDS); + } - /* Pass the packet information to the caller */ - p_pkt_info->cmd_sts = command_status; - p_pkt_info->return_info = mp->tx_skb[tx_desc_used]; - mp->tx_skb[tx_desc_used] = NULL; + mv_write(MV643XX_ETH_SMI_REG, (phy_addr << 16) | (phy_reg << 21) | + ETH_SMI_OPCODE_WRITE | (value & 0xffff)); +out: + spin_unlock_irqrestore(&mv643xx_eth_phy_lock, flags); +} - /* Update the next descriptor to release. */ - mp->tx_used_desc_q = (tx_desc_used + 1) % MV64340_TX_QUEUE_SIZE; +/* + * Wrappers for MII support library. + */ +static int mv643xx_mdio_read(struct net_device *dev, int phy_id, int location) +{ + int val; + struct mv643xx_private *mp = netdev_priv(dev); - /* Any Tx return cancels the Tx resource error status */ - mp->tx_resource_err = 0; + eth_port_read_smi_reg(mp->port_num, location, &val); + return val; +} - return ETH_OK; +static void mv643xx_mdio_write(struct net_device *dev, int phy_id, int location, int val) +{ + struct mv643xx_private *mp = netdev_priv(dev); + eth_port_write_smi_reg(mp->port_num, location, val); } /* * eth_port_receive - Get received information from Rx ring. * * DESCRIPTION: - * This routine returns the received data to the caller. There is no - * data copying during routine operation. All information is returned - * using pointer to packet information struct passed from the caller. - * If the routine exhausts Rx ring resources then the resource error flag - * is set. + * This routine returns the received data to the caller. There is no + * data copying during routine operation. All information is returned + * using pointer to packet information struct passed from the caller. + * If the routine exhausts Rx ring resources then the resource error flag + * is set. * * INPUT: - * struct mv64340_private *mp Ethernet Port Control srtuct. - * struct pkt_info *p_pkt_info User packet buffer. + * struct mv643xx_private *mp Ethernet Port Control srtuct. + * struct pkt_info *p_pkt_info User packet buffer. * * OUTPUT: - * Rx ring current and used indexes are updated. + * Rx ring current and used indexes are updated. * * RETURN: * ETH_ERROR in case the routine can not access Rx desc ring. * ETH_QUEUE_FULL if Rx ring resources are exhausted. * ETH_END_OF_JOB if there is no received data. - * ETH_OK otherwise. + * ETH_OK otherwise. */ -static ETH_FUNC_RET_STATUS eth_port_receive(struct mv64340_private * mp, - struct pkt_info * p_pkt_info) +static ETH_FUNC_RET_STATUS eth_port_receive(struct mv643xx_private *mp, + struct pkt_info *p_pkt_info) { int rx_next_curr_desc, rx_curr_desc, rx_used_desc; - volatile struct eth_rx_desc * p_rx_desc; + volatile struct eth_rx_desc *p_rx_desc; unsigned int command_status; + unsigned long flags; /* Do not process Rx ring in case of Rx ring resource error */ if (mp->rx_resource_err) return ETH_QUEUE_FULL; + spin_lock_irqsave(&mp->lock, flags); + /* Get the Rx Desc ring 'curr and 'used' indexes */ rx_curr_desc = mp->rx_curr_desc_q; rx_used_desc = mp->rx_used_desc_q; @@ -2565,10 +2553,13 @@ static ETH_FUNC_RET_STATUS eth_port_receive(struct mv64340_private * mp, /* The following parameters are used to save readings from memory */ command_status = p_rx_desc->cmd_sts; + rmb(); /* Nothing to receive... */ - if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) + if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) { + spin_unlock_irqrestore(&mp->lock, flags); return ETH_END_OF_JOB; + } p_pkt_info->byte_cnt = (p_rx_desc->byte_cnt) - RX_BUF_OFFSET; p_pkt_info->cmd_sts = command_status; @@ -2576,19 +2567,22 @@ static ETH_FUNC_RET_STATUS eth_port_receive(struct mv64340_private * mp, p_pkt_info->return_info = mp->rx_skb[rx_curr_desc]; p_pkt_info->l4i_chk = p_rx_desc->buf_size; - /* Clean the return info field to indicate that the packet has been */ - /* moved to the upper layers */ + /* + * Clean the return info field to indicate that the + * packet has been moved to the upper layers + */ mp->rx_skb[rx_curr_desc] = NULL; /* Update current index in data structure */ - rx_next_curr_desc = (rx_curr_desc + 1) % MV64340_RX_QUEUE_SIZE; + rx_next_curr_desc = (rx_curr_desc + 1) % mp->rx_ring_size; mp->rx_curr_desc_q = rx_next_curr_desc; /* Rx descriptors exhausted. Set the Rx ring resource error flag */ if (rx_next_curr_desc == rx_used_desc) mp->rx_resource_err = 1; - mb(); + spin_unlock_irqrestore(&mp->lock, flags); + return ETH_OK; } @@ -2596,27 +2590,30 @@ static ETH_FUNC_RET_STATUS eth_port_receive(struct mv64340_private * mp, * eth_rx_return_buff - Returns a Rx buffer back to the Rx ring. * * DESCRIPTION: - * This routine returns a Rx buffer back to the Rx ring. It retrieves the - * next 'used' descriptor and attached the returned buffer to it. - * In case the Rx ring was in "resource error" condition, where there are - * no available Rx resources, the function resets the resource error flag. + * This routine returns a Rx buffer back to the Rx ring. It retrieves the + * next 'used' descriptor and attached the returned buffer to it. + * In case the Rx ring was in "resource error" condition, where there are + * no available Rx resources, the function resets the resource error flag. * * INPUT: - * struct mv64340_private *mp Ethernet Port Control srtuct. - * struct pkt_info *p_pkt_info Information on the returned buffer. + * struct mv643xx_private *mp Ethernet Port Control srtuct. + * struct pkt_info *p_pkt_info Information on returned buffer. * * OUTPUT: * New available Rx resource in Rx descriptor ring. * * RETURN: * ETH_ERROR in case the routine can not access Rx desc ring. - * ETH_OK otherwise. + * ETH_OK otherwise. */ -static ETH_FUNC_RET_STATUS eth_rx_return_buff(struct mv64340_private * mp, - struct pkt_info * p_pkt_info) +static ETH_FUNC_RET_STATUS eth_rx_return_buff(struct mv643xx_private *mp, + struct pkt_info *p_pkt_info) { int used_rx_desc; /* Where to return Rx resource */ - volatile struct eth_rx_desc* p_used_rx_desc; + volatile struct eth_rx_desc *p_used_rx_desc; + unsigned long flags; + + spin_lock_irqsave(&mp->lock, flags); /* Get 'used' Rx descriptor */ used_rx_desc = mp->rx_used_desc_q; @@ -2627,20 +2624,160 @@ static ETH_FUNC_RET_STATUS eth_rx_return_buff(struct mv64340_private * mp, mp->rx_skb[used_rx_desc] = p_pkt_info->return_info; /* Flush the write pipe */ - mb(); /* Return the descriptor to DMA ownership */ + wmb(); p_used_rx_desc->cmd_sts = - ETH_BUFFER_OWNED_BY_DMA | ETH_RX_ENABLE_INTERRUPT; - - /* Flush descriptor and CPU pipe */ - mb(); + ETH_BUFFER_OWNED_BY_DMA | ETH_RX_ENABLE_INTERRUPT; + wmb(); /* Move the used descriptor pointer to the next descriptor */ - mp->rx_used_desc_q = (used_rx_desc + 1) % MV64340_RX_QUEUE_SIZE; + mp->rx_used_desc_q = (used_rx_desc + 1) % mp->rx_ring_size; /* Any Rx return cancels the Rx resource error status */ mp->rx_resource_err = 0; + spin_unlock_irqrestore(&mp->lock, flags); + return ETH_OK; } + +/************* Begin ethtool support *************************/ + +struct mv643xx_stats { + char stat_string[ETH_GSTRING_LEN]; + int sizeof_stat; + int stat_offset; +}; + +#define MV643XX_STAT(m) sizeof(((struct mv643xx_private *)0)->m), \ + offsetof(struct mv643xx_private, m) + +static const struct mv643xx_stats mv643xx_gstrings_stats[] = { + { "rx_packets", MV643XX_STAT(stats.rx_packets) }, + { "tx_packets", MV643XX_STAT(stats.tx_packets) }, + { "rx_bytes", MV643XX_STAT(stats.rx_bytes) }, + { "tx_bytes", MV643XX_STAT(stats.tx_bytes) }, + { "rx_errors", MV643XX_STAT(stats.rx_errors) }, + { "tx_errors", MV643XX_STAT(stats.tx_errors) }, + { "rx_dropped", MV643XX_STAT(stats.rx_dropped) }, + { "tx_dropped", MV643XX_STAT(stats.tx_dropped) }, + { "good_octets_received", MV643XX_STAT(mib_counters.good_octets_received) }, + { "bad_octets_received", MV643XX_STAT(mib_counters.bad_octets_received) }, + { "internal_mac_transmit_err", MV643XX_STAT(mib_counters.internal_mac_transmit_err) }, + { "good_frames_received", MV643XX_STAT(mib_counters.good_frames_received) }, + { "bad_frames_received", MV643XX_STAT(mib_counters.bad_frames_received) }, + { "broadcast_frames_received", MV643XX_STAT(mib_counters.broadcast_frames_received) }, + { "multicast_frames_received", MV643XX_STAT(mib_counters.multicast_frames_received) }, + { "frames_64_octets", MV643XX_STAT(mib_counters.frames_64_octets) }, + { "frames_65_to_127_octets", MV643XX_STAT(mib_counters.frames_65_to_127_octets) }, + { "frames_128_to_255_octets", MV643XX_STAT(mib_counters.frames_128_to_255_octets) }, + { "frames_256_to_511_octets", MV643XX_STAT(mib_counters.frames_256_to_511_octets) }, + { "frames_512_to_1023_octets", MV643XX_STAT(mib_counters.frames_512_to_1023_octets) }, + { "frames_1024_to_max_octets", MV643XX_STAT(mib_counters.frames_1024_to_max_octets) }, + { "good_octets_sent", MV643XX_STAT(mib_counters.good_octets_sent) }, + { "good_frames_sent", MV643XX_STAT(mib_counters.good_frames_sent) }, + { "excessive_collision", MV643XX_STAT(mib_counters.excessive_collision) }, + { "multicast_frames_sent", MV643XX_STAT(mib_counters.multicast_frames_sent) }, + { "broadcast_frames_sent", MV643XX_STAT(mib_counters.broadcast_frames_sent) }, + { "unrec_mac_control_received", MV643XX_STAT(mib_counters.unrec_mac_control_received) }, + { "fc_sent", MV643XX_STAT(mib_counters.fc_sent) }, + { "good_fc_received", MV643XX_STAT(mib_counters.good_fc_received) }, + { "bad_fc_received", MV643XX_STAT(mib_counters.bad_fc_received) }, + { "undersize_received", MV643XX_STAT(mib_counters.undersize_received) }, + { "fragments_received", MV643XX_STAT(mib_counters.fragments_received) }, + { "oversize_received", MV643XX_STAT(mib_counters.oversize_received) }, + { "jabber_received", MV643XX_STAT(mib_counters.jabber_received) }, + { "mac_receive_error", MV643XX_STAT(mib_counters.mac_receive_error) }, + { "bad_crc_event", MV643XX_STAT(mib_counters.bad_crc_event) }, + { "collision", MV643XX_STAT(mib_counters.collision) }, + { "late_collision", MV643XX_STAT(mib_counters.late_collision) }, +}; + +#define MV643XX_STATS_LEN \ + sizeof(mv643xx_gstrings_stats) / sizeof(struct mv643xx_stats) + +static void mv643xx_get_drvinfo(struct net_device *netdev, + struct ethtool_drvinfo *drvinfo) +{ + strncpy(drvinfo->driver, mv643xx_driver_name, 32); + strncpy(drvinfo->version, mv643xx_driver_version, 32); + strncpy(drvinfo->fw_version, "N/A", 32); + strncpy(drvinfo->bus_info, "mv643xx", 32); + drvinfo->n_stats = MV643XX_STATS_LEN; +} + +static int mv643xx_get_stats_count(struct net_device *netdev) +{ + return MV643XX_STATS_LEN; +} + +static void mv643xx_get_ethtool_stats(struct net_device *netdev, + struct ethtool_stats *stats, uint64_t *data) +{ + struct mv643xx_private *mp = netdev->priv; + int i; + + eth_update_mib_counters(mp); + + for (i = 0; i < MV643XX_STATS_LEN; i++) { + char *p = (char *)mp+mv643xx_gstrings_stats[i].stat_offset; + data[i] = (mv643xx_gstrings_stats[i].sizeof_stat == + sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p; + } +} + +static void mv643xx_get_strings(struct net_device *netdev, uint32_t stringset, + uint8_t *data) +{ + int i; + + switch(stringset) { + case ETH_SS_STATS: + for (i=0; i < MV643XX_STATS_LEN; i++) { + memcpy(data + i * ETH_GSTRING_LEN, + mv643xx_gstrings_stats[i].stat_string, + ETH_GSTRING_LEN); + } + break; + } +} + +static u32 mv643xx_eth_get_link(struct net_device *dev) +{ + struct mv643xx_private *mp = netdev_priv(dev); + + return mii_link_ok(&mp->mii); +} + +static int mv643xx_eth_nway_restart(struct net_device *dev) +{ + struct mv643xx_private *mp = netdev_priv(dev); + + return mii_nway_restart(&mp->mii); +} + +static int mv643xx_eth_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) +{ + struct mv643xx_private *mp = netdev_priv(dev); + + return generic_mii_ioctl(&mp->mii, if_mii(ifr), cmd, NULL); +} + +static struct ethtool_ops mv643xx_ethtool_ops = { + .get_settings = mv643xx_get_settings, + .set_settings = mv643xx_set_settings, + .get_drvinfo = mv643xx_get_drvinfo, + .get_link = mv643xx_eth_get_link, + .get_sg = ethtool_op_get_sg, + .set_sg = ethtool_op_set_sg, + .get_strings = mv643xx_get_strings, + .get_stats_count = mv643xx_get_stats_count, + .get_ethtool_stats = mv643xx_get_ethtool_stats, + .get_strings = mv643xx_get_strings, + .get_stats_count = mv643xx_get_stats_count, + .get_ethtool_stats = mv643xx_get_ethtool_stats, + .nway_reset = mv643xx_eth_nway_restart, +}; + +/************* End ethtool support *************************/