X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=drivers%2Fpci%2Fhotplug%2Fshpchp_pci.c;h=0a6b25ef194c2991e36d3be4e2bb605b61a4bed4;hb=97bf2856c6014879bd04983a3e9dfcdac1e7fe85;hp=19e1a5e1e30b87e8c064346082b74fb21dc6de2d;hpb=76828883507a47dae78837ab5dec5a5b4513c667;p=linux-2.6.git diff --git a/drivers/pci/hotplug/shpchp_pci.c b/drivers/pci/hotplug/shpchp_pci.c index 19e1a5e1e..0a6b25ef1 100644 --- a/drivers/pci/hotplug/shpchp_pci.c +++ b/drivers/pci/hotplug/shpchp_pci.c @@ -38,7 +38,7 @@ static void program_fw_provided_values(struct pci_dev *dev) { u16 pci_cmd, pci_bctl; struct pci_dev *cdev; - struct hotplug_params hpp = {0x8, 0x40, 0, 0}; /* defaults */ + struct hotplug_params hpp; /* Program hpp values for this device */ if (!(dev->hdr_type == PCI_HEADER_TYPE_NORMAL || @@ -46,16 +46,29 @@ static void program_fw_provided_values(struct pci_dev *dev) (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI))) return; - get_hp_params_from_firmware(dev, &hpp); + /* use default values if we can't get them from firmware */ + if (get_hp_params_from_firmware(dev, &hpp) || + !hpp.t0 || (hpp.t0->revision > 1)) { + printk(KERN_WARNING + "%s: Could not get hotplug parameters. Use defaults\n", + __FUNCTION__); + hpp.t0 = &hpp.type0_data; + hpp.t0->revision = 0; + hpp.t0->cache_line_size = 8; + hpp.t0->latency_timer = 0x40; + hpp.t0->enable_serr = 0; + hpp.t0->enable_perr = 0; + } - pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, hpp.cache_line_size); - pci_write_config_byte(dev, PCI_LATENCY_TIMER, hpp.latency_timer); + pci_write_config_byte(dev, + PCI_CACHE_LINE_SIZE, hpp.t0->cache_line_size); + pci_write_config_byte(dev, PCI_LATENCY_TIMER, hpp.t0->latency_timer); pci_read_config_word(dev, PCI_COMMAND, &pci_cmd); - if (hpp.enable_serr) + if (hpp.t0->enable_serr) pci_cmd |= PCI_COMMAND_SERR; else pci_cmd &= ~PCI_COMMAND_SERR; - if (hpp.enable_perr) + if (hpp.t0->enable_perr) pci_cmd |= PCI_COMMAND_PARITY; else pci_cmd &= ~PCI_COMMAND_PARITY; @@ -64,13 +77,13 @@ static void program_fw_provided_values(struct pci_dev *dev) /* Program bridge control value and child devices */ if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER, - hpp.latency_timer); + hpp.t0->latency_timer); pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &pci_bctl); - if (hpp.enable_serr) + if (hpp.t0->enable_serr) pci_bctl |= PCI_BRIDGE_CTL_SERR; else pci_bctl &= ~PCI_BRIDGE_CTL_SERR; - if (hpp.enable_perr) + if (hpp.t0->enable_perr) pci_bctl |= PCI_BRIDGE_CTL_PARITY; else pci_bctl &= ~PCI_BRIDGE_CTL_PARITY;