X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=drivers%2Fpcmcia%2Fpxa2xx_base.c;h=b3518131ea0d502c1677e392ac3242771330e418;hb=16c70f8c1b54b61c3b951b6fb220df250fe09b32;hp=d595ba75790b268a1fc7ce48b29064a672b16b88;hpb=86090fcac5e27b630656fe3d963a6b80e26dac44;p=linux-2.6.git diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c index d595ba757..b3518131e 100644 --- a/drivers/pcmcia/pxa2xx_base.c +++ b/drivers/pcmcia/pxa2xx_base.c @@ -18,17 +18,17 @@ #include #include -#include #include #include #include -#include #include +#include #include #include #include #include +#include #include #include @@ -113,26 +113,59 @@ static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock ) return 0; } -static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int lclk) +static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int clk) { struct soc_pcmcia_timing timing; int sock = skt->nr; soc_common_pcmcia_get_timing(skt, &timing); - pxa2xx_pcmcia_set_mcmem(sock, timing.mem, lclk); - pxa2xx_pcmcia_set_mcatt(sock, timing.attr, lclk); - pxa2xx_pcmcia_set_mcio(sock, timing.io, lclk); + pxa2xx_pcmcia_set_mcmem(sock, timing.mem, clk); + pxa2xx_pcmcia_set_mcatt(sock, timing.attr, clk); + pxa2xx_pcmcia_set_mcio(sock, timing.io, clk); return 0; } static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt) { - unsigned int lclk = get_lclk_frequency_10khz(); - return pxa2xx_pcmcia_set_mcxx(skt, lclk); + unsigned int clk = get_memclk_frequency_10khz(); + return pxa2xx_pcmcia_set_mcxx(skt, clk); } +#ifdef CONFIG_CPU_FREQ + +static int +pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt, + unsigned long val, + struct cpufreq_freqs *freqs) +{ +#warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock" + switch (val) { + case CPUFREQ_PRECHANGE: + if (freqs->new > freqs->old) { + debug(skt, 2, "new frequency %u.%uMHz > %u.%uMHz, " + "pre-updating\n", + freqs->new / 1000, (freqs->new / 100) % 10, + freqs->old / 1000, (freqs->old / 100) % 10); + pxa2xx_pcmcia_set_mcxx(skt, freqs->new); + } + break; + + case CPUFREQ_POSTCHANGE: + if (freqs->new < freqs->old) { + debug(skt, 2, "new frequency %u.%uMHz < %u.%uMHz, " + "post-updating\n", + freqs->new / 1000, (freqs->new / 100) % 10, + freqs->old / 1000, (freqs->old / 100) % 10); + pxa2xx_pcmcia_set_mcxx(skt, freqs->new); + } + break; + } + return 0; +} +#endif + int pxa2xx_drv_pcmcia_probe(struct device *dev) { int ret; @@ -146,41 +179,11 @@ int pxa2xx_drv_pcmcia_probe(struct device *dev) first = ops->first; nr = ops->nr; - /* Setup GPIOs for PCMCIA/CF alternate function mode. - * - * It would be nice if set_GPIO_mode included support - * for driving GPIO outputs to default high/low state - * before programming GPIOs as outputs. Setting GPIO - * outputs to default high/low state via GPSR/GPCR - * before defining them as outputs should reduce - * the possibility of glitching outputs during GPIO - * setup. This of course assumes external terminators - * are present to hold GPIOs in a defined state. - * - * In the meantime, setup default state of GPIO - * outputs before we enable them as outputs. - */ - - GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) | - GPIO_bit(GPIO49_nPWE) | - GPIO_bit(GPIO50_nPIOR) | - GPIO_bit(GPIO51_nPIOW) | - GPIO_bit(GPIO52_nPCE_1) | - GPIO_bit(GPIO53_nPCE_2); - - pxa_gpio_mode(GPIO48_nPOE_MD); - pxa_gpio_mode(GPIO49_nPWE_MD); - pxa_gpio_mode(GPIO50_nPIOR_MD); - pxa_gpio_mode(GPIO51_nPIOW_MD); - pxa_gpio_mode(GPIO52_nPCE_1_MD); - pxa_gpio_mode(GPIO53_nPCE_2_MD); - pxa_gpio_mode(GPIO54_pSKTSEL_MD); /* REVISIT: s/b dependent on num sockets */ - pxa_gpio_mode(GPIO55_nPREG_MD); - pxa_gpio_mode(GPIO56_nPWAIT_MD); - pxa_gpio_mode(GPIO57_nIOIS16_MD); - /* Provide our PXA2xx specific timing routines. */ ops->set_timing = pxa2xx_pcmcia_set_timing; +#ifdef CONFIG_CPU_FREQ + ops->frequency_change = pxa2xx_pcmcia_frequency_change; +#endif ret = soc_common_drv_pcmcia_probe(dev, ops, first, nr); @@ -202,130 +205,36 @@ int pxa2xx_drv_pcmcia_probe(struct device *dev) } EXPORT_SYMBOL(pxa2xx_drv_pcmcia_probe); -static int pxa2xx_drv_pcmcia_suspend(struct device *dev, u32 state, u32 level) +static int pxa2xx_drv_pcmcia_resume(struct device *dev) { - int ret = 0; - if (level == SUSPEND_SAVE_STATE) - ret = pcmcia_socket_dev_suspend(dev, state); - return ret; -} + struct pcmcia_low_level *ops = dev->platform_data; + int nr = ops ? ops->nr : 0; -static int pxa2xx_drv_pcmcia_resume(struct device *dev, u32 level) -{ - int ret = 0; - if (level == RESUME_RESTORE_STATE) - ret = pcmcia_socket_dev_resume(dev); - return ret; + MECR = nr > 1 ? MECR_CIT | MECR_NOS : (nr > 0 ? MECR_CIT : 0); + + return pcmcia_socket_dev_resume(dev); } static struct device_driver pxa2xx_pcmcia_driver = { .probe = pxa2xx_drv_pcmcia_probe, .remove = soc_common_drv_pcmcia_remove, - .suspend = pxa2xx_drv_pcmcia_suspend, + .suspend = pcmcia_socket_dev_suspend, .resume = pxa2xx_drv_pcmcia_resume, .name = "pxa2xx-pcmcia", .bus = &platform_bus_type, }; -#ifdef CONFIG_CPU_FREQ - -/* - * When pxa2xx_pcmcia_notifier() decides that a MC{IO,MEM,ATT} adjustment (due - * to a core clock frequency change) is needed, this routine establishes - * new values consistent with the clock speed `clock'. - */ -static void pxa2xx_pcmcia_update_mcxx(unsigned int clock) -{ - struct soc_pcmcia_socket *skt; - - down(&soc_sockets_lock); - list_for_each_entry(skt, &soc_sockets, node) { - pxa2xx_pcmcia_set_mcxx(skt, clock); - } - up(&soc_sockets_lock); -} - -/* - * When changing the processor L clock frequency, it is necessary - * to adjust the MCXX timings accordingly. We've recorded the timings - * requested by Card Services, so this is just a matter of finding - * out what our current speed is, and then recomputing the new MCXX - * values. - * - * Returns: 0 on success, -1 on error - */ -static int -pxa2xx_pcmcia_notifier(struct notifier_block *nb, unsigned long val, void *data) -{ - struct cpufreq_freqs *freqs = data; - -#warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock" - switch (val) { - case CPUFREQ_PRECHANGE: - if (freqs->new > freqs->old) { - debug( 2, "new frequency %u.%uMHz > %u.%uMHz, " - "pre-updating\n", - freqs->new / 1000, (freqs->new / 100) % 10, - freqs->old / 1000, (freqs->old / 100) % 10); - pxa2xx_pcmcia_update_mcxx(freqs->new); - } - break; - - case CPUFREQ_POSTCHANGE: - if (freqs->new < freqs->old) { - debug( 2, "new frequency %u.%uMHz < %u.%uMHz, " - "post-updating\n", - freqs->new / 1000, (freqs->new / 100) % 10, - freqs->old / 1000, (freqs->old / 100) % 10); - pxa2xx_pcmcia_update_mcxx(freqs->new); - } - break; - } - - return 0; -} - -static struct notifier_block pxa2xx_pcmcia_notifier_block = { - .notifier_call = pxa2xx_pcmcia_notifier -}; - -static int __init pxa2xx_pcmcia_cpufreq_init(void) -{ - int ret; - - ret = cpufreq_register_notifier(&pxa2xx_pcmcia_notifier_block, - CPUFREQ_TRANSITION_NOTIFIER); - if (ret < 0) - printk(KERN_ERR "Unable to register CPU frequency change " - "notifier for PCMCIA (%d)\n", ret); - return ret; -} - -static void __exit pxa2xx_pcmcia_cpufreq_exit(void) -{ - cpufreq_unregister_notifier(&pxa2xx_pcmcia_notifier_block, CPUFREQ_TRANSITION_NOTIFIER); -} - -#else -#define pxa2xx_pcmcia_cpufreq_init() -#define pxa2xx_pcmcia_cpufreq_exit() -#endif - static int __init pxa2xx_pcmcia_init(void) { - int ret = driver_register(&pxa2xx_pcmcia_driver); - if (ret == 0) - pxa2xx_pcmcia_cpufreq_init(); - return ret; + return driver_register(&pxa2xx_pcmcia_driver); } static void __exit pxa2xx_pcmcia_exit(void) { - pxa2xx_pcmcia_cpufreq_exit(); driver_unregister(&pxa2xx_pcmcia_driver); } -module_init(pxa2xx_pcmcia_init); +fs_initcall(pxa2xx_pcmcia_init); module_exit(pxa2xx_pcmcia_exit); MODULE_AUTHOR("Stefan Eletzhofer and Ian Molton ");