X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=drivers%2Ftc%2Fzs.h;h=13512200ceba045954066e2cabeac442a22fb47e;hb=43bc926fffd92024b46cafaf7350d669ba9ca884;hp=5c5a719b57422295a36a1f0cf4273d37722511d9;hpb=cee37fe97739d85991964371c1f3a745c00dd236;p=linux-2.6.git diff --git a/drivers/tc/zs.h b/drivers/tc/zs.h index 5c5a719b5..13512200c 100644 --- a/drivers/tc/zs.h +++ b/drivers/tc/zs.h @@ -6,14 +6,14 @@ * * Copyright (C) 1996 Paul Mackerras (Paul.Mackerras@cs.anu.edu.au) * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 2004 Maciej W. Rozycki + * Copyright (C) 2004, 2005 Maciej W. Rozycki */ #ifndef _DECSERIAL_H #define _DECSERIAL_H #include -#define NUM_ZSREGS 16 +#define NUM_ZSREGS 16 struct serial_struct { int type; @@ -24,11 +24,11 @@ struct serial_struct { int xmit_fifo_size; int custom_divisor; int baud_base; - unsigned int close_delay; + unsigned short close_delay; char reserved_char[2]; int hub6; - unsigned int closing_wait; /* time to wait before closing */ - unsigned int closing_wait2; /* no longer used... */ + unsigned short closing_wait; /* time to wait before closing */ + unsigned short closing_wait2; /* no longer used... */ int reserved[4]; }; @@ -128,8 +128,8 @@ struct dec_serial { int custom_divisor; int x_char; /* XON/XOFF character. */ int close_delay; - unsigned int closing_wait; - unsigned int closing_wait2; + unsigned short closing_wait; + unsigned short closing_wait2; unsigned long event; unsigned long last_active; int line; @@ -139,8 +139,7 @@ struct dec_serial { int xmit_head; int xmit_tail; int xmit_cnt; - struct tq_struct tqueue; - struct tq_struct tqueue_hangup; + struct tasklet_struct tlet; wait_queue_head_t open_wait; wait_queue_head_t close_wait; }; @@ -282,7 +281,7 @@ struct dec_serial { #define DLC 4 /* Disable Lower Chain */ #define MIE 8 /* Master Interrupt Enable */ #define STATHI 0x10 /* Status high */ -#define SOFTACK 0x20 /* Software Interrupt Acknowledge */ +#define SOFTACK 0x20 /* Software Interrupt Acknowledge */ #define NORESET 0 /* No reset on write to R9 */ #define CHRB 0x40 /* Reset channel B */ #define CHRA 0x80 /* Reset channel A */ @@ -395,8 +394,8 @@ struct dec_serial { /* Read Register 15 (value of WR 15) */ /* Misc macros */ -#define ZS_CLEARERR(channel) (write_zsreg(channel, 0, ERR_RES)) -#define ZS_CLEARFIFO(channel) do { volatile unsigned char garbage; \ +#define ZS_CLEARERR(channel) (write_zsreg(channel, 0, ERR_RES)) +#define ZS_CLEARFIFO(channel) do { volatile unsigned char garbage; \ garbage = read_zsdata(channel); \ garbage = read_zsdata(channel); \ garbage = read_zsdata(channel); \