X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=drivers%2Fw1%2Fw1_io.c;h=30b6fbf83bd4a9fcead97864e679d6c7bd222d07;hb=a2f44b27303a5353859d77a3e96a1d3f33f56ab7;hp=02796b5a39f6d8ce8462b01a96aebe0272a427db;hpb=20fcd31c96d8a7938e49ec2bc2249a5256b1ab2f;p=linux-2.6.git diff --git a/drivers/w1/w1_io.c b/drivers/w1/w1_io.c index 02796b5a3..30b6fbf83 100644 --- a/drivers/w1/w1_io.c +++ b/drivers/w1/w1_io.c @@ -1,8 +1,8 @@ /* - * w1_io.c + * w1_io.c * * Copyright (c) 2004 Evgeniy Polyakov - * + * * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -23,12 +23,12 @@ #include #include +#include #include "w1.h" #include "w1_log.h" -#include "w1_io.h" -int w1_delay_parm = 1; +static int w1_delay_parm = 1; module_param_named(delay_coef, w1_delay_parm, int, 0); static u8 w1_crc8_table[] = { @@ -50,20 +50,34 @@ static u8 w1_crc8_table[] = { 116, 42, 200, 150, 21, 75, 169, 247, 182, 232, 10, 84, 215, 137, 107, 53 }; -void w1_delay(unsigned long tm) +static void w1_delay(unsigned long tm) { udelay(tm * w1_delay_parm); } -u8 w1_touch_bit(struct w1_master *dev, int bit) +static void w1_write_bit(struct w1_master *dev, int bit); +static u8 w1_read_bit(struct w1_master *dev); + +/** + * Generates a write-0 or write-1 cycle and samples the level. + */ +static u8 w1_touch_bit(struct w1_master *dev, int bit) { if (dev->bus_master->touch_bit) return dev->bus_master->touch_bit(dev->bus_master->data, bit); - else + else if (bit) return w1_read_bit(dev); + else { + w1_write_bit(dev, 0); + return(0); + } } -void w1_write_bit(struct w1_master *dev, int bit) +/** + * Generates a write-0 or write-1 cycle. + * Only call if dev->bus_master->touch_bit is NULL + */ +static void w1_write_bit(struct w1_master *dev, int bit) { if (bit) { dev->bus_master->write_bit(dev->bus_master->data, 0); @@ -78,6 +92,12 @@ void w1_write_bit(struct w1_master *dev, int bit) } } +/** + * Writes 8 bits. + * + * @param dev the master device + * @param byte the byte to write + */ void w1_write_8(struct w1_master *dev, u8 byte) { int i; @@ -86,10 +106,16 @@ void w1_write_8(struct w1_master *dev, u8 byte) dev->bus_master->write_byte(dev->bus_master->data, byte); else for (i = 0; i < 8; ++i) - w1_write_bit(dev, (byte >> i) & 0x1); + w1_touch_bit(dev, (byte >> i) & 0x1); } +EXPORT_SYMBOL_GPL(w1_write_8); + -u8 w1_read_bit(struct w1_master *dev) +/** + * Generates a write-1 cycle and samples the level. + * Only call if dev->bus_master->touch_bit is NULL + */ +static u8 w1_read_bit(struct w1_master *dev) { int result; @@ -104,7 +130,54 @@ u8 w1_read_bit(struct w1_master *dev) return result & 0x1; } -u8 w1_read_8(struct w1_master * dev) +/** + * Does a triplet - used for searching ROM addresses. + * Return bits: + * bit 0 = id_bit + * bit 1 = comp_bit + * bit 2 = dir_taken + * If both bits 0 & 1 are set, the search should be restarted. + * + * @param dev the master device + * @param bdir the bit to write if both id_bit and comp_bit are 0 + * @return bit fields - see above + */ +u8 w1_triplet(struct w1_master *dev, int bdir) +{ + if ( dev->bus_master->triplet ) + return(dev->bus_master->triplet(dev->bus_master->data, bdir)); + else { + u8 id_bit = w1_touch_bit(dev, 1); + u8 comp_bit = w1_touch_bit(dev, 1); + u8 retval; + + if ( id_bit && comp_bit ) + return(0x03); /* error */ + + if ( !id_bit && !comp_bit ) { + /* Both bits are valid, take the direction given */ + retval = bdir ? 0x04 : 0; + } else { + /* Only one bit is valid, take that direction */ + bdir = id_bit; + retval = id_bit ? 0x05 : 0x02; + } + + if ( dev->bus_master->touch_bit ) + w1_touch_bit(dev, bdir); + else + w1_write_bit(dev, bdir); + return(retval); + } +} + +/** + * Reads 8 bits. + * + * @param dev the master device + * @return the byte read + */ +static u8 w1_read_8(struct w1_master * dev) { int i; u8 res = 0; @@ -113,12 +186,20 @@ u8 w1_read_8(struct w1_master * dev) res = dev->bus_master->read_byte(dev->bus_master->data); else for (i = 0; i < 8; ++i) - res |= (w1_read_bit(dev) << i); + res |= (w1_touch_bit(dev,1) << i); return res; } -void w1_write_block(struct w1_master *dev, u8 *buf, int len) +/** + * Writes a series of bytes. + * + * @param dev the master device + * @param buf pointer to the data to write + * @param len the number of bytes to write + * @return the byte read + */ +void w1_write_block(struct w1_master *dev, const u8 *buf, int len) { int i; @@ -128,7 +209,16 @@ void w1_write_block(struct w1_master *dev, u8 *buf, int len) for (i = 0; i < len; ++i) w1_write_8(dev, buf[i]); } +EXPORT_SYMBOL_GPL(w1_write_block); +/** + * Reads a series of bytes. + * + * @param dev the master device + * @param buf pointer to the buffer to fill + * @param len the number of bytes to read + * @return the number of bytes read + */ u8 w1_read_block(struct w1_master *dev, u8 *buf, int len) { int i; @@ -144,10 +234,17 @@ u8 w1_read_block(struct w1_master *dev, u8 *buf, int len) return ret; } +EXPORT_SYMBOL_GPL(w1_read_block); +/** + * Issues a reset bus sequence. + * + * @param dev The bus master pointer + * @return 0=Device present, 1=No device present or error + */ int w1_reset_bus(struct w1_master *dev) { - int result = 0; + int result; if (dev->bus_master->reset_bus) result = dev->bus_master->reset_bus(dev->bus_master->data) & 0x1; @@ -163,6 +260,7 @@ int w1_reset_bus(struct w1_master *dev) return result; } +EXPORT_SYMBOL_GPL(w1_reset_bus); u8 w1_calc_crc8(u8 * data, int len) { @@ -173,23 +271,37 @@ u8 w1_calc_crc8(u8 * data, int len) return crc; } +EXPORT_SYMBOL_GPL(w1_calc_crc8); -void w1_search_devices(struct w1_master *dev, w1_slave_found_callback cb) +void w1_search_devices(struct w1_master *dev, u8 search_type, w1_slave_found_callback cb) { dev->attempts++; if (dev->bus_master->search) - dev->bus_master->search(dev->bus_master->data, cb); + dev->bus_master->search(dev->bus_master->data, search_type, cb); else - w1_search(dev); + w1_search(dev, search_type, cb); } -EXPORT_SYMBOL(w1_write_bit); -EXPORT_SYMBOL(w1_write_8); -EXPORT_SYMBOL(w1_read_bit); -EXPORT_SYMBOL(w1_read_8); -EXPORT_SYMBOL(w1_reset_bus); -EXPORT_SYMBOL(w1_calc_crc8); -EXPORT_SYMBOL(w1_delay); -EXPORT_SYMBOL(w1_read_block); -EXPORT_SYMBOL(w1_write_block); -EXPORT_SYMBOL(w1_search_devices); +/** + * Resets the bus and then selects the slave by sending either a skip rom + * or a rom match. + * The w1 master lock must be held. + * + * @param sl the slave to select + * @return 0=success, anything else=error + */ +int w1_reset_select_slave(struct w1_slave *sl) +{ + if (w1_reset_bus(sl->master)) + return -1; + + if (sl->master->slave_count == 1) + w1_write_8(sl->master, W1_SKIP_ROM); + else { + u8 match[9] = {W1_MATCH_ROM, }; + memcpy(&match[1], (u8 *)&sl->reg_num, 8); + w1_write_block(sl->master, match, 9); + } + return 0; +} +EXPORT_SYMBOL_GPL(w1_reset_select_slave);