X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=include%2Fasm-arm%2Farch-ixp4xx%2Fplatform.h;h=ab194e5f66537cac410c457483282b410d7b6acb;hb=refs%2Fheads%2Fvserver;hp=52c1c445c5360f72a217cff0ff7a56ee354bc44e;hpb=e812ccbe0c915857ebea6a632bfadc631f7504a9;p=linux-2.6.git diff --git a/include/asm-arm/arch-ixp4xx/platform.h b/include/asm-arm/arch-ixp4xx/platform.h index 52c1c445c..ab194e5f6 100644 --- a/include/asm-arm/arch-ixp4xx/platform.h +++ b/include/asm-arm/arch-ixp4xx/platform.h @@ -15,21 +15,55 @@ #include +#ifndef __ARMEB__ +#define REG_OFFSET 0 +#else +#define REG_OFFSET 3 +#endif + /* * Expansion bus memory regions */ #define IXP4XX_EXP_BUS_BASE_PHYS (0x50000000) -#define IXP4XX_EXP_BUS_CSX_REGION_SIZE (0x01000000) +/* + * The expansion bus on the IXP4xx can be configured for either 16 or + * 32MB windows and the CS offset for each region changes based on the + * current configuration. This means that we cannot simply hardcode + * each offset. ixp4xx_sys_init() looks at the expansion bus configuration + * as setup by the bootloader to determine our window size. + */ +extern unsigned long ixp4xx_exp_bus_size; + +#define IXP4XX_EXP_BUS_BASE(region)\ + (IXP4XX_EXP_BUS_BASE_PHYS + ((region) * ixp4xx_exp_bus_size)) + +#define IXP4XX_EXP_BUS_END(region)\ + (IXP4XX_EXP_BUS_BASE(region) + ixp4xx_exp_bus_size - 1) -#define IXP4XX_EXP_BUS_CS0_BASE_PHYS (IXP4XX_EXP_BUS_BASE_PHYS + 0x00000000) -#define IXP4XX_EXP_BUS_CS1_BASE_PHYS (IXP4XX_EXP_BUS_BASE_PHYS + 0x01000000) -#define IXP4XX_EXP_BUS_CS2_BASE_PHYS (IXP4XX_EXP_BUS_BASE_PHYS + 0x02000000) -#define IXP4XX_EXP_BUS_CS3_BASE_PHYS (IXP4XX_EXP_BUS_BASE_PHYS + 0x03000000) -#define IXP4XX_EXP_BUS_CS4_BASE_PHYS (IXP4XX_EXP_BUS_BASE_PHYS + 0x04000000) -#define IXP4XX_EXP_BUS_CS5_BASE_PHYS (IXP4XX_EXP_BUS_BASE_PHYS + 0x05000000) -#define IXP4XX_EXP_BUS_CS6_BASE_PHYS (IXP4XX_EXP_BUS_BASE_PHYS + 0x06000000) -#define IXP4XX_EXP_BUS_CS7_BASE_PHYS (IXP4XX_EXP_BUS_BASE_PHYS + 0x07000000) +/* Those macros can be used to adjust timing and configure + * other features for each region. + */ + +#define IXP4XX_EXP_BUS_RECOVERY_T(x) (((x) & 0x0f) << 16) +#define IXP4XX_EXP_BUS_HOLD_T(x) (((x) & 0x03) << 20) +#define IXP4XX_EXP_BUS_STROBE_T(x) (((x) & 0x0f) << 22) +#define IXP4XX_EXP_BUS_SETUP_T(x) (((x) & 0x03) << 26) +#define IXP4XX_EXP_BUS_ADDR_T(x) (((x) & 0x03) << 28) +#define IXP4XX_EXP_BUS_SIZE(x) (((x) & 0x0f) << 10) +#define IXP4XX_EXP_BUS_CYCLES(x) (((x) & 0x03) << 14) + +#define IXP4XX_EXP_BUS_CS_EN (1L << 31) +#define IXP4XX_EXP_BUS_BYTE_RD16 (1L << 6) +#define IXP4XX_EXP_BUS_HRDY_POL (1L << 5) +#define IXP4XX_EXP_BUS_MUX_EN (1L << 4) +#define IXP4XX_EXP_BUS_SPLT_EN (1L << 3) +#define IXP4XX_EXP_BUS_WR_EN (1L << 1) +#define IXP4XX_EXP_BUS_BYTE_EN (1L << 0) + +#define IXP4XX_EXP_BUS_CYCLES_INTEL 0x00 +#define IXP4XX_EXP_BUS_CYCLES_MOTOROLA 0x01 +#define IXP4XX_EXP_BUS_CYCLES_HPI 0x02 #define IXP4XX_FLASH_WRITABLE (0x2) #define IXP4XX_FLASH_DEFAULT (0xbcd23c40) @@ -52,12 +86,34 @@ struct ixp4xx_i2c_pins { unsigned long scl_pin; }; +/* + * This structure provide a means for the board setup code + * to give information to th pata_ixp4xx driver. It is + * passed as platform_data. + */ +struct ixp4xx_pata_data { + volatile u32 *cs0_cfg; + volatile u32 *cs1_cfg; + unsigned long cs0_bits; + unsigned long cs1_bits; + void __iomem *cs0; + void __iomem *cs1; +}; + +struct sys_timer; + +/* + * Frequency of clock used for primary clocksource + */ +extern unsigned long ixp4xx_timer_freq; /* * Functions used by platform-level setup code */ extern void ixp4xx_map_io(void); extern void ixp4xx_init_irq(void); +extern void ixp4xx_sys_init(void); +extern struct sys_timer ixp4xx_timer; extern void ixp4xx_pci_preinit(void); struct pci_sys_data; extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); @@ -73,17 +129,6 @@ extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys); #define IXP4XX_GPIO_OUT 0x1 #define IXP4XX_GPIO_IN 0x2 -#define IXP4XX_GPIO_INTSTYLE_MASK 0x7C /* Bits [6:2] define interrupt style */ - -/* - * GPIO interrupt types. - */ -#define IXP4XX_GPIO_ACTIVE_HIGH 0x4 /* Default */ -#define IXP4XX_GPIO_ACTIVE_LOW 0x8 -#define IXP4XX_GPIO_RISING_EDGE 0x10 -#define IXP4XX_GPIO_FALLING_EDGE 0x20 -#define IXP4XX_GPIO_TRANSITIONAL 0x40 - /* GPIO signal types */ #define IXP4XX_GPIO_LOW 0 #define IXP4XX_GPIO_HIGH 1 @@ -92,7 +137,13 @@ extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys); #define IXP4XX_GPIO_CLK_0 14 #define IXP4XX_GPIO_CLK_1 15 -extern void gpio_line_config(u8 line, u32 style); +static inline void gpio_line_config(u8 line, u32 direction) +{ + if (direction == IXP4XX_GPIO_IN) + *IXP4XX_GPIO_GPOER |= (1 << line); + else + *IXP4XX_GPIO_GPOER &= ~(1 << line); +} static inline void gpio_line_get(u8 line, int *value) { @@ -107,10 +158,5 @@ static inline void gpio_line_set(u8 line, int value) *IXP4XX_GPIO_GPOUTR &= ~(1 << line); } -static inline void gpio_line_isr_clear(u8 line) -{ - *IXP4XX_GPIO_GPISR = (1 << line); -} - #endif // __ASSEMBLY__