X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=include%2Fasm-arm%2Farch-omap%2Fhardware.h;h=7909b729826c41bdbbace4d679c07fd9bf6624ea;hb=43bc926fffd92024b46cafaf7350d669ba9ca884;hp=8930a0e21a83787a9ac5dd0dda038abc99d65f21;hpb=6a77f38946aaee1cd85eeec6cf4229b204c15071;p=linux-2.6.git

diff --git a/include/asm-arm/arch-omap/hardware.h b/include/asm-arm/arch-omap/hardware.h
index 8930a0e21..7909b7298 100644
--- a/include/asm-arm/arch-omap/hardware.h
+++ b/include/asm-arm/arch-omap/hardware.h
@@ -43,6 +43,7 @@
 #include <asm/arch/cpu.h>
 #endif
 #include <asm/arch/io.h>
+#include <asm/arch/serial.h>
 
 /*
  * ---------------------------------------------------------------------------
@@ -52,6 +53,19 @@
  * ---------------------------------------------------------------------------
  */
 
+/*
+ * ----------------------------------------------------------------------------
+ * Timers
+ * ----------------------------------------------------------------------------
+ */
+#define OMAP_MPU_TIMER1_BASE	(0xfffec500)
+#define OMAP_MPU_TIMER2_BASE	(0xfffec600)
+#define OMAP_MPU_TIMER3_BASE	(0xfffec700)
+#define MPU_TIMER_FREE		(1 << 6)
+#define MPU_TIMER_CLOCK_ENABLE	(1 << 5)
+#define MPU_TIMER_AR		(1 << 1)
+#define MPU_TIMER_ST		(1 << 0)
+
 /*
  * ----------------------------------------------------------------------------
  * Clocks
@@ -76,10 +90,12 @@
 /* DPLL control registers */
 #define DPLL_CTL		(0xfffecf00)
 
-/* DSP clock control */
+/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */
 #define DSP_CONFIG_REG_BASE     (0xe1008000)
+#define DSP_CKCTL		(DSP_CONFIG_REG_BASE + 0x0)
 #define DSP_IDLECT1		(DSP_CONFIG_REG_BASE + 0x4)
 #define DSP_IDLECT2		(DSP_CONFIG_REG_BASE + 0x8)
+#define DSP_RSTCT2		(DSP_CONFIG_REG_BASE + 0x14)
 
 /*
  * ---------------------------------------------------------------------------
@@ -88,59 +104,33 @@
  */
 #define ULPD_REG_BASE		(0xfffe0800)
 #define ULPD_IT_STATUS		(ULPD_REG_BASE + 0x14)
+#define ULPD_SETUP_ANALOG_CELL_3	(ULPD_REG_BASE + 0x24)
 #define ULPD_CLOCK_CTRL		(ULPD_REG_BASE + 0x30)
+#	define DIS_USB_PVCI_CLK		(1 << 5)	/* no USB/FAC synch */
+#	define USB_MCLK_EN		(1 << 4)	/* enable W4_USB_CLKO */
 #define ULPD_SOFT_REQ		(ULPD_REG_BASE + 0x34)
+#	define SOFT_UDC_REQ		(1 << 4)
+#	define SOFT_USB_CLK_REQ		(1 << 3)
+#	define SOFT_DPLL_REQ		(1 << 0)
 #define ULPD_DPLL_CTRL		(ULPD_REG_BASE + 0x3c)
 #define ULPD_STATUS_REQ		(ULPD_REG_BASE + 0x40)
 #define ULPD_APLL_CTRL		(ULPD_REG_BASE + 0x4c)
 #define ULPD_POWER_CTRL		(ULPD_REG_BASE + 0x50)
+#define ULPD_SOFT_DISABLE_REQ_REG	(ULPD_REG_BASE + 0x68)
+#	define DIS_MMC2_DPLL_REQ	(1 << 11)
+#	define DIS_MMC1_DPLL_REQ	(1 << 10)
+#	define DIS_UART3_DPLL_REQ	(1 << 9)
+#	define DIS_UART2_DPLL_REQ	(1 << 8)
+#	define DIS_UART1_DPLL_REQ	(1 << 7)
+#	define DIS_USB_HOST_DPLL_REQ	(1 << 6)
+#define ULPD_SDW_CLK_DIV_CTRL_SEL	(ULPD_REG_BASE + 0x74)
 #define ULPD_CAM_CLK_CTRL	(ULPD_REG_BASE + 0x7c)
 
 /*
  * ---------------------------------------------------------------------------
- * Timers
+ * Watchdog timer
  * ---------------------------------------------------------------------------
  */
-#define OMAP_32kHz_TIMER_BASE 0xfffb9000
-
-/* 32k Timer Registers */
-#define TIMER32k_CR		0x08
-#define TIMER32k_TVR		0x00
-#define TIMER32k_TCR		0x04
-
-/* 32k Timer Control Register definition */
-#define TIMER32k_TSS		(1<<0)
-#define TIMER32k_TRB		(1<<1)
-#define TIMER32k_INT		(1<<2)
-#define TIMER32k_ARL		(1<<3)
-
-/* MPU Timer base addresses */
-#define OMAP_TIMER1_BASE	(0xfffec500)
-#define OMAP_TIMER2_BASE	(0xfffec600)
-#define OMAP_TIMER3_BASE	(0xfffec700)
-#define OMAP_MPUTIMER_BASE	OMAP_TIMER1_BASE
-#define OMAP_MPUTIMER_OFFSET	0x100
-
-/* MPU Timer Registers */
-#define OMAP_TIMER1_CNTL	(OMAP_TIMER_BASE1 + 0x0)
-#define OMAP_TIMER1_LOAD_TIM	(OMAP_TIMER_BASE1 + 0x4)
-#define OMAP_TIMER1_READ_TIM	(OMAP_TIMER_BASE1 + 0x8)
-
-#define OMAP_TIMER2_CNTL	(OMAP_TIMER_BASE2 + 0x0)
-#define OMAP_TIMER2_LOAD_TIM	(OMAP_TIMER_BASE2 + 0x4)
-#define OMAP_TIMER2_READ_TIM	(OMAP_TIMER_BASE2 + 0x8)
-
-#define OMAP_TIMER3_CNTL	(OMAP_TIMER_BASE3 + 0x0)
-#define OMAP_TIMER3_LOAD_TIM	(OMAP_TIMER_BASE3 + 0x4)
-#define OMAP_TIMER3_READ_TIM	(OMAP_TIMER_BASE3 + 0x8)
-
-/* CNTL_TIMER register bits */
-#define MPUTIM_FREE		(1<<6)
-#define MPUTIM_CLOCK_ENABLE	(1<<5)
-#define MPUTIM_PTV_MASK		(0x7<<MPUTIM_PTV_BIT)
-#define MPUTIM_PTV_BIT		2
-#define MPUTIM_AR		(1<<1)
-#define MPUTIM_ST		(1<<0)
 
 /* Watchdog timer within the OMAP3.2 gigacell */
 #define OMAP_MPU_WATCHDOG_BASE	(0xfffec800)
@@ -154,6 +144,13 @@
  * Interrupts
  * ---------------------------------------------------------------------------
  */
+#ifdef CONFIG_ARCH_OMAP1
+
+/*
+ * XXX: These probably want to be moved to arch/arm/mach-omap/omap1/irq.c
+ * or something similar.. -- PFM.
+ */
+
 #define OMAP_IH1_BASE		0xfffecb00
 #define OMAP_IH2_BASE		0xfffe0000
 
@@ -182,28 +179,7 @@
 #define IRQ_ILR0_REG_OFFSET	0x1c
 #define IRQ_GMR_REG_OFFSET	0xa0
 
-/*
- * ---------------------------------------------------------------------------
- * Traffic controller memory interface
- * ---------------------------------------------------------------------------
- */
-#define TCMIF_BASE		0xfffecc00
-#define IMIF_PRIO		(TCMIF_BASE + 0x00)
-#define EMIFS_PRIO		(TCMIF_BASE + 0x04)
-#define EMIFF_PRIO		(TCMIF_BASE + 0x08)
-#define EMIFS_CONFIG		(TCMIF_BASE + 0x0c)
-#define EMIFS_CS0_CONFIG	(TCMIF_BASE + 0x10)
-#define EMIFS_CS1_CONFIG	(TCMIF_BASE + 0x14)
-#define EMIFS_CS2_CONFIG	(TCMIF_BASE + 0x18)
-#define EMIFS_CS3_CONFIG	(TCMIF_BASE + 0x1c)
-#define EMIFF_SDRAM_CONFIG	(TCMIF_BASE + 0x20)
-#define EMIFF_MRS		(TCMIF_BASE + 0x24)
-#define TC_TIMEOUT1		(TCMIF_BASE + 0x28)
-#define TC_TIMEOUT2		(TCMIF_BASE + 0x2c)
-#define TC_TIMEOUT3		(TCMIF_BASE + 0x30)
-#define TC_ENDIANISM		(TCMIF_BASE + 0x34)
-#define EMIFF_SDRAM_CONFIG_2	(TCMIF_BASE + 0x3c)
-#define EMIF_CFG_DYNAMIC_WS	(TCMIF_BASE + 0x40)
+#endif
 
 /*
  * ----------------------------------------------------------------------------
@@ -279,44 +255,30 @@
 #define MPUI_DSP_BOOT_CONFIG		(MPUI_BASE + 0x18)
 #define MPUI_DSP_API_CONFIG		(MPUI_BASE + 0x1c)
 
-#ifndef __ASSEMBLER__
-
 /*
- * ---------------------------------------------------------------------------
- * Serial ports
- * ---------------------------------------------------------------------------
+ * ----------------------------------------------------------------------------
+ * LED Pulse Generator
+ * ----------------------------------------------------------------------------
  */
-#define OMAP_UART1_BASE		(unsigned char *)0xfffb0000
-#define OMAP_UART2_BASE		(unsigned char *)0xfffb0800
-#define OMAP_UART3_BASE		(unsigned char *)0xfffb9800
-#define OMAP_MAX_NR_PORTS	3
-#define OMAP1510_BASE_BAUD	(12000000/16)
-#define OMAP16XX_BASE_BAUD	(48000000/16)
-
-#define is_omap_port(p)	({int __ret = 0;				\
-			if (p == (char*)IO_ADDRESS(OMAP_UART1_BASE) ||	\
-			    p == (char*)IO_ADDRESS(OMAP_UART2_BASE) ||	\
-			    p == (char*)IO_ADDRESS(OMAP_UART3_BASE))	\
-				__ret = 1;				\
-			__ret;						\
-			})
+#define OMAP_LPG1_BASE			0xfffbd000
+#define OMAP_LPG2_BASE			0xfffbd800
+#define OMAP_LPG1_LCR			(OMAP_LPG1_BASE + 0x00)
+#define OMAP_LPG1_PMR			(OMAP_LPG1_BASE + 0x04)
+#define OMAP_LPG2_LCR			(OMAP_LPG2_BASE + 0x00)
+#define OMAP_LPG2_PMR			(OMAP_LPG2_BASE + 0x04)
 
 /*
  * ---------------------------------------------------------------------------
  * Processor specific defines
  * ---------------------------------------------------------------------------
  */
-#ifdef CONFIG_ARCH_OMAP730
-#include "omap730.h"
-#endif
 
-#ifdef CONFIG_ARCH_OMAP1510
+#include "omap730.h"
 #include "omap1510.h"
-#endif
-
-#ifdef CONFIG_ARCH_OMAP16XX
+#include "omap24xx.h"
 #include "omap16xx.h"
-#endif
+
+#ifndef __ASSEMBLER__
 
 /*
  * ---------------------------------------------------------------------------
@@ -342,13 +304,20 @@
 
 #ifdef CONFIG_MACH_OMAP_H4
 #include "board-h4.h"
-#error "Support for H4 board not yet implemented."
+#endif
+
+#ifdef CONFIG_MACH_OMAP_APOLLON
+#include "board-apollon.h"
 #endif
 
 #ifdef CONFIG_MACH_OMAP_OSK
 #include "board-osk.h"
 #endif
 
+#ifdef CONFIG_MACH_VOICEBLUE
+#include "board-voiceblue.h"
+#endif
+
 #endif /* !__ASSEMBLER__ */
 
 #endif	/* __ASM_ARCH_OMAP_HARDWARE_H */