X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=include%2Fasm-arm%2Fsystem.h;h=ec91d1ff032a5ebbeff161a91a83ef25932eb51e;hb=d89c0fdf83a938d219c07800acbb106f60a70f98;hp=7c9568d30307ff46ffafec33122de19d4f4f9e29;hpb=9464c7cf61b9433057924c36e6e02f303a00e768;p=linux-2.6.git

diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index 7c9568d30..ec91d1ff0 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -108,31 +108,6 @@ extern void __show_regs(struct pt_regs *);
 extern int cpu_architecture(void);
 extern void cpu_init(void);
 
-/*
- * Intel's XScale3 core supports some v6 features (supersections, L2)
- * but advertises itself as v5 as it does not support the v6 ISA.  For
- * this reason, we need a way to explicitly test for this type of CPU.
- */
-#ifndef CONFIG_CPU_XSC3
-#define cpu_is_xsc3()	0
-#else
-static inline int cpu_is_xsc3(void)
-{
-	extern unsigned int processor_id;
-
-	if ((processor_id & 0xffffe000) == 0x69056000)
-		return 1;
-
-	return 0;
-}
-#endif
-
-#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
-#define	cpu_is_xscale()	0
-#else
-#define	cpu_is_xscale()	1
-#endif
-
 #define set_cr(x)					\
 	__asm__ __volatile__(				\
 	"mcr	p15, 0, %0, c1, c0, 0	@ set CR"	\