X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=include%2Fasm-mips%2Fasmmacro.h;h=f54aa147ec19066ac6aa9f729f72e78f35958153;hb=43bc926fffd92024b46cafaf7350d669ba9ca884;hp=c70f00d83364cfe42887bbfbb98de801960fe75f;hpb=5273a3df6485dc2ad6aa7ddd441b9a21970f003b;p=linux-2.6.git diff --git a/include/asm-mips/asmmacro.h b/include/asm-mips/asmmacro.h index c70f00d83..f54aa147e 100644 --- a/include/asm-mips/asmmacro.h +++ b/include/asm-mips/asmmacro.h @@ -7,20 +7,41 @@ */ #ifndef _ASM_ASMMACRO_H #define _ASM_ASMMACRO_H - + #include - -#ifdef CONFIG_MIPS32 +#include + +#ifdef CONFIG_32BIT #include #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT #include #endif +#ifdef CONFIG_MIPS_MT_SMTC +#include +#endif + +#ifdef CONFIG_MIPS_MT_SMTC + .macro local_irq_enable reg=t0 + mfc0 \reg, CP0_TCSTATUS + ori \reg, \reg, TCSTATUS_IXMT + xori \reg, \reg, TCSTATUS_IXMT + mtc0 \reg, CP0_TCSTATUS + ehb + .endm + .macro local_irq_disable reg=t0 + mfc0 \reg, CP0_TCSTATUS + ori \reg, \reg, TCSTATUS_IXMT + mtc0 \reg, CP0_TCSTATUS + ehb + .endm +#else .macro local_irq_enable reg=t0 mfc0 \reg, CP0_STATUS ori \reg, \reg, 1 mtc0 \reg, CP0_STATUS + irq_enable_hazard .endm .macro local_irq_disable reg=t0 @@ -28,8 +49,9 @@ ori \reg, \reg, 1 xori \reg, \reg, 1 mtc0 \reg, CP0_STATUS - SSNOP; SSNOP; SSNOP + irq_disable_hazard .endm +#endif /* CONFIG_MIPS_MT_SMTC */ #ifdef CONFIG_CPU_SB1 .macro fpu_enable_hazard @@ -46,4 +68,31 @@ .endm #endif +/* + * Temporary until all gas have MT ASE support + */ + .macro DMT reg=0 + .word (0x41600bc1 | (\reg << 16)) + .endm + + .macro EMT reg=0 + .word (0x41600be1 | (\reg << 16)) + .endm + + .macro DVPE reg=0 + .word (0x41600001 | (\reg << 16)) + .endm + + .macro EVPE reg=0 + .word (0x41600021 | (\reg << 16)) + .endm + + .macro MFTR rt=0, rd=0, u=0, sel=0 + .word (0x41000000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)) + .endm + + .macro MTTR rt=0, rd=0, u=0, sel=0 + .word (0x41800000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)) + .endm + #endif /* _ASM_ASMMACRO_H */