X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=include%2Fasm-mips%2Fserial.h;h=e796d75f027eec786d335a782c0b3802ba647120;hb=987b0145d94eecf292d8b301228356f44611ab7c;hp=7196ceb0e94821988a2bea67bff64e90568b5c32;hpb=e6a27dba1cf83d871b2dfcd64f04f12a67e3f4d5;p=linux-2.6.git diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h index 7196ceb0e..e796d75f0 100644 --- a/include/asm-mips/serial.h +++ b/include/asm-mips/serial.h @@ -77,15 +77,15 @@ #include #define ITE_SERIAL_PORT_DEFNS \ { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_UART_BASE), \ - .irq = IT8172_UART_IRQ, .flags = STD_COM_FLAGS, .port = PORT_16550 }, \ + .irq = IT8172_UART_IRQ, .flags = STD_COM_FLAGS, .type = 0x3 }, \ { .baud_base = (24000000/(16*13)), .port = (IT8172_PCI_IO_BASE + IT8712_UART1_PORT), \ - .irq = IT8172_SERIRQ_4, .flags = STD_COM_FLAGS, .port = PORT_16550 }, \ + .irq = IT8172_SERIRQ_4, .flags = STD_COM_FLAGS, .type = 0x3 }, \ /* Smart Card Reader 0 */ \ { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR0_BASE), \ - .irq = IT8172_SCR0_IRQ, .flags = STD_COM_FLAGS, .port = PORT_16550 }, \ + .irq = IT8172_SCR0_IRQ, .flags = STD_COM_FLAGS, .type = 0x3 }, \ /* Smart Card Reader 1 */ \ { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \ - .irq = IT8172_SCR1_IRQ, .flags = STD_COM_FLAGS, .port = PORT_16550 }, + .irq = IT8172_SCR1_IRQ, .flags = STD_COM_FLAGS, .type = 0x3 }, #else #define ITE_SERIAL_PORT_DEFNS #endif @@ -95,14 +95,96 @@ #include #define IVR_SERIAL_PORT_DEFNS \ { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_UART_BASE), \ - .irq = IT8172_UART_IRQ, .flags = STD_COM_FLAGS, .port = PORT_16550 }, \ + .irq = IT8172_UART_IRQ, .flags = STD_COM_FLAGS, .type = 0x3 }, \ /* Smart Card Reader 1 */ \ { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \ - .irq = IT8172_SCR1_IRQ, .flags = STD_COM_FLAGS, .port = PORT_16550 }, + .irq = IT8172_SCR1_IRQ, .flags = STD_COM_FLAGS, .type = 0x3 }, #else #define IVR_SERIAL_PORT_DEFNS #endif +#ifdef CONFIG_SERIAL_AU1X00 +#include +#ifdef CONFIG_SOC_AU1000 +#define AU1000_SERIAL_PORT_DEFNS \ + { .baud_base = 0, .port = UART0_ADDR, \ + .iomem_base = (unsigned char *)UART0_ADDR, \ + .irq = AU1000_UART0_INT, .flags = STD_COM_FLAGS, \ + .iomem_reg_shift = 2 }, \ + { .baud_base = 0, .port = UART1_ADDR, \ + .iomem_base = (unsigned char *)UART1_ADDR, \ + .irq = AU1000_UART1_INT, .flags = STD_COM_FLAGS, \ + .iomem_reg_shift = 2 }, \ + { .baud_base = 0, .port = UART2_ADDR, \ + .iomem_base = (unsigned char *)UART2_ADDR, \ + .irq = AU1000_UART2_INT, .flags = STD_COM_FLAGS, \ + .iomem_reg_shift = 2 }, \ + { .baud_base = 0, .port = UART3_ADDR, \ + .iomem_base = (unsigned char *)UART3_ADDR, \ + .irq = AU1000_UART3_INT, .flags = STD_COM_FLAGS, \ + .iomem_reg_shift = 2 }, +#endif + +#ifdef CONFIG_SOC_AU1500 +#define AU1000_SERIAL_PORT_DEFNS \ + { .baud_base = 0, .port = UART0_ADDR, \ + .iomem_base = (unsigned char *)UART0_ADDR, \ + .irq = AU1500_UART0_INT, .flags = STD_COM_FLAGS, \ + .iomem_reg_shift = 2 }, \ + { .baud_base = 0, .port = UART3_ADDR, \ + .iomem_base = (unsigned char *)UART3_ADDR, \ + .irq = AU1500_UART3_INT, .flags = STD_COM_FLAGS, \ + .iomem_reg_shift = 2 }, +#endif + +#ifdef CONFIG_SOC_AU1100 +#define AU1000_SERIAL_PORT_DEFNS \ + { .baud_base = 0, .port = UART0_ADDR, \ + .iomem_base = (unsigned char *)UART0_ADDR, \ + .irq = AU1100_UART0_INT, .flags = STD_COM_FLAGS, \ + .iomem_reg_shift = 2 }, \ + { .baud_base = 0, .port = UART1_ADDR, \ + .iomem_base = (unsigned char *)UART1_ADDR, \ + .irq = AU1100_UART1_INT, .flags = STD_COM_FLAGS, \ + .iomem_reg_shift = 2 }, \ + { .baud_base = 0, .port = UART3_ADDR, \ + .iomem_base = (unsigned char *)UART3_ADDR, \ + .irq = AU1100_UART3_INT, .flags = STD_COM_FLAGS, \ + .iomem_reg_shift = 2 }, +#endif + +#ifdef CONFIG_SOC_AU1550 +#define AU1000_SERIAL_PORT_DEFNS \ + { .baud_base = 0, .port = UART0_ADDR, \ + .iomem_base = (unsigned char *)UART0_ADDR, \ + .irq = AU1550_UART0_INT, .flags = STD_COM_FLAGS, \ + .iomem_reg_shift = 2 }, \ + { .baud_base = 0, .port = UART1_ADDR, \ + .iomem_base = (unsigned char *)UART1_ADDR, \ + .irq = AU1550_UART1_INT, .flags = STD_COM_FLAGS, \ + .iomem_reg_shift = 2 }, \ + { .baud_base = 0, .port = UART3_ADDR, \ + .iomem_base = (unsigned char *)UART3_ADDR, \ + .irq = AU1550_UART3_INT, .flags = STD_COM_FLAGS,\ + .iomem_reg_shift = 2 }, +#endif + +#ifdef CONFIG_SOC_AU1200 +#define AU1000_SERIAL_PORT_DEFNS \ + { .baud_base = 0, .port = UART0_ADDR, \ + .iomem_base = (unsigned char *)UART0_ADDR, \ + .irq = AU1200_UART0_INT, .flags = STD_COM_FLAGS, \ + .iomem_reg_shift = 2 }, \ + { .baud_base = 0, .port = UART1_ADDR, \ + .iomem_base = (unsigned char *)UART1_ADDR, \ + .irq = AU1200_UART1_INT, .flags = STD_COM_FLAGS, \ + .iomem_reg_shift = 2 }, +#endif + +#else +#define AU1000_SERIAL_PORT_DEFNS +#endif + #ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT #define STD_SERIAL_PORT_DEFNS \ /* UART CLK PORT IRQ FLAGS */ \ @@ -249,6 +331,7 @@ MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \ MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ - MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS + MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \ + AU1000_SERIAL_PORT_DEFNS #endif /* _ASM_SERIAL_H */