X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=include%2Fasm-ppc64%2Feeh.h;h=85bc6850f08155c480f823c8d03e4d2ef8574ec1;hb=c7b5ebbddf7bcd3651947760f423e3783bbe6573;hp=928dc5e39df532a53f84b00e6eb43c458df70d8b;hpb=9213980e6a70d8473e0ffd4b39ab5b6caaba9ff5;p=linux-2.6.git diff --git a/include/asm-ppc64/eeh.h b/include/asm-ppc64/eeh.h index 928dc5e39..85bc6850f 100644 --- a/include/asm-ppc64/eeh.h +++ b/include/asm-ppc64/eeh.h @@ -24,27 +24,21 @@ #include struct pci_dev; - -/* I/O addresses are converted to EEH "tokens" such that a driver will cause - * a bad page fault if the address is used directly (i.e. these addresses are - * never actually mapped. Translation between IO <-> EEH region is 1 to 1. - */ -#define IO_TOKEN_TO_ADDR(token) \ - (((unsigned long)(token) & ~(0xfUL << REGION_SHIFT)) | \ - (IO_REGION_ID << REGION_SHIFT)) - -#define IO_ADDR_TO_TOKEN(addr) \ - (((unsigned long)(addr) & ~(0xfUL << REGION_SHIFT)) | \ - (EEH_REGION_ID << REGION_SHIFT)) +struct device_node; /* Values for eeh_mode bits in device_node */ #define EEH_MODE_SUPPORTED (1<<0) #define EEH_MODE_NOCHECK (1<<1) +#ifdef CONFIG_PPC_PSERIES extern void __init eeh_init(void); -unsigned long eeh_check_failure(void *token, unsigned long val); -void *eeh_ioremap(unsigned long addr, void *vaddr); +unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val); +int eeh_dn_check_failure (struct device_node *dn, struct pci_dev *dev); +void __iomem *eeh_ioremap(unsigned long addr, void __iomem *vaddr); void __init pci_addr_cache_build(void); +#else +#define eeh_check_failure(token, val) (val) +#endif /** * eeh_add_device_early @@ -55,6 +49,7 @@ void __init pci_addr_cache_build(void); * device (including config space i/o). Call eeh_add_device_late * to finish the eeh setup for this device. */ +struct device_node; void eeh_add_device_early(struct device_node *); void eeh_add_device_late(struct pci_dev *); @@ -76,129 +71,191 @@ int eeh_set_option(struct pci_dev *dev, int options); /* * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure. * - * Order this macro for performance. - * If EEH is off for a device and it is a memory BAR, ioremap will - * map it to the IOREGION. In this case addr == vaddr and since these - * should be in registers we compare them first. Next we check for - * ff's which indicates a (very) possible failure. - * * If this macro yields TRUE, the caller relays to eeh_check_failure() * which does further tests out of line. */ -#define EEH_POSSIBLE_IO_ERROR(val, type) ((val) == (type)~0) +#define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0) -/* The vaddr will equal the addr if EEH checking is disabled for - * this device. This is because eeh_ioremap() will not have - * remapped to 0xA0, and thus both vaddr and addr will be 0xE0... +/* + * Reads from a device which has been isolated by EEH will return + * all 1s. This macro gives an all-1s value of the given size (in + * bytes: 1, 2, or 4) for comparing with the result of a read. */ -#define EEH_POSSIBLE_ERROR(addr, vaddr, val, type) \ - ((vaddr) != (addr) && EEH_POSSIBLE_IO_ERROR(val, type)) +#define EEH_IO_ERROR_VALUE(size) (~0U >> ((4 - (size)) * 8)) /* * MMIO read/write operations with EEH support. */ -static inline u8 eeh_readb(void *addr) { - volatile u8 *vaddr = (volatile u8 *)IO_TOKEN_TO_ADDR(addr); +static inline u8 eeh_readb(const volatile void __iomem *addr) { + volatile u8 *vaddr = (volatile u8 __force *) addr; u8 val = in_8(vaddr); - if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u8)) + if (EEH_POSSIBLE_ERROR(val, u8)) return eeh_check_failure(addr, val); return val; } -static inline void eeh_writeb(u8 val, void *addr) { - volatile u8 *vaddr = (volatile u8 *)IO_TOKEN_TO_ADDR(addr); +static inline void eeh_writeb(u8 val, volatile void __iomem *addr) { + volatile u8 *vaddr = (volatile u8 __force *) addr; out_8(vaddr, val); } -static inline u16 eeh_readw(void *addr) { - volatile u16 *vaddr = (volatile u16 *)IO_TOKEN_TO_ADDR(addr); +static inline u16 eeh_readw(const volatile void __iomem *addr) { + volatile u16 *vaddr = (volatile u16 __force *) addr; u16 val = in_le16(vaddr); - if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u16)) + if (EEH_POSSIBLE_ERROR(val, u16)) return eeh_check_failure(addr, val); return val; } -static inline void eeh_writew(u16 val, void *addr) { - volatile u16 *vaddr = (volatile u16 *)IO_TOKEN_TO_ADDR(addr); +static inline void eeh_writew(u16 val, volatile void __iomem *addr) { + volatile u16 *vaddr = (volatile u16 __force *) addr; out_le16(vaddr, val); } -static inline u16 eeh_raw_readw(void *addr) { - volatile u16 *vaddr = (volatile u16 *)IO_TOKEN_TO_ADDR(addr); +static inline u16 eeh_raw_readw(const volatile void __iomem *addr) { + volatile u16 *vaddr = (volatile u16 __force *) addr; u16 val = in_be16(vaddr); - if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u16)) + if (EEH_POSSIBLE_ERROR(val, u16)) return eeh_check_failure(addr, val); return val; } -static inline void eeh_raw_writew(u16 val, void *addr) { - volatile u16 *vaddr = (volatile u16 *)IO_TOKEN_TO_ADDR(addr); +static inline void eeh_raw_writew(u16 val, volatile void __iomem *addr) { + volatile u16 *vaddr = (volatile u16 __force *) addr; out_be16(vaddr, val); } -static inline u32 eeh_readl(void *addr) { - volatile u32 *vaddr = (volatile u32 *)IO_TOKEN_TO_ADDR(addr); +static inline u32 eeh_readl(const volatile void __iomem *addr) { + volatile u32 *vaddr = (volatile u32 __force *) addr; u32 val = in_le32(vaddr); - if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u32)) + if (EEH_POSSIBLE_ERROR(val, u32)) return eeh_check_failure(addr, val); return val; } -static inline void eeh_writel(u32 val, void *addr) { - volatile u32 *vaddr = (volatile u32 *)IO_TOKEN_TO_ADDR(addr); +static inline void eeh_writel(u32 val, volatile void __iomem *addr) { + volatile u32 *vaddr = (volatile u32 __force *) addr; out_le32(vaddr, val); } -static inline u32 eeh_raw_readl(void *addr) { - volatile u32 *vaddr = (volatile u32 *)IO_TOKEN_TO_ADDR(addr); +static inline u32 eeh_raw_readl(const volatile void __iomem *addr) { + volatile u32 *vaddr = (volatile u32 __force *) addr; u32 val = in_be32(vaddr); - if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u32)) + if (EEH_POSSIBLE_ERROR(val, u32)) return eeh_check_failure(addr, val); return val; } -static inline void eeh_raw_writel(u32 val, void *addr) { - volatile u32 *vaddr = (volatile u32 *)IO_TOKEN_TO_ADDR(addr); +static inline void eeh_raw_writel(u32 val, volatile void __iomem *addr) { + volatile u32 *vaddr = (volatile u32 __force *) addr; out_be32(vaddr, val); } -static inline u64 eeh_readq(void *addr) { - volatile u64 *vaddr = (volatile u64 *)IO_TOKEN_TO_ADDR(addr); +static inline u64 eeh_readq(const volatile void __iomem *addr) { + volatile u64 *vaddr = (volatile u64 __force *) addr; u64 val = in_le64(vaddr); - if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u64)) + if (EEH_POSSIBLE_ERROR(val, u64)) return eeh_check_failure(addr, val); return val; } -static inline void eeh_writeq(u64 val, void *addr) { - volatile u64 *vaddr = (volatile u64 *)IO_TOKEN_TO_ADDR(addr); +static inline void eeh_writeq(u64 val, volatile void __iomem *addr) { + volatile u64 *vaddr = (volatile u64 __force *) addr; out_le64(vaddr, val); } -static inline u64 eeh_raw_readq(void *addr) { - volatile u64 *vaddr = (volatile u64 *)IO_TOKEN_TO_ADDR(addr); +static inline u64 eeh_raw_readq(const volatile void __iomem *addr) { + volatile u64 *vaddr = (volatile u64 __force *) addr; u64 val = in_be64(vaddr); - if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u64)) + if (EEH_POSSIBLE_ERROR(val, u64)) return eeh_check_failure(addr, val); return val; } -static inline void eeh_raw_writeq(u64 val, void *addr) { - volatile u64 *vaddr = (volatile u64 *)IO_TOKEN_TO_ADDR(addr); +static inline void eeh_raw_writeq(u64 val, volatile void __iomem *addr) { + volatile u64 *vaddr = (volatile u64 __force *) addr; out_be64(vaddr, val); } -static inline void eeh_memset_io(void *addr, int c, unsigned long n) { - void *vaddr = (void *)IO_TOKEN_TO_ADDR(addr); - memset(vaddr, c, n); +#define EEH_CHECK_ALIGN(v,a) \ + ((((unsigned long)(v)) & ((a) - 1)) == 0) + +static inline void eeh_memset_io(volatile void __iomem *addr, int c, unsigned long n) { + void *vaddr = (void __force *) addr; + u32 lc = c; + lc |= lc << 8; + lc |= lc << 16; + + while(n && !EEH_CHECK_ALIGN(vaddr, 4)) { + *((volatile u8 *)vaddr) = c; + vaddr = (void *)((unsigned long)vaddr + 1); + n--; + } + while(n >= 4) { + *((volatile u32 *)vaddr) = lc; + vaddr = (void *)((unsigned long)vaddr + 4); + n -= 4; + } + while(n) { + *((volatile u8 *)vaddr) = c; + vaddr = (void *)((unsigned long)vaddr + 1); + n--; + } + __asm__ __volatile__ ("sync" : : : "memory"); } -static inline void eeh_memcpy_fromio(void *dest, void *src, unsigned long n) { - void *vsrc = (void *)IO_TOKEN_TO_ADDR(src); - memcpy(dest, vsrc, n); +static inline void eeh_memcpy_fromio(void *dest, const volatile void __iomem *src, unsigned long n) { + void *vsrc = (void __force *) src; + void *destsave = dest; + unsigned long nsave = n; + + while(n && (!EEH_CHECK_ALIGN(vsrc, 4) || !EEH_CHECK_ALIGN(dest, 4))) { + *((u8 *)dest) = *((volatile u8 *)vsrc); + __asm__ __volatile__ ("eieio" : : : "memory"); + vsrc = (void *)((unsigned long)vsrc + 1); + dest = (void *)((unsigned long)dest + 1); + n--; + } + while(n > 4) { + *((u32 *)dest) = *((volatile u32 *)vsrc); + __asm__ __volatile__ ("eieio" : : : "memory"); + vsrc = (void *)((unsigned long)vsrc + 4); + dest = (void *)((unsigned long)dest + 4); + n -= 4; + } + while(n) { + *((u8 *)dest) = *((volatile u8 *)vsrc); + __asm__ __volatile__ ("eieio" : : : "memory"); + vsrc = (void *)((unsigned long)vsrc + 1); + dest = (void *)((unsigned long)dest + 1); + n--; + } + __asm__ __volatile__ ("sync" : : : "memory"); + /* Look for ffff's here at dest[n]. Assume that at least 4 bytes * were copied. Check all four bytes. */ - if ((n >= 4) && - (EEH_POSSIBLE_ERROR(src, vsrc, (*((u32 *) dest+n-4)), u32))) { - eeh_check_failure(src, (*((u32 *) dest+n-4))); + if ((nsave >= 4) && + (EEH_POSSIBLE_ERROR((*((u32 *) destsave+nsave-4)), u32))) { + eeh_check_failure(src, (*((u32 *) destsave+nsave-4))); } } -static inline void eeh_memcpy_toio(void *dest, void *src, unsigned long n) { - void *vdest = (void *)IO_TOKEN_TO_ADDR(dest); - memcpy(vdest, src, n); +static inline void eeh_memcpy_toio(volatile void __iomem *dest, const void *src, unsigned long n) { + void *vdest = (void __force *) dest; + + while(n && (!EEH_CHECK_ALIGN(vdest, 4) || !EEH_CHECK_ALIGN(src, 4))) { + *((volatile u8 *)vdest) = *((u8 *)src); + src = (void *)((unsigned long)src + 1); + vdest = (void *)((unsigned long)vdest + 1); + n--; + } + while(n > 4) { + *((volatile u32 *)vdest) = *((volatile u32 *)src); + src = (void *)((unsigned long)src + 4); + vdest = (void *)((unsigned long)vdest + 4); + n-=4; + } + while(n) { + *((volatile u8 *)vdest) = *((u8 *)src); + src = (void *)((unsigned long)src + 1); + vdest = (void *)((unsigned long)vdest + 1); + n--; + } + __asm__ __volatile__ ("sync" : : : "memory"); } +#undef EEH_CHECK_ALIGN + #define MAX_ISA_PORT 0x10000 extern unsigned long io_page_mask; #define _IO_IS_VALID(port) ((port) >= MAX_ISA_PORT || (1 << (port>>PAGE_SHIFT)) & io_page_mask) @@ -208,8 +265,8 @@ static inline u8 eeh_inb(unsigned long port) { if (!_IO_IS_VALID(port)) return ~0; val = in_8((u8 *)(port+pci_io_base)); - if (EEH_POSSIBLE_IO_ERROR(val, u8)) - return eeh_check_failure((void*)(port), val); + if (EEH_POSSIBLE_ERROR(val, u8)) + return eeh_check_failure((void __iomem *)(port), val); return val; } @@ -223,8 +280,8 @@ static inline u16 eeh_inw(unsigned long port) { if (!_IO_IS_VALID(port)) return ~0; val = in_le16((u16 *)(port+pci_io_base)); - if (EEH_POSSIBLE_IO_ERROR(val, u16)) - return eeh_check_failure((void*)(port), val); + if (EEH_POSSIBLE_ERROR(val, u16)) + return eeh_check_failure((void __iomem *)(port), val); return val; } @@ -238,8 +295,8 @@ static inline u32 eeh_inl(unsigned long port) { if (!_IO_IS_VALID(port)) return ~0; val = in_le32((u32 *)(port+pci_io_base)); - if (EEH_POSSIBLE_IO_ERROR(val, u32)) - return eeh_check_failure((void*)(port), val); + if (EEH_POSSIBLE_ERROR(val, u32)) + return eeh_check_failure((void __iomem *)(port), val); return val; } @@ -251,20 +308,20 @@ static inline void eeh_outl(u32 val, unsigned long port) { /* in-string eeh macros */ static inline void eeh_insb(unsigned long port, void * buf, int ns) { _insb((u8 *)(port+pci_io_base), buf, ns); - if (EEH_POSSIBLE_IO_ERROR((*(((u8*)buf)+ns-1)), u8)) - eeh_check_failure((void*)(port), *(u8*)buf); + if (EEH_POSSIBLE_ERROR((*(((u8*)buf)+ns-1)), u8)) + eeh_check_failure((void __iomem *)(port), *(u8*)buf); } static inline void eeh_insw_ns(unsigned long port, void * buf, int ns) { _insw_ns((u16 *)(port+pci_io_base), buf, ns); - if (EEH_POSSIBLE_IO_ERROR((*(((u16*)buf)+ns-1)), u16)) - eeh_check_failure((void*)(port), *(u16*)buf); + if (EEH_POSSIBLE_ERROR((*(((u16*)buf)+ns-1)), u16)) + eeh_check_failure((void __iomem *)(port), *(u16*)buf); } static inline void eeh_insl_ns(unsigned long port, void * buf, int nl) { _insl_ns((u32 *)(port+pci_io_base), buf, nl); - if (EEH_POSSIBLE_IO_ERROR((*(((u32*)buf)+nl-1)), u32)) - eeh_check_failure((void*)(port), *(u32*)buf); + if (EEH_POSSIBLE_ERROR((*(((u32*)buf)+nl-1)), u32)) + eeh_check_failure((void __iomem *)(port), *(u32*)buf); } #endif /* _PPC64_EEH_H */