X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=include%2Fasm-ppc64%2Fpage.h;h=ca828e5aeb8aab3acdfa57020db4f577016522d4;hb=6a77f38946aaee1cd85eeec6cf4229b204c15071;hp=a30e2a97bee16e1242ad19da9da7fbc8a83f3302;hpb=9bf4aaab3e101692164d49b7ca357651eb691cb6;p=linux-2.6.git diff --git a/include/asm-ppc64/page.h b/include/asm-ppc64/page.h index a30e2a97b..ca828e5ae 100644 --- a/include/asm-ppc64/page.h +++ b/include/asm-ppc64/page.h @@ -30,11 +30,12 @@ #define ESID_MASK 0xfffffffff0000000UL #define GET_ESID(x) (((x) >> SID_SHIFT) & SID_MASK) -#ifdef CONFIG_HUGETLB_PAGE - #define HPAGE_SHIFT 24 #define HPAGE_SIZE ((1UL) << HPAGE_SHIFT) #define HPAGE_MASK (~(HPAGE_SIZE - 1)) + +#ifdef CONFIG_HUGETLB_PAGE + #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) /* For 64-bit processes the hugepage range is 1T-1.5T */ @@ -63,7 +64,6 @@ #define is_hugepage_only_range(addr, len) \ (touches_hugepage_high_range((addr), (len)) || \ touches_hugepage_low_range((addr), (len))) -#define hugetlb_free_pgtables free_pgtables #define HAVE_ARCH_HUGETLB_UNMAPPED_AREA #define in_hugepage_area(context, addr) \ @@ -93,7 +93,7 @@ #ifdef __KERNEL__ #ifndef __ASSEMBLY__ -#include +#include #undef STRICT_MM_TYPECHECKS @@ -106,8 +106,8 @@ static __inline__ void clear_page(void *addr) { unsigned long lines, line_size; - line_size = systemcfg->dCacheL1LineSize; - lines = naca->dCacheL1LinesPerPage; + line_size = ppc64_caches.dline_size; + lines = ppc64_caches.dlines_per_page; __asm__ __volatile__( "mtctr %1 # clear_page\n\ @@ -181,8 +181,9 @@ static inline int get_order(unsigned long size) #define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) -/* Not 100% correct, for use by /dev/mem only */ -extern int page_is_ram(unsigned long physaddr); +extern int page_is_ram(unsigned long pfn); + +extern u64 ppc64_pft_size; /* Log 2 of page table size */ #endif /* __ASSEMBLY__ */ @@ -202,28 +203,15 @@ extern int page_is_ram(unsigned long physaddr); /* to change! */ #define PAGE_OFFSET ASM_CONST(0xC000000000000000) #define KERNELBASE PAGE_OFFSET -#define VMALLOCBASE 0xD000000000000000UL -#define IOREGIONBASE 0xE000000000000000UL -#define EEHREGIONBASE 0xA000000000000000UL +#define VMALLOCBASE ASM_CONST(0xD000000000000000) +#define IOREGIONBASE ASM_CONST(0xE000000000000000) #define IO_REGION_ID (IOREGIONBASE>>REGION_SHIFT) -#define EEH_REGION_ID (EEHREGIONBASE>>REGION_SHIFT) #define VMALLOC_REGION_ID (VMALLOCBASE>>REGION_SHIFT) #define KERNEL_REGION_ID (KERNELBASE>>REGION_SHIFT) #define USER_REGION_ID (0UL) #define REGION_ID(X) (((unsigned long)(X))>>REGION_SHIFT) -/* - * Define valid/invalid EA bits (for all ranges) - */ -#define VALID_EA_BITS (0x000001ffffffffffUL) -#define INVALID_EA_BITS (~(REGION_MASK|VALID_EA_BITS)) - -#define IS_VALID_REGION_ID(x) \ - (((x) == USER_REGION_ID) || ((x) >= KERNEL_REGION_ID)) -#define IS_VALID_EA(x) \ - ((!((x) & INVALID_EA_BITS)) && IS_VALID_REGION_ID(REGION_ID(x))) - #define __bpn_to_ba(x) ((((unsigned long)(x))<> PAGE_SHIFT) @@ -240,6 +228,7 @@ extern int page_is_ram(unsigned long physaddr); #endif #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) +#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)