X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=include%2Fasm-sh%2Fdma.h;h=f9b95e2116f5d7598ccea2a5ee89d61e9a304e17;hb=9bf4aaab3e101692164d49b7ca357651eb691cb6;hp=bc5c3b6a215de2671d2e3554b735de9d1b1983cd;hpb=db216c3d5e4c040e557a50f8f5d35d5c415e8c1c;p=linux-2.6.git diff --git a/include/asm-sh/dma.h b/include/asm-sh/dma.h index bc5c3b6a2..f9b95e211 100644 --- a/include/asm-sh/dma.h +++ b/include/asm-sh/dma.h @@ -1,7 +1,7 @@ /* * include/asm-sh/dma.h * - * Copyright (C) 2003 Paul Mundt + * Copyright (C) 2003, 2004 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -29,7 +30,7 @@ # define MAX_DMA_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS) #endif -/* +/* * Read and write modes can mean drastically different things depending on the * channel configuration. Consult your DMAC documentation and module * implementation for further clues. @@ -38,40 +39,69 @@ #define DMA_MODE_WRITE 0x01 #define DMA_MODE_MASK 0x01 +#define DMA_AUTOINIT 0x10 + +/* + * DMAC (dma_info) flags + */ +enum { + DMAC_CHANNELS_CONFIGURED = 0x00, + DMAC_CHANNELS_TEI_CAPABLE = 0x01, +}; + +/* + * DMA channel capabilities / flags + */ +enum { + DMA_CONFIGURED = 0x00, + DMA_TEI_CAPABLE = 0x01, +}; + extern spinlock_t dma_spin_lock; -struct dma_info; +struct dma_channel; struct dma_ops { - const char *name; - - int (*request)(struct dma_info *info); - void (*free)(struct dma_info *info); + int (*request)(struct dma_channel *chan); + void (*free)(struct dma_channel *chan); - int (*get_residue)(struct dma_info *info); - int (*xfer)(struct dma_info *info); - void (*configure)(struct dma_info *info, unsigned long flags); + int (*get_residue)(struct dma_channel *chan); + int (*xfer)(struct dma_channel *chan); + void (*configure)(struct dma_channel *chan, unsigned long flags); }; -struct dma_info { - const char *dev_id; +struct dma_channel { + char dev_id[16]; unsigned int chan; unsigned int mode; unsigned int count; - + unsigned long sar; unsigned long dar; - unsigned int configured:1; - unsigned int tei_capable:1; + unsigned long flags; atomic_t busy; struct semaphore sem; wait_queue_head_t wait_queue; + + struct sys_device dev; +}; + +struct dma_info { + const char *name; + unsigned int nr_channels; + unsigned long flags; + struct dma_ops *ops; + struct dma_channel *channels; + + struct list_head list; }; +#define to_dma_channel(channel) container_of(channel, struct dma_channel, dev) + /* arch/sh/drivers/dma/dma-api.c */ extern int dma_xfer(unsigned int chan, unsigned long from, unsigned long to, size_t size, unsigned int mode); @@ -90,17 +120,22 @@ extern int request_dma(unsigned int chan, const char *dev_id); extern void free_dma(unsigned int chan); extern int get_dma_residue(unsigned int chan); extern struct dma_info *get_dma_info(unsigned int chan); +extern struct dma_channel *get_dma_channel(unsigned int chan); extern void dma_wait_for_completion(unsigned int chan); extern void dma_configure_channel(unsigned int chan, unsigned long flags); -extern int register_dmac(struct dma_ops *ops); +extern int register_dmac(struct dma_info *info); +extern void unregister_dmac(struct dma_info *info); -extern struct dma_info dma_info[]; +#ifdef CONFIG_SYSFS +/* arch/sh/drivers/dma/dma-sysfs.c */ +extern int dma_create_sysfs_files(struct dma_channel *); +#endif #ifdef CONFIG_PCI extern int isa_dma_bridge_buggy; #else -#define isa_dma_bridge_buggy (0) +#define isa_dma_bridge_buggy (0) #endif #endif /* __ASM_SH_DMA_H */