X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=include%2Fasm-um%2Fcache.h;h=3d0587075521ee3fb3108dfdcf3c219cb5467125;hb=cc169158e75d370ff961e5653a326a7ee1688b6b;hp=4b134fe8504e9eeeb7998fe2410a38286f79b719;hpb=207e0a826fdee4bfe853681aef2175a739c11286;p=linux-2.6.git

diff --git a/include/asm-um/cache.h b/include/asm-um/cache.h
index 4b134fe85..3d0587075 100644
--- a/include/asm-um/cache.h
+++ b/include/asm-um/cache.h
@@ -1,10 +1,18 @@
 #ifndef __UM_CACHE_H
 #define __UM_CACHE_H
 
-/* These are x86 numbers */
-#define L1_CACHE_SHIFT 5
-#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
+#include <linux/config.h>
 
-#define L1_CACHE_SHIFT_MAX 7	/* largest L1 which this arch supports */
+#if defined(CONFIG_UML_X86) && !defined(CONFIG_64BIT)
+# define L1_CACHE_SHIFT		(CONFIG_X86_L1_CACHE_SHIFT)
+#elif defined(CONFIG_UML_X86) /* 64-bit */
+# define L1_CACHE_SHIFT		6 /* Should be 7 on Intel */
+#else
+/* XXX: this was taken from x86, now it's completely random. Luckily only
+ * affects SMP padding. */
+# define L1_CACHE_SHIFT		5
+#endif
+
+#define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)
 
 #endif