X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=include%2Fasm-x86_64%2Fprocessor.h;fp=include%2Fasm-x86_64%2Fprocessor.h;h=8c8d88c036ed07d037f55435196b91aba545c586;hb=64ba3f394c830ec48a1c31b53dcae312c56f1604;hp=de9c3147ee4c3dddb639210dc17a9b74b406a040;hpb=be1e6109ac94a859551f8e1774eb9a8469fe055c;p=linux-2.6.git diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h index de9c3147e..8c8d88c03 100644 --- a/include/asm-x86_64/processor.h +++ b/include/asm-x86_64/processor.h @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -19,7 +20,6 @@ #include #include #include -#include #define TF_MASK 0x00000100 #define IF_MASK 0x00000200 @@ -65,15 +65,8 @@ struct cpuinfo_x86 { __u32 x86_power; __u32 extended_cpuid_level; /* Max extended CPUID function supported */ unsigned long loops_per_jiffy; -#ifdef CONFIG_SMP - cpumask_t llc_shared_map; /* cpus sharing the last level cache */ -#endif __u8 apicid; -#ifdef CONFIG_SMP __u8 booted_cores; /* number of cores as seen by OS */ - __u8 phys_proc_id; /* Physical Processor id. */ - __u8 cpu_core_id; /* Core id. */ -#endif } ____cacheline_aligned; #define X86_VENDOR_INTEL 0 @@ -100,7 +93,6 @@ extern char ignore_irq13; extern void identify_cpu(struct cpuinfo_x86 *); extern void print_cpu_info(struct cpuinfo_x86 *); extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c); -extern unsigned short num_cache_leaves; /* * EFLAGS bits @@ -232,14 +224,8 @@ struct tss_struct { unsigned long io_bitmap[IO_BITMAP_LONGS + 1]; } __attribute__((packed)) ____cacheline_aligned; - extern struct cpuinfo_x86 boot_cpu_data; DECLARE_PER_CPU(struct tss_struct,init_tss); -/* Save the original ist values for checking stack pointers during debugging */ -struct orig_ist { - unsigned long ist[7]; -}; -DECLARE_PER_CPU(struct orig_ist, orig_ist); #ifdef CONFIG_X86_VSMP #define ARCH_MIN_TASKALIGN (1 << INTERNODE_CACHE_SHIFT) @@ -368,6 +354,9 @@ struct extended_sigtable { struct extended_signature sigs[0]; }; +/* '6' because it used to be for P6 only (but now covers Pentium 4 as well) */ +#define MICROCODE_IOCFREE _IO('6',0) + #define ASM_NOP1 K8_NOP1 #define ASM_NOP2 K8_NOP2