X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=scripts%2FMakefile.lib;h=fc498fee68edefe6c88afc2d546e0e459b9396d9;hb=refs%2Fheads%2Fvserver;hp=a47abc8af0a6e4ab1457dd27496f18bfd1f9aa5c;hpb=5273a3df6485dc2ad6aa7ddd441b9a21970f003b;p=linux-2.6.git diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index a47abc8af..fc498fee6 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -1,13 +1,3 @@ -# =========================================================================== -# kbuild: Generic definitions -# =========================================================================== - -# Standard vars - -comma := , -empty := -space := $(empty) $(empty) - # Backward compatibility - to be removed... extra-y += $(EXTRA_TARGETS) # Figure out what we need to build from the various variables @@ -60,41 +50,11 @@ subdir-obj-y := $(foreach o,$(obj-y),$(if $(filter-out $(o),$(notdir $(o))),$(o) # $(obj-dirs) is a list of directories that contain object files obj-dirs := $(dir $(multi-objs) $(subdir-obj-y)) -obj-dirs += $(foreach f,$(host-progs), $(if $(dir $(f)),$(dir $(f)))) -obj-dirs := $(strip $(sort $(filter-out ./,$(obj-dirs)))) # Replace multi-part objects by their individual parts, look at local dir only real-objs-y := $(foreach m, $(filter-out $(subdir-obj-y), $(obj-y)), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y))),$($(m:.o=-objs)) $($(m:.o=-y)),$(m))) $(extra-y) real-objs-m := $(foreach m, $(obj-m), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y))),$($(m:.o=-objs)) $($(m:.o=-y)),$(m))) -# C code -# Executables compiled from a single .c file -host-csingle := $(foreach m,$(host-progs),$(if $($(m)-objs),,$(m))) - -# C executables linked based on several .o files -host-cmulti := $(foreach m,$(host-progs),\ - $(if $($(m)-cxxobjs),,$(if $($(m)-objs),$(m)))) - -# Object (.o) files compiled from .c files -host-cobjs := $(sort $(foreach m,$(host-progs),$($(m)-objs))) - -# C++ code -# C++ executables compiled from at least on .cc file -# and zero or more .c files -host-cxxmulti := $(foreach m,$(host-progs),$(if $($(m)-cxxobjs),$(m))) - -# C++ Object (.o) files compiled from .cc files -host-cxxobjs := $(sort $(foreach m,$(host-cxxmulti),$($(m)-cxxobjs))) - -# Shared libaries (only .c supported) -# Shared libraries (.so) - all .so files referenced in "xxx-objs" -host-cshlib := $(sort $(filter %.so, $(host-cobjs))) -# Remove .so files from "xxx-objs" -host-cobjs := $(filter-out %.so,$(host-cobjs)) - -#Object (.o) files used by the shared libaries -host-cshobjs := $(sort $(foreach m,$(host-cshlib),$($(m:.so=-objs)))) - # Add subdir path extra-y := $(addprefix $(obj)/,$(extra-y)) @@ -113,18 +73,6 @@ multi-objs-y := $(addprefix $(obj)/,$(multi-objs-y)) multi-objs-m := $(addprefix $(obj)/,$(multi-objs-m)) subdir-ym := $(addprefix $(obj)/,$(subdir-ym)) obj-dirs := $(addprefix $(obj)/,$(obj-dirs)) -host-progs := $(addprefix $(obj)/,$(host-progs)) -host-csingle := $(addprefix $(obj)/,$(host-csingle)) -host-cmulti := $(addprefix $(obj)/,$(host-cmulti)) -host-cobjs := $(addprefix $(obj)/,$(host-cobjs)) -host-cxxmulti := $(addprefix $(obj)/,$(host-cxxmulti)) -host-cxxobjs := $(addprefix $(obj)/,$(host-cxxobjs)) -host-cshlib := $(addprefix $(obj)/,$(host-cshlib)) -host-cshobjs := $(addprefix $(obj)/,$(host-cshobjs)) - -# The temporary file to save gcc -MD generated dependencies must not -# contain a comma -depfile = $(subst $(comma),_,$(@D)/.$(@F).d) # These flags are needed for modversions and compiling, so we define them here # already @@ -133,15 +81,14 @@ depfile = $(subst $(comma),_,$(@D)/.$(@F).d) # Note: It's possible that one object gets potentially linked into more # than one module. In that case KBUILD_MODNAME will be set to foo_bar, # where foo and bar are the name of the modules. -basename_flags = -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) -modname_flags = $(if $(filter 1,$(words $(modname))),-DKBUILD_MODNAME=$(subst $(comma),_,$(subst -,_,$(modname)))) - - -_c_flags = $(CFLAGS) $(EXTRA_CFLAGS) $(CFLAGS_$(*F).o) -_a_flags = $(AFLAGS) $(EXTRA_AFLAGS) $(AFLAGS_$(*F).o) -_hostc_flags = $(HOSTCFLAGS) $(HOST_EXTRACFLAGS) $(HOSTCFLAGS_$(*F).o) -_hostcxx_flags = $(HOSTCXXFLAGS) $(HOST_EXTRACXXFLAGS) $(HOSTCXXFLAGS_$(*F).o) +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ + -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") +_c_flags = $(CFLAGS) $(EXTRA_CFLAGS) $(CFLAGS_$(basetarget).o) +_a_flags = $(AFLAGS) $(EXTRA_AFLAGS) $(AFLAGS_$(basetarget).o) +_cpp_flags = $(CPPFLAGS) $(EXTRA_CPPFLAGS) $(CPPFLAGS_$(@F)) # If building the kernel in a separate objtree expand all occurrences # of -Idir to -I$(srctree)/dir except for absolute paths (starting with '/'). @@ -149,34 +96,26 @@ _hostcxx_flags = $(HOSTCXXFLAGS) $(HOST_EXTRACXXFLAGS) $(HOSTCXXFLAGS_$(*F).o) ifeq ($(KBUILD_SRC),) __c_flags = $(_c_flags) __a_flags = $(_a_flags) -__hostc_flags = $(_hostc_flags) -__hostcxx_flags = $(_hostcxx_flags) +__cpp_flags = $(_cpp_flags) else -# Prefix -I with $(srctree) if it is not an absolute path -addtree = $(if $(filter-out -I/%,$(1)),$(patsubst -I%,-I$(srctree)/%,$(1))) $(1) -# Find all -I options and call addtree -flags = $(foreach o,$($(1)),$(if $(filter -I%,$(o)),$(call addtree,$(o)),$(o))) - # -I$(obj) locates generated .h files # $(call addtree,-I$(obj)) locates .h files in srctree, from generated .c files # and locates generated .h files # FIXME: Replace both with specific CFLAGS* statements in the makefiles __c_flags = $(call addtree,-I$(obj)) $(call flags,_c_flags) __a_flags = $(call flags,_a_flags) -__hostc_flags = -I$(obj) $(call flags,_hostc_flags) -__hostcxx_flags = -I$(obj) $(call flags,_hostcxx_flags) +__cpp_flags = $(call flags,_cpp_flags) endif c_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) $(CPPFLAGS) \ $(__c_flags) $(modkern_cflags) \ - $(basename_flags) $(modname_flags) + -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) a_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) $(CPPFLAGS) \ $(__a_flags) $(modkern_aflags) -hostc_flags = -Wp,-MD,$(depfile) $(__hostc_flags) -hostcxx_flags = -Wp,-MD,$(depfile) $(__hostcxx_flags) +cpp_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) $(__cpp_flags) ld_flags = $(LDFLAGS) $(EXTRA_LDFLAGS) @@ -223,56 +162,4 @@ cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@ quiet_cmd_gzip = GZIP $@ cmd_gzip = gzip -f -9 < $< > $@ -# =========================================================================== -# Generic stuff -# =========================================================================== -# function to only execute the passed command if necessary -# >'< substitution is for echo to work, >$< substitution to preserve $ when reloading .cmd file -# note: when using inline perl scripts [perl -e '...$$t=1;...'] in $(cmd_xxx) double $$ your perl vars - -if_changed = $(if $(strip $? \ - $(filter-out $(cmd_$(1)),$(cmd_$@))\ - $(filter-out $(cmd_$@),$(cmd_$(1)))),\ - @set -e; \ - $(if $($(quiet)cmd_$(1)),echo ' $(subst ','\'',$($(quiet)cmd_$(1)))';) \ - $(cmd_$(1)); \ - echo 'cmd_$@ := $(subst $$,$$$$,$(subst ','\'',$(cmd_$(1))))' > $(@D)/.$(@F).cmd) - - -# execute the command and also postprocess generated .d dependencies -# file - -if_changed_dep = $(if $(strip $? $(filter-out FORCE $(wildcard $^),$^)\ - $(filter-out $(cmd_$(1)),$(cmd_$@))\ - $(filter-out $(cmd_$@),$(cmd_$(1)))),\ - @set -e; \ - $(if $($(quiet)cmd_$(1)),echo ' $(subst ','\'',$($(quiet)cmd_$(1)))';) \ - $(cmd_$(1)); \ - scripts/basic/fixdep $(depfile) $@ '$(subst $$,$$$$,$(subst ','\'',$(cmd_$(1))))' > $(@D)/.$(@F).tmp; \ - rm -f $(depfile); \ - mv -f $(@D)/.$(@F).tmp $(@D)/.$(@F).cmd) - -# Usage: $(call if_changed_rule,foo) -# will check if $(cmd_foo) changed, or any of the prequisites changed, -# and if so will execute $(rule_foo) - -if_changed_rule = $(if $(strip $? \ - $(filter-out $(cmd_$(1)),$(cmd_$@))\ - $(filter-out $(cmd_$@),$(cmd_$(1)))),\ - @set -e; \ - $(rule_$(1))) - -# If quiet is set, only print short version of command - -cmd = @$(if $($(quiet)cmd_$(1)),echo ' $(subst ','\'',$($(quiet)cmd_$(1)))' &&) $(cmd_$(1)) - -# $(call descend,,) -# Recursively call a sub-make in with target -# Usage is deprecated, because make do not see this as an invocation of make. -descend =$(Q)$(MAKE) -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj=$(1) $(2) - -# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj= -# Usage: -# $(Q)$(MAKE) $(build)=dir -build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj