From: Ben Pfaff <blp@nicira.com>
Date: Tue, 11 Mar 2014 07:10:20 +0000 (-0700)
Subject: util: Move CACHE_LINE_SIZE here.
X-Git-Tag: sliver-openvswitch-2.2.90-1~6^2~117
X-Git-Url: http://git.onelab.eu/?a=commitdiff_plain;ds=sidebyside;h=e205100808563d803fd983b610865c5aceb09e9d;p=sliver-openvswitch.git

util: Move CACHE_LINE_SIZE here.

It will come in handy elsewhere in upcoming commits.

Signed-off-by: Ben Pfaff <blp@nicira.com>
Acked-by: Andy Zhou <azhou@nicira.com>
---

diff --git a/lib/fat-rwlock.c b/lib/fat-rwlock.c
index 9ffa37b4a..3866dda49 100644
--- a/lib/fat-rwlock.c
+++ b/lib/fat-rwlock.c
@@ -25,11 +25,6 @@
 #include "ovs-thread.h"
 #include "random.h"
 
-/* This system's cache line size, in bytes.
- * Being wrong hurts performance but not correctness. */
-#define CACHE_LINE_SIZE 64      /* Correct for most CPUs. */
-BUILD_ASSERT_DECL(IS_POW2(CACHE_LINE_SIZE));
-
 struct fat_rwlock_slot {
     /* Membership in rwlock's list of "struct fat_rwlock_slot"s.
      *
diff --git a/lib/util.h b/lib/util.h
index 8c4d9d6a5..c1672e55e 100644
--- a/lib/util.h
+++ b/lib/util.h
@@ -145,6 +145,11 @@ is_pow2(uintmax_t x)
 #define RDP2_4(X) (RDP2_5(X) | (RDP2_5(X) >> 2))
 #define RDP2_5(X) (      (X) | (      (X) >> 1))
 
+/* This system's cache line size, in bytes.
+ * Being wrong hurts performance but not correctness. */
+#define CACHE_LINE_SIZE 64
+BUILD_ASSERT_DECL(IS_POW2(CACHE_LINE_SIZE));
+
 #ifndef MIN
 #define MIN(X, Y) ((X) < (Y) ? (X) : (Y))
 #endif