X-Git-Url: http://git.onelab.eu/?p=linux-2.6.git;a=blobdiff_plain;f=arch%2Fppc%2Fsyslib%2Fopen_pic.c;fp=arch%2Fppc%2Fsyslib%2Fopen_pic.c;h=894779712b4614fbb517ffd23e3435fd76b835f7;hp=aa0b957887056a90a701cc192290c55f21f5dc1d;hb=64ba3f394c830ec48a1c31b53dcae312c56f1604;hpb=be1e6109ac94a859551f8e1774eb9a8469fe055c diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c index aa0b95788..894779712 100644 --- a/arch/ppc/syslib/open_pic.c +++ b/arch/ppc/syslib/open_pic.c @@ -1,4 +1,6 @@ /* + * arch/ppc/kernel/open_pic.c -- OpenPIC Interrupt Handling + * * Copyright (C) 1997 Geert Uytterhoeven * * This file is subject to the terms and conditions of the GNU General Public @@ -6,6 +8,7 @@ * for more details. */ +#include #include #include #include @@ -215,7 +218,7 @@ static void openpic_safe_writefield(volatile u_int __iomem *addr, u_int mask, u_int openpic_read_IPI(volatile u_int __iomem * addr) { u_int val = 0; -#if defined(OPENPIC_BIG_ENDIAN) +#if defined(OPENPIC_BIG_ENDIAN) || defined(CONFIG_POWER3) val = in_be32(addr); #else val = in_le32(addr); @@ -372,7 +375,7 @@ void __init openpic_init(int offset) OPENPIC_VEC_IPI+i+offset); /* IPIs are per-CPU */ irq_desc[OPENPIC_VEC_IPI+i+offset].status |= IRQ_PER_CPU; - irq_desc[OPENPIC_VEC_IPI+i+offset].chip = &open_pic_ipi; + irq_desc[OPENPIC_VEC_IPI+i+offset].handler = &open_pic_ipi; } #endif @@ -407,7 +410,7 @@ void __init openpic_init(int offset) /* Init descriptors */ for (i = offset; i < NumSources + offset; i++) - irq_desc[i].chip = &open_pic; + irq_desc[i].handler = &open_pic; /* Initialize the spurious interrupt */ if (ppc_md.progress) ppc_md.progress("openpic: spurious",0x3bd); @@ -575,21 +578,18 @@ void openpic_request_IPIs(void) if (OpenPIC == NULL) return; - /* - * IPIs are marked IRQF_DISABLED as they must run with irqs - * disabled - */ + /* IPIs are marked SA_INTERRUPT as they must run with irqs disabled */ request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset, - openpic_ipi_action, IRQF_DISABLED, + openpic_ipi_action, SA_INTERRUPT, "IPI0 (call function)", NULL); request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+1, - openpic_ipi_action, IRQF_DISABLED, + openpic_ipi_action, SA_INTERRUPT, "IPI1 (reschedule)", NULL); request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+2, - openpic_ipi_action, IRQF_DISABLED, + openpic_ipi_action, SA_INTERRUPT, "IPI2 (invalidate tlb)", NULL); request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+3, - openpic_ipi_action, IRQF_DISABLED, + openpic_ipi_action, SA_INTERRUPT, "IPI3 (xmon break)", NULL); for ( i = 0; i < OPENPIC_NUM_IPI ; i++ ) @@ -617,8 +617,8 @@ void __devinit do_openpic_setup_cpu(void) /* let the openpic know we want intrs. default affinity * is 0xffffffff until changed via /proc * That's how it's done on x86. If we want it differently, then - * we should make sure we also change the default values of - * irq_desc[].affinity in irq.c. + * we should make sure we also change the default values of irq_affinity + * in irq.c. */ for (i = 0; i < NumSources; i++) openpic_mapirq(i, msk, CPU_MASK_ALL); @@ -694,7 +694,7 @@ openpic_init_nmi_irq(u_int irq) static struct irqaction openpic_cascade_irqaction = { .handler = no_action, - .flags = IRQF_DISABLED, + .flags = SA_INTERRUPT, .mask = CPU_MASK_NONE, };