1 Kernel Low-Level PCMCIA Interface Documentation
2 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
3 John G Dorsey <john+@cs.cmu.edu>
7 Note: this interface has not been finalized!
8 See also: http://www.cs.cmu.edu/~wearable/software/pcmcia-arm.html
13 Early versions of PCMCIA Card Services for StrongARM were designed to
14 permit a single socket driver to run on a variety of SA-1100 boards by
15 using a userland configuration process. During the conversion to the 2.3
16 kernel series, all of the configuration has moved into sub-drivers in the
17 kernel proper (see linux/drivers/pcmcia/sa1100*). This document describes
18 the low-level interface between those sub-drivers and the sa1100 socket
21 Presently, there are six operations which must be provided by the
22 board-specific code. Only functions whose implementation is likely to
23 differ across board designs are required at this level. Some examples
26 - configuring card detect lines to generate interrupts
27 - sensing the legal voltage levels for inserted cards
28 - asserting the reset signal for a card
30 Functions which are assumed to be the same across all designs are
31 performed within the generic socket driver itself. Some examples of these
32 kinds of operations include:
34 - configuring memory access times based on the core clock frequency
35 - reads/writes on memory, byte swizzling, ...
37 The current implementation allows the specific per-board set of low-level
38 operations to be determined at run time. For each specific board, the
39 following structure should be filled in:
41 struct pcmcia_low_level {
42 int (*init)(struct pcmcia_init *);
43 int (*shutdown)(void);
44 int (*socket_state)(struct pcmcia_state_array *);
45 int (*get_irq_info)(struct pcmcia_irq_info *);
46 int (*configure_socket)(const struct pcmcia_configure *);
49 The component functions are described in detail below. Using the
50 machine_is_*() tests, the pointer `pcmcia_low_level' should be assigned to
51 the location of the table for your board.
54 0. init(struct pcmcia_init *init)
56 This operation has three responsibilities:
58 - perform any board-specific initialization tasks
59 - associate the given handler with any interrupt-generating signals
60 such as card detection, or battery voltage detection
61 - set up any necessary edge detection for card ready signals
63 Argument passing for this operation is implemented by the following
67 void (*handler)(int irq, void *dev, struct pt_regs *regs);
68 struct pcmcia_maps *maps;
71 Here, `handler' is provided by the socket driver, and `maps' must be
72 modified if the default mapping isn't appropriate. This operation should
73 return one of two values:
75 - the highest-numbered socket available, plus one
76 - a negative number, indicating an error in configuration
78 Note that the former case is _not_ the same as "the number of sockets
79 available." In particular, if your design uses SA-1100 slot "one" but
80 not slot "zero," you MUST report "2" to the socket driver.
85 This operation takes no arguments, and will be called during cleanup for
86 the socket driver module. Any state associated with the socket controller,
87 including allocated data structures, reserved IRQs, etc. should be
88 released in this routine.
90 The return value for this operation is not examined.
93 2. socket_state(struct pcmcia_state_array *state_array)
95 This operation will be invoked from the interrupt handler which was set up
96 in the earlier call to init(). Note, however, that it should not include
97 any side effects which would be inappropriate if the operation were to
98 occur when no interrupt is pending. (An extra invocation of this operation
99 currently takes place to initialize state in the socket driver.)
101 Argument passing for this operation is handled by a structure which
102 contains an array of the following type:
104 struct pcmcia_state {
114 Upon return from the operation, a struct pcmcia_state should be filled in
115 for each socket available in the hardware. For every array element (up to
116 `size' in the struct pcmcia_state_saarray) which does not correspond to an
117 available socket, zero the element bits. (This includes element [0] if
118 socket zero is not used.)
120 Regardless of how the various signals are routed to the SA-1100, the bits
121 in struct pcmcia_state always have the following semantics:
123 detect - 1 if a card is fully inserted, 0 otherwise
124 ready - 1 if the card ready signal is asserted, 0 otherwise
125 bvd1 - the value of the Battery Voltage Detect 1 signal
126 bvd2 - the value of the Battery Voltage Detect 2 signal
127 wrprot - 1 if the card is write-protected, 0 otherwise
128 vs_3v - 1 if the card must be operated at 3.3V, 0 otherwise
129 vs_Xv - 1 if the card must be operated at X.XV, 0 otherwise
131 A note about the BVD signals: if your board does not make both lines
132 directly observable to the processor, just return reasonable values. The
133 standard interpretation of the BVD signals is:
141 Regarding the voltage sense flags (vs_3v, vs_Xv), these bits should be set
142 based on a sampling of the Voltage Sense pins, if available. The standard
143 interpretation of the VS signals (for a "low-voltage" socket) is:
147 0 0 X.XV, else 3.3V, else none
152 More information about the BVD and VS conventions is available in chapter
153 5 of "PCMCIA System Architecture," 2nd ed., by Don Anderson.
155 This operation should return 1 if an IRQ is actually pending for the
156 socket controller, 0 if no IRQ is pending (but no error condition exists,
157 such as an undersized state array), or -1 on any error.
160 3. get_irq_info(struct pcmcia_irq_info *info)
162 This operation obtains the IRQ assignment which is legal for the given
163 socket. An argument of the following type is passed:
165 struct pcmcia_irq_info {
170 The `sock' field contains the socket index being queried. The `irq' field
171 should contain the IRQ number corresponding to the card ready signal from
174 This operation should return 0 on success, or -1 on any error.
177 4. configure_socket(const struct pcmcia_configure *configure)
179 This operation allows the caller to apply power to the socket, issue a
180 reset, or enable various outputs. The argument is of the following type:
182 struct pcmcia_configure {
191 The `sock' field contains the index of the socket to be configured. The
192 `vcc' and `vpp' fields contain the voltages to be applied for Vcc and Vpp,
193 respectively, in units of 0.1V. (Note that vpp==120 indicates that
194 programming voltage should be applied.)
196 The two output enables, `output' and `speaker', refer to the card data
197 signal enable and the card speaker enable, respectively. The `reset' bit,
198 when set, indicates that the card reset should be asserted.
200 This operation should return 0 on success, or -1 on any error.
205 The following information is known about various SA-11x0 board designs
206 which may be used as reference while adding support to the kernel.
209 Carnegie Mellon Itsy/Cue (http://www.cs.cmu.edu/~wearable/itsy/)
211 Itsy Chip Select 3 (CS3) Interface
212 ("ITSY MEMORY/PCMCIA ADD-ON BOARD with BATTERY and CHARGER CIRCUITRY,"
213 memo dated 5-20-99, from Tim Manns to Richard Martin, et. al)
216 ABVD2 (SS)D0 A slot, Battery Voltage Detect
218 AVSS2 (SS)D2 A slot, Voltage Sense
225 BBVD2 (SS)D8 B slot, Battery Voltage Detect
227 BVSS2 (SS)D10 B slot, Voltage Sense
235 (SS)D0 A_VPP_VCC LTC1472 VPPEN1
236 (SS)D1 A_VPP_PGM LTC1472 VPPEN0
237 (SS)D2 A_VCC_3 LTC1472 VCCEN0
238 (SS)D3 A_VCC_5 LTC1472 VCCEN1
239 (SS)D4 RESET (A SLOT)
244 (SS)D8 B_VPP_VCC LTC1472 VPPEN1
245 (SS)D9 B_VPP_PGM LTC1472 VPPEN0
246 (SS)D10 B_VCC_3 LTC1472 VCCEN0
247 (SS)D11 B_VCC_5 LTC1472 VCCEN1
248 (SS)D12 RESET (B SLOT)
253 GPIO pin assignments are as follows: (from schematics)
255 GPIO 10 Slot 0 Card Detect
256 GPIO 11 Slot 1 Card Detect
257 GPIO 12 Slot 0 Ready/Interrupt
258 GPIO 13 Slot 1 Ready/Interrupt
262 Intel SA-1100 Multimedia Board (http://developer.intel.com/design/strong/)
265 SA-1100 Multimedia Development Board with Companion SA-1101 Development
266 Board User's Guide, p.4-42
268 This SA-1100/1101 development package uses only one GPIO pin (24) to
269 signal changes in card status, and requires software to inspect a
270 PCMCIA status register to determine the source.
272 Read: (PCMCIA Power Sense Register - 0x19400000)
273 S0VS1 0 Slot 0 voltage sense
275 S0BVD1 2 Slot 0 battery voltage sense
277 S1VS1 4 Slot 1 voltage sense
279 S1BVD1 6 Slot 1 battery voltage sense
282 Read/Write: (PCMCIA Power Control Register - 0x19400002)
292 Read: (PCMCIA Status Register - 0x19400004)
293 S0CD1 0 Slot 0 Card Detect 1
294 S0RDY 1 Slot 0 Ready/Interrupt
295 S0STSCHG 2 Slot 0 Status Change
296 S0Reset 3 Slot 0 Reset (RW)
297 S1CD1 4 Slot 1 Card Detect 1
298 S1RDY 5 Slot 1 Ready/Interrupt
299 S1STSCHG 6 Slot 1 Status Change
300 S1Reset 7 Slot 1 Reset (RW)
304 Intel SA-1100 Evaluation Platform (http://developer.intel.com/design/strong/)
306 Brutus I/O Pins and Chipselect Register
307 pcmcia-brutus.c, by Ivo Clarysse
308 (What's the official reference for this info?)
310 This SA-1100 development board uses more GPIO pins than say, the Itsy
311 or the SA-1100/1101 multimedia package. The pin assignments are as
314 GPIO 2 Slot 0 Battery Voltage Detect 1
315 GPIO 3 Slot 0 Ready/Interrupt
316 GPIO 4 Slot 0 Card Detect
317 GPIO 5 Slot 1 Battery Voltage Detect 1
318 GPIO 6 Slot 1 Ready/Interrupt
319 GPIO 7 Slot 1 Card Detect
321 Like the Itsy, Brutus uses a chipselect register in static memory
322 bank 3 for the other signals, such as voltage sense or reset:
325 P0_VS1 8 Slot 0 Voltage Sense
327 P0_STSCHG 10 Slot 0 Status Change
328 P1_VS1 12 Slot 1 Voltage Sense
330 P1_STSCHG 14 Slot 1 Status Change
333 P0_ 16 Slot 0 MAX1600EAI control line
334 P0_ 17 Slot 0 MAX1600EAI control line
335 P0_ 18 Slot 0 MAX1600EAI control line
336 P0_ 19 Slot 0 MAX1600EAI control line
338 P0_ 21 Slot 0 Vpp to Vcc (CONFIRM?)
339 P0_ 22 Slot 0 enable fan-out drivers & xcvrs
340 P0_SW_RST 23 Slot 0 Reset
341 P1_ 24 Slot 1 MAX1600EAI control line
342 P1_ 25 Slot 1 MAX1600EAI control line
343 P1_ 26 Slot 1 MAX1600EAI control line
344 P1_ 27 Slot 1 MAX1600EAI control line
346 P1_ 29 Slot 1 Vpp to Vcc (CONFIRM?)
347 P1_ 30 Slot 1 enable fan-out drivers & xcvrs
348 P1_SW_RST 31 Slot 1 Reset
350 For each slot, the bits labelled "MAX1600EAI" should (apparently)
351 be written with the value 0101 for Vcc 3.3V, and 1001 for Vcc 5V.
355 Intel SA-1110 Development Platform (http://developer.intel.com/design/strong/)
357 GPIO Pin Descriptions and Board Control Register
358 SA-1110 Microprocessor Development Board User's Guide, p.4-7, 4-10
360 The Assabet board contains only a single Compact Flash slot,
361 attached to slot 1 on the SA-1110. Card detect, ready, and BVD
362 signals are routed through GPIO, with power and reset placed in a
363 control register. Note that the CF bus must be enabled before use.
365 GPIO 21 Slot 1 Compact Flash interrupt
366 GPIO 22 Slot 1 card detect (CD1 NOR CD2)
367 GPIO 24 Slot 1 Battery Voltage Detect 2
368 GPIO 25 Slot 1 Battery Voltage Detect 1
370 Write-only: (Board Control Register - 0x12000000)
371 CF_PWR 0 CF bus power (3.3V)
373 CF_Bus_On 7 CF bus enable