2 * arch/alpha/kernel/traps.c
4 * (C) Copyright 1994 Linus Torvalds
8 * This file initializes the trap entry points
11 #include <linux/config.h>
13 #include <linux/sched.h>
14 #include <linux/tty.h>
15 #include <linux/delay.h>
16 #include <linux/smp_lock.h>
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/kallsyms.h>
21 #include <asm/gentrap.h>
22 #include <asm/uaccess.h>
23 #include <asm/unaligned.h>
24 #include <asm/sysinfo.h>
25 #include <asm/hwrpb.h>
26 #include <asm/mmu_context.h>
30 /* Work-around for some SRMs which mishandle opDEC faults. */
37 __asm__ __volatile__ (
38 /* Load the address of... */
40 /* A stub instruction fault handler. Just add 4 to the
46 /* Install the instruction fault handler. */
48 " call_pal %[wrent]\n"
49 /* With that in place, the fault from the round-to-minf fp
50 insn will arrive either at the "lda 4" insn (bad) or one
51 past that (good). This places the correct fixup in %0. */
53 " cvttq/svm $f31,$f31\n"
55 : [fix] "=r" (opDEC_fix)
56 : [rti] "n" (PAL_rti), [wrent] "n" (PAL_wrent)
57 : "$0", "$1", "$16", "$17", "$22", "$23", "$24", "$25");
60 printk("opDEC fixup enabled.\n");
64 dik_show_regs(struct pt_regs *regs, unsigned long *r9_15)
66 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx %s\n",
67 regs->pc, regs->r26, regs->ps, print_tainted());
68 printk("v0 = %016lx t0 = %016lx t1 = %016lx\n",
69 regs->r0, regs->r1, regs->r2);
70 printk("t2 = %016lx t3 = %016lx t4 = %016lx\n",
71 regs->r3, regs->r4, regs->r5);
72 printk("t5 = %016lx t6 = %016lx t7 = %016lx\n",
73 regs->r6, regs->r7, regs->r8);
76 printk("s0 = %016lx s1 = %016lx s2 = %016lx\n",
77 r9_15[9], r9_15[10], r9_15[11]);
78 printk("s3 = %016lx s4 = %016lx s5 = %016lx\n",
79 r9_15[12], r9_15[13], r9_15[14]);
80 printk("s6 = %016lx\n", r9_15[15]);
83 printk("a0 = %016lx a1 = %016lx a2 = %016lx\n",
84 regs->r16, regs->r17, regs->r18);
85 printk("a3 = %016lx a4 = %016lx a5 = %016lx\n",
86 regs->r19, regs->r20, regs->r21);
87 printk("t8 = %016lx t9 = %016lx t10= %016lx\n",
88 regs->r22, regs->r23, regs->r24);
89 printk("t11= %016lx pv = %016lx at = %016lx\n",
90 regs->r25, regs->r27, regs->r28);
91 printk("gp = %016lx sp = %p\n", regs->gp, regs+1);
98 static char * ireg_name[] = {"v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
99 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "s6",
100 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
101 "t10", "t11", "ra", "pv", "at", "gp", "sp", "zero"};
105 dik_show_code(unsigned int *pc)
110 for (i = -6; i < 2; i++) {
112 if (__get_user(insn, pc+i))
114 printk("%c%08x%c", i ? ' ' : '<', insn, i ? ' ' : '>');
120 dik_show_trace(unsigned long *sp)
124 while (0x1ff8 & (unsigned long) sp) {
125 extern char _stext[], _etext[];
126 unsigned long tmp = *sp;
128 if (tmp < (unsigned long) &_stext)
130 if (tmp >= (unsigned long) &_etext)
132 printk("[<%lx>]", tmp);
133 print_symbol(" %s", tmp);
143 static int kstack_depth_to_print = 24;
145 void show_stack(struct task_struct *task, unsigned long *sp)
147 unsigned long *stack;
151 * debugging aid: "show_stack(NULL);" prints the
152 * back trace for this cpu.
155 sp=(unsigned long*)&sp;
158 for(i=0; i < kstack_depth_to_print; i++) {
159 if (((long) stack & (THREAD_SIZE-1)) == 0)
161 if (i && ((i % 4) == 0))
163 printk("%016lx ", *stack++);
169 void dump_stack(void)
171 show_stack(NULL, NULL);
174 EXPORT_SYMBOL(dump_stack);
177 die_if_kernel(char * str, struct pt_regs *regs, long err, unsigned long *r9_15)
182 printk("CPU %d ", hard_smp_processor_id());
184 printk("%s(%d): %s %ld\n", current->comm, current->pid, str, err);
185 dik_show_regs(regs, r9_15);
186 dik_show_trace((unsigned long *)(regs+1));
187 dik_show_code((unsigned int *)regs->pc);
189 if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) {
190 printk("die_if_kernel recursion detected.\n");
197 #ifndef CONFIG_MATHEMU
198 static long dummy_emul(void) { return 0; }
199 long (*alpha_fp_emul_imprecise)(struct pt_regs *regs, unsigned long writemask)
200 = (void *)dummy_emul;
201 long (*alpha_fp_emul) (unsigned long pc)
202 = (void *)dummy_emul;
204 long alpha_fp_emul_imprecise(struct pt_regs *regs, unsigned long writemask);
205 long alpha_fp_emul (unsigned long pc);
209 do_entArith(unsigned long summary, unsigned long write_mask,
210 struct pt_regs *regs)
212 long si_code = FPE_FLTINV;
216 /* Software-completion summary bit is set, so try to
217 emulate the instruction. If the processor supports
218 precise exceptions, we don't have to search. */
219 if (!amask(AMASK_PRECISE_TRAP))
220 si_code = alpha_fp_emul(regs->pc - 4);
222 si_code = alpha_fp_emul_imprecise(regs, write_mask);
226 die_if_kernel("Arithmetic fault", regs, 0, NULL);
228 info.si_signo = SIGFPE;
230 info.si_code = si_code;
231 info.si_addr = (void __user *) regs->pc;
232 send_sig_info(SIGFPE, &info, current);
236 do_entIF(unsigned long type, struct pt_regs *regs)
243 const unsigned int *data
244 = (const unsigned int *) regs->pc;
245 printk("Kernel bug at %s:%d\n",
246 (const char *)(data[1] | (long)data[2] << 32),
249 die_if_kernel((type == 1 ? "Kernel Bug" : "Instruction fault"),
254 case 0: /* breakpoint */
255 info.si_signo = SIGTRAP;
257 info.si_code = TRAP_BRKPT;
259 info.si_addr = (void __user *) regs->pc;
261 if (ptrace_cancel_bpt(current)) {
262 regs->pc -= 4; /* make pc point to former bpt */
265 send_sig_info(SIGTRAP, &info, current);
268 case 1: /* bugcheck */
269 info.si_signo = SIGTRAP;
271 info.si_code = __SI_FAULT;
272 info.si_addr = (void __user *) regs->pc;
274 send_sig_info(SIGTRAP, &info, current);
277 case 2: /* gentrap */
278 info.si_addr = (void __user *) regs->pc;
279 info.si_trapno = regs->r16;
280 switch ((long) regs->r16) {
337 info.si_signo = signo;
340 info.si_addr = (void __user *) regs->pc;
341 send_sig_info(signo, &info, current);
345 if (implver() == IMPLVER_EV4) {
348 /* The some versions of SRM do not handle
349 the opDEC properly - they return the PC of the
350 opDEC fault, not the instruction after as the
351 Alpha architecture requires. Here we fix it up.
352 We do this by intentionally causing an opDEC
353 fault during the boot sequence and testing if
354 we get the correct PC. If not, we set a flag
355 to correct it every time through. */
356 regs->pc += opDEC_fix;
358 /* EV4 does not implement anything except normal
359 rounding. Everything else will come here as
360 an illegal instruction. Emulate them. */
361 si_code = alpha_fp_emul(regs->pc - 4);
365 info.si_signo = SIGFPE;
367 info.si_code = si_code;
368 info.si_addr = (void __user *) regs->pc;
369 send_sig_info(SIGFPE, &info, current);
375 case 3: /* FEN fault */
376 /* Irritating users can call PAL_clrfen to disable the
377 FPU for the process. The kernel will then trap in
378 do_switch_stack and undo_switch_stack when we try
379 to save and restore the FP registers.
381 Given that GCC by default generates code that uses the
382 FP registers, PAL_clrfen is not useful except for DoS
383 attacks. So turn the bleeding FPU back on and be done
385 current_thread_info()->pcb.flags |= 1;
386 __reload_thread(¤t_thread_info()->pcb);
390 default: /* unexpected instruction-fault type */
394 info.si_signo = SIGILL;
396 info.si_code = ILL_ILLOPC;
397 info.si_addr = (void __user *) regs->pc;
398 send_sig_info(SIGILL, &info, current);
401 /* There is an ifdef in the PALcode in MILO that enables a
402 "kernel debugging entry point" as an unprivileged call_pal.
404 We don't want to have anything to do with it, but unfortunately
405 several versions of MILO included in distributions have it enabled,
406 and if we don't put something on the entry point we'll oops. */
409 do_entDbg(struct pt_regs *regs)
413 die_if_kernel("Instruction fault", regs, 0, NULL);
415 info.si_signo = SIGILL;
417 info.si_code = ILL_ILLOPC;
418 info.si_addr = (void __user *) regs->pc;
419 force_sig_info(SIGILL, &info, current);
424 * entUna has a different register layout to be reasonably simple. It
425 * needs access to all the integer registers (the kernel doesn't use
426 * fp-regs), and it needs to have them in order for simpler access.
428 * Due to the non-standard register layout (and because we don't want
429 * to handle floating-point regs), user-mode unaligned accesses are
430 * handled separately by do_entUnaUser below.
432 * Oh, btw, we don't handle the "gp" register correctly, but if we fault
433 * on a gp-register unaligned load/store, something is _very_ wrong
434 * in the kernel anyway..
437 unsigned long regs[32];
438 unsigned long ps, pc, gp, a0, a1, a2;
441 struct unaligned_stat {
442 unsigned long count, va, pc;
446 /* Macro for exception fixup code to access integer registers. */
447 #define una_reg(r) (regs.regs[(r) >= 16 && (r) <= 18 ? (r)+19 : (r)])
451 do_entUna(void * va, unsigned long opcode, unsigned long reg,
452 unsigned long a3, unsigned long a4, unsigned long a5,
455 long error, tmp1, tmp2, tmp3, tmp4;
456 unsigned long pc = regs.pc - 4;
457 const struct exception_table_entry *fixup;
459 unaligned[0].count++;
460 unaligned[0].va = (unsigned long) va;
461 unaligned[0].pc = pc;
463 /* We don't want to use the generic get/put unaligned macros as
464 we want to trap exceptions. Only if we actually get an
465 exception will we decide whether we should have caught it. */
468 case 0x0c: /* ldwu */
469 __asm__ __volatile__(
470 "1: ldq_u %1,0(%3)\n"
471 "2: ldq_u %2,1(%3)\n"
475 ".section __ex_table,\"a\"\n"
477 " lda %1,3b-1b(%0)\n"
479 " lda %2,3b-2b(%0)\n"
481 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
485 una_reg(reg) = tmp1|tmp2;
489 __asm__ __volatile__(
490 "1: ldq_u %1,0(%3)\n"
491 "2: ldq_u %2,3(%3)\n"
495 ".section __ex_table,\"a\"\n"
497 " lda %1,3b-1b(%0)\n"
499 " lda %2,3b-2b(%0)\n"
501 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
505 una_reg(reg) = (int)(tmp1|tmp2);
509 __asm__ __volatile__(
510 "1: ldq_u %1,0(%3)\n"
511 "2: ldq_u %2,7(%3)\n"
515 ".section __ex_table,\"a\"\n"
517 " lda %1,3b-1b(%0)\n"
519 " lda %2,3b-2b(%0)\n"
521 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
525 una_reg(reg) = tmp1|tmp2;
528 /* Note that the store sequences do not indicate that they change
529 memory because it _should_ be affecting nothing in this context.
530 (Otherwise we have other, much larger, problems.) */
532 __asm__ __volatile__(
533 "1: ldq_u %2,1(%5)\n"
534 "2: ldq_u %1,0(%5)\n"
541 "3: stq_u %2,1(%5)\n"
542 "4: stq_u %1,0(%5)\n"
544 ".section __ex_table,\"a\"\n"
546 " lda %2,5b-1b(%0)\n"
548 " lda %1,5b-2b(%0)\n"
550 " lda $31,5b-3b(%0)\n"
552 " lda $31,5b-4b(%0)\n"
554 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
555 "=&r"(tmp3), "=&r"(tmp4)
556 : "r"(va), "r"(una_reg(reg)), "0"(0));
562 __asm__ __volatile__(
563 "1: ldq_u %2,3(%5)\n"
564 "2: ldq_u %1,0(%5)\n"
571 "3: stq_u %2,3(%5)\n"
572 "4: stq_u %1,0(%5)\n"
574 ".section __ex_table,\"a\"\n"
576 " lda %2,5b-1b(%0)\n"
578 " lda %1,5b-2b(%0)\n"
580 " lda $31,5b-3b(%0)\n"
582 " lda $31,5b-4b(%0)\n"
584 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
585 "=&r"(tmp3), "=&r"(tmp4)
586 : "r"(va), "r"(una_reg(reg)), "0"(0));
592 __asm__ __volatile__(
593 "1: ldq_u %2,7(%5)\n"
594 "2: ldq_u %1,0(%5)\n"
601 "3: stq_u %2,7(%5)\n"
602 "4: stq_u %1,0(%5)\n"
604 ".section __ex_table,\"a\"\n\t"
606 " lda %2,5b-1b(%0)\n"
608 " lda %1,5b-2b(%0)\n"
610 " lda $31,5b-3b(%0)\n"
612 " lda $31,5b-4b(%0)\n"
614 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
615 "=&r"(tmp3), "=&r"(tmp4)
616 : "r"(va), "r"(una_reg(reg)), "0"(0));
623 printk("Bad unaligned kernel access at %016lx: %p %lx %ld\n",
624 pc, va, opcode, reg);
628 /* Ok, we caught the exception, but we don't want it. Is there
629 someone to pass it along to? */
630 if ((fixup = search_exception_tables(pc)) != 0) {
632 newpc = fixup_exception(una_reg, fixup, pc);
634 printk("Forwarding unaligned exception at %lx (%lx)\n",
642 * Yikes! No one to forward the exception to.
643 * Since the registers are in a weird format, dump them ourselves.
647 printk("%s(%d): unhandled unaligned exception\n",
648 current->comm, current->pid);
650 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx\n",
651 pc, una_reg(26), regs.ps);
652 printk("r0 = %016lx r1 = %016lx r2 = %016lx\n",
653 una_reg(0), una_reg(1), una_reg(2));
654 printk("r3 = %016lx r4 = %016lx r5 = %016lx\n",
655 una_reg(3), una_reg(4), una_reg(5));
656 printk("r6 = %016lx r7 = %016lx r8 = %016lx\n",
657 una_reg(6), una_reg(7), una_reg(8));
658 printk("r9 = %016lx r10= %016lx r11= %016lx\n",
659 una_reg(9), una_reg(10), una_reg(11));
660 printk("r12= %016lx r13= %016lx r14= %016lx\n",
661 una_reg(12), una_reg(13), una_reg(14));
662 printk("r15= %016lx\n", una_reg(15));
663 printk("r16= %016lx r17= %016lx r18= %016lx\n",
664 una_reg(16), una_reg(17), una_reg(18));
665 printk("r19= %016lx r20= %016lx r21= %016lx\n",
666 una_reg(19), una_reg(20), una_reg(21));
667 printk("r22= %016lx r23= %016lx r24= %016lx\n",
668 una_reg(22), una_reg(23), una_reg(24));
669 printk("r25= %016lx r27= %016lx r28= %016lx\n",
670 una_reg(25), una_reg(27), una_reg(28));
671 printk("gp = %016lx sp = %p\n", regs.gp, ®s+1);
673 dik_show_code((unsigned int *)pc);
674 dik_show_trace((unsigned long *)(®s+1));
676 if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) {
677 printk("die_if_kernel recursion detected.\n");
685 * Convert an s-floating point value in memory format to the
686 * corresponding value in register format. The exponent
687 * needs to be remapped to preserve non-finite values
688 * (infinities, not-a-numbers, denormals).
690 static inline unsigned long
691 s_mem_to_reg (unsigned long s_mem)
693 unsigned long frac = (s_mem >> 0) & 0x7fffff;
694 unsigned long sign = (s_mem >> 31) & 0x1;
695 unsigned long exp_msb = (s_mem >> 30) & 0x1;
696 unsigned long exp_low = (s_mem >> 23) & 0x7f;
699 exp = (exp_msb << 10) | exp_low; /* common case */
701 if (exp_low == 0x7f) {
705 if (exp_low == 0x00) {
711 return (sign << 63) | (exp << 52) | (frac << 29);
715 * Convert an s-floating point value in register format to the
716 * corresponding value in memory format.
718 static inline unsigned long
719 s_reg_to_mem (unsigned long s_reg)
721 return ((s_reg >> 62) << 30) | ((s_reg << 5) >> 34);
725 * Handle user-level unaligned fault. Handling user-level unaligned
726 * faults is *extremely* slow and produces nasty messages. A user
727 * program *should* fix unaligned faults ASAP.
729 * Notice that we have (almost) the regular kernel stack layout here,
730 * so finding the appropriate registers is a little more difficult
731 * than in the kernel case.
733 * Finally, we handle regular integer load/stores only. In
734 * particular, load-linked/store-conditionally and floating point
735 * load/stores are not supported. The former make no sense with
736 * unaligned faults (they are guaranteed to fail) and I don't think
737 * the latter will occur in any decent program.
739 * Sigh. We *do* have to handle some FP operations, because GCC will
740 * uses them as temporary storage for integer memory to memory copies.
741 * However, we need to deal with stt/ldt and sts/lds only.
744 #define OP_INT_MASK ( 1L << 0x28 | 1L << 0x2c /* ldl stl */ \
745 | 1L << 0x29 | 1L << 0x2d /* ldq stq */ \
746 | 1L << 0x0c | 1L << 0x0d /* ldwu stw */ \
747 | 1L << 0x0a | 1L << 0x0e ) /* ldbu stb */
749 #define OP_WRITE_MASK ( 1L << 0x26 | 1L << 0x27 /* sts stt */ \
750 | 1L << 0x2c | 1L << 0x2d /* stl stq */ \
751 | 1L << 0x0d | 1L << 0x0e ) /* stw stb */
753 #define R(x) ((size_t) &((struct pt_regs *)0)->x)
755 static int unauser_reg_offsets[32] = {
756 R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), R(r8),
757 /* r9 ... r15 are stored in front of regs. */
758 -56, -48, -40, -32, -24, -16, -8,
759 R(r16), R(r17), R(r18),
760 R(r19), R(r20), R(r21), R(r22), R(r23), R(r24), R(r25), R(r26),
761 R(r27), R(r28), R(gp),
768 do_entUnaUser(void __user * va, unsigned long opcode,
769 unsigned long reg, struct pt_regs *regs)
772 static long last_time = 0;
774 unsigned long tmp1, tmp2, tmp3, tmp4;
775 unsigned long fake_reg, *reg_addr = &fake_reg;
779 /* Check the UAC bits to decide what the user wants us to do
780 with the unaliged access. */
782 if (!test_thread_flag (TIF_UAC_NOPRINT)) {
783 if (cnt >= 5 && jiffies - last_time > 5*HZ) {
787 printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n",
788 current->comm, current->pid,
789 regs->pc - 4, va, opcode, reg);
793 if (test_thread_flag (TIF_UAC_SIGBUS))
795 /* Not sure why you'd want to use this, but... */
796 if (test_thread_flag (TIF_UAC_NOFIX))
799 /* Don't bother reading ds in the access check since we already
800 know that this came from the user. Also rely on the fact that
801 the page at TASK_SIZE is unmapped and so can't be touched anyway. */
802 if (!__access_ok((unsigned long)va, 0, USER_DS))
805 ++unaligned[1].count;
806 unaligned[1].va = (unsigned long)va;
807 unaligned[1].pc = regs->pc - 4;
809 if ((1L << opcode) & OP_INT_MASK) {
810 /* it's an integer load/store */
812 reg_addr = (unsigned long *)
813 ((char *)regs + unauser_reg_offsets[reg]);
814 } else if (reg == 30) {
815 /* usp in PAL regs */
818 /* zero "register" */
823 /* We don't want to use the generic get/put unaligned macros as
824 we want to trap exceptions. Only if we actually get an
825 exception will we decide whether we should have caught it. */
828 case 0x0c: /* ldwu */
829 __asm__ __volatile__(
830 "1: ldq_u %1,0(%3)\n"
831 "2: ldq_u %2,1(%3)\n"
835 ".section __ex_table,\"a\"\n"
837 " lda %1,3b-1b(%0)\n"
839 " lda %2,3b-2b(%0)\n"
841 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
845 *reg_addr = tmp1|tmp2;
849 __asm__ __volatile__(
850 "1: ldq_u %1,0(%3)\n"
851 "2: ldq_u %2,3(%3)\n"
855 ".section __ex_table,\"a\"\n"
857 " lda %1,3b-1b(%0)\n"
859 " lda %2,3b-2b(%0)\n"
861 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
865 alpha_write_fp_reg(reg, s_mem_to_reg((int)(tmp1|tmp2)));
869 __asm__ __volatile__(
870 "1: ldq_u %1,0(%3)\n"
871 "2: ldq_u %2,7(%3)\n"
875 ".section __ex_table,\"a\"\n"
877 " lda %1,3b-1b(%0)\n"
879 " lda %2,3b-2b(%0)\n"
881 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
885 alpha_write_fp_reg(reg, tmp1|tmp2);
889 __asm__ __volatile__(
890 "1: ldq_u %1,0(%3)\n"
891 "2: ldq_u %2,3(%3)\n"
895 ".section __ex_table,\"a\"\n"
897 " lda %1,3b-1b(%0)\n"
899 " lda %2,3b-2b(%0)\n"
901 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
905 *reg_addr = (int)(tmp1|tmp2);
909 __asm__ __volatile__(
910 "1: ldq_u %1,0(%3)\n"
911 "2: ldq_u %2,7(%3)\n"
915 ".section __ex_table,\"a\"\n"
917 " lda %1,3b-1b(%0)\n"
919 " lda %2,3b-2b(%0)\n"
921 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
925 *reg_addr = tmp1|tmp2;
928 /* Note that the store sequences do not indicate that they change
929 memory because it _should_ be affecting nothing in this context.
930 (Otherwise we have other, much larger, problems.) */
932 __asm__ __volatile__(
933 "1: ldq_u %2,1(%5)\n"
934 "2: ldq_u %1,0(%5)\n"
941 "3: stq_u %2,1(%5)\n"
942 "4: stq_u %1,0(%5)\n"
944 ".section __ex_table,\"a\"\n"
946 " lda %2,5b-1b(%0)\n"
948 " lda %1,5b-2b(%0)\n"
950 " lda $31,5b-3b(%0)\n"
952 " lda $31,5b-4b(%0)\n"
954 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
955 "=&r"(tmp3), "=&r"(tmp4)
956 : "r"(va), "r"(*reg_addr), "0"(0));
962 fake_reg = s_reg_to_mem(alpha_read_fp_reg(reg));
966 __asm__ __volatile__(
967 "1: ldq_u %2,3(%5)\n"
968 "2: ldq_u %1,0(%5)\n"
975 "3: stq_u %2,3(%5)\n"
976 "4: stq_u %1,0(%5)\n"
978 ".section __ex_table,\"a\"\n"
980 " lda %2,5b-1b(%0)\n"
982 " lda %1,5b-2b(%0)\n"
984 " lda $31,5b-3b(%0)\n"
986 " lda $31,5b-4b(%0)\n"
988 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
989 "=&r"(tmp3), "=&r"(tmp4)
990 : "r"(va), "r"(*reg_addr), "0"(0));
996 fake_reg = alpha_read_fp_reg(reg);
1000 __asm__ __volatile__(
1001 "1: ldq_u %2,7(%5)\n"
1002 "2: ldq_u %1,0(%5)\n"
1009 "3: stq_u %2,7(%5)\n"
1010 "4: stq_u %1,0(%5)\n"
1012 ".section __ex_table,\"a\"\n\t"
1014 " lda %2,5b-1b(%0)\n"
1016 " lda %1,5b-2b(%0)\n"
1018 " lda $31,5b-3b(%0)\n"
1020 " lda $31,5b-4b(%0)\n"
1022 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
1023 "=&r"(tmp3), "=&r"(tmp4)
1024 : "r"(va), "r"(*reg_addr), "0"(0));
1030 /* What instruction were you trying to use, exactly? */
1034 /* Only integer loads should get here; everyone else returns early. */
1040 regs->pc -= 4; /* make pc point to faulting insn */
1041 info.si_signo = SIGSEGV;
1044 /* We need to replicate some of the logic in mm/fault.c,
1045 since we don't have access to the fault code in the
1046 exception handling return path. */
1047 if (!__access_ok((unsigned long)va, 0, USER_DS))
1048 info.si_code = SEGV_ACCERR;
1050 struct mm_struct *mm = current->mm;
1051 down_read(&mm->mmap_sem);
1052 if (find_vma(mm, (unsigned long)va))
1053 info.si_code = SEGV_ACCERR;
1055 info.si_code = SEGV_MAPERR;
1056 up_read(&mm->mmap_sem);
1059 send_sig_info(SIGSEGV, &info, current);
1064 info.si_signo = SIGBUS;
1066 info.si_code = BUS_ADRALN;
1068 send_sig_info(SIGBUS, &info, current);
1075 /* Tell PAL-code what global pointer we want in the kernel. */
1076 register unsigned long gptr __asm__("$29");
1079 /* Hack for Multia (UDB) and JENSEN: some of their SRMs have
1080 a bug in the handling of the opDEC fault. Fix it up if so. */
1081 if (implver() == IMPLVER_EV4)