2 * arch/arm/mach-iop3xx/iq80321-pci.c
4 * PCI support for the Intel IQ80321 reference board
6 * Author: Rory Bolt <rorybolt@pacbell.net>
7 * Copyright (C) 2002 Rory Bolt
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/pci.h>
15 #include <linux/init.h>
17 #include <asm/hardware.h>
19 #include <asm/mach/pci.h>
20 #include <asm/mach-types.h>
23 * The following macro is used to lookup irqs in a standard table
24 * format for those systems that do not already have PCI
25 * interrupts properly routed. We assume 1 <= pin <= 4
27 #define PCI_IRQ_TABLE_LOOKUP(minid,maxid) \
29 unsigned int _idsel = idsel - minid; \
30 if (_idsel <= maxid) \
31 _ctl_ = pci_irq_table[_idsel][pin-1]; \
34 #define INTA IRQ_IQ31244_INTA
35 #define INTB IRQ_IQ31244_INTB
36 #define INTC IRQ_IQ31244_INTC
37 #define INTD IRQ_IQ31244_INTD
39 #define INTE IRQ_IQ31244_I82546
41 static inline int __init
42 iq31244_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
44 static int pci_irq_table[][4] = {
46 * PCI IDSEL/INTPIN->INTLINE
49 #ifdef CONFIG_ARCH_EP80219
50 {INTB, INTB, INTB, INTB}, /* CFlash */
51 {INTE, INTE, INTE, INTE}, /* 82551 Pro 100 */
52 {INTD, INTD, INTD, INTD}, /* PCI-X Slot */
53 {INTC, INTC, INTC, INTC}, /* SATA */
55 {INTB, INTB, INTB, INTB}, /* CFlash */
56 {INTC, INTC, INTC, INTC}, /* SATA */
57 {INTD, INTD, INTD, INTD}, /* PCI-X Slot */
58 {INTE, INTE, INTE, INTE}, /* 82546 GigE */
59 #endif // CONFIG_ARCH_EP80219
62 BUG_ON(pin < 1 || pin > 4);
64 return PCI_IRQ_TABLE_LOOKUP(0, 7);
67 static int iq31244_setup(int nr, struct pci_sys_data *sys)
74 res = kmalloc(sizeof(struct resource) * 2, GFP_KERNEL);
76 panic("PCI: unable to alloc resources");
78 memset(res, 0, sizeof(struct resource) * 2);
80 res[0].start = IQ31244_PCI_IO_BASE + 0x6e000000;
81 res[0].end = IQ31244_PCI_IO_BASE + IQ31244_PCI_IO_SIZE - 1 + IQ31244_PCI_IO_OFFSET;
82 res[0].name = "IQ31244 PCI I/O Space";
83 res[0].flags = IORESOURCE_IO;
85 res[1].start = IQ31244_PCI_MEM_BASE;
86 res[1].end = IQ31244_PCI_MEM_BASE + IQ31244_PCI_MEM_SIZE;
87 res[1].name = "IQ31244 PCI Memory Space";
88 res[1].flags = IORESOURCE_MEM;
90 request_resource(&ioport_resource, &res[0]);
91 request_resource(&iomem_resource, &res[1]);
93 sys->resource[0] = &res[0];
94 sys->resource[1] = &res[1];
95 sys->resource[2] = NULL;
96 sys->io_offset = IQ31244_PCI_IO_OFFSET;
97 sys->mem_offset = IQ80321_PCI_MEM_BASE -
98 (*IOP321_IABAR1 & PCI_BASE_ADDRESS_MEM_MASK);
100 iop3xx_pcibios_min_io = IQ31244_PCI_IO_BASE;
101 iop3xx_pcibios_min_mem = IQ31244_PCI_MEM_BASE;
106 static void iq31244_preinit(void)
109 /* setting up the second translation window */
110 *IOP321_OMWTVR1 = IQ31244_PCI_MEM_BASE + 0x04000000;
111 *IOP321_OUMWTVR1 = 0x0;
114 static struct hw_pci iq31244_pci __initdata = {
115 .swizzle = pci_std_swizzle,
117 .setup = iq31244_setup,
118 .scan = iop321_scan_bus,
119 .preinit = iq31244_preinit,
120 .map_irq = iq31244_map_irq
123 static int __init iq31244_pci_init(void)
125 if (machine_is_iq31244())
126 pci_common_init(&iq31244_pci);
130 subsys_initcall(iq31244_pci_init);