2 * linux/arch/arm/mach-pxa/irq.c
4 * Generic PXA IRQ handling, GPIO IRQ demultiplexing, etc.
6 * Author: Nicolas Pitre
7 * Created: Jun 15, 2001
8 * Copyright: MontaVista Software Inc.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/interrupt.h>
18 #include <linux/ptrace.h>
20 #include <asm/hardware.h>
22 #include <asm/mach/irq.h>
28 * This is for IRQs known as PXA_IRQ([8...31]).
31 static void pxa_mask_irq(unsigned int irq)
33 ICMR &= ~(1 << (irq + PXA_IRQ_SKIP));
36 static void pxa_unmask_irq(unsigned int irq)
38 ICMR |= (1 << (irq + PXA_IRQ_SKIP));
41 static struct irqchip pxa_internal_chip = {
44 .unmask = pxa_unmask_irq,
48 * PXA GPIO edge detection for IRQs:
49 * IRQs are generated on Falling-Edge, Rising-Edge, or both.
50 * Use this instead of directly setting GRER/GFER.
53 static long GPIO_IRQ_rising_edge[3];
54 static long GPIO_IRQ_falling_edge[3];
55 static long GPIO_IRQ_mask[3];
57 static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
61 gpio = IRQ_TO_GPIO(irq);
64 if (type == IRQT_PROBE) {
65 /* Don't mess with enabled GPIOs using preconfigured edges or
66 GPIOs set to alternate function during probe */
67 if ((GPIO_IRQ_rising_edge[idx] | GPIO_IRQ_falling_edge[idx]) &
70 if (GAFR(gpio) & (0x3 << (((gpio) & 0xf)*2)))
72 type = __IRQT_RISEDGE | __IRQT_FALEDGE;
75 printk(KERN_DEBUG "IRQ%d (GPIO%d): ", irq, gpio);
77 pxa_gpio_mode(gpio | GPIO_IN);
79 if (type & __IRQT_RISEDGE) {
81 __set_bit (gpio, GPIO_IRQ_rising_edge);
83 __clear_bit (gpio, GPIO_IRQ_rising_edge);
85 if (type & __IRQT_FALEDGE) {
87 __set_bit (gpio, GPIO_IRQ_falling_edge);
89 __clear_bit (gpio, GPIO_IRQ_falling_edge);
93 GRER(gpio) = GPIO_IRQ_rising_edge[idx] & GPIO_IRQ_mask[idx];
94 GFER(gpio) = GPIO_IRQ_falling_edge[idx] & GPIO_IRQ_mask[idx];
99 * GPIO IRQs must be acknowledged. This is for GPIO 0 and 1.
102 static void pxa_ack_low_gpio(unsigned int irq)
104 GEDR0 = (1 << (irq - IRQ_GPIO0));
107 static struct irqchip pxa_low_gpio_chip = {
108 .ack = pxa_ack_low_gpio,
109 .mask = pxa_mask_irq,
110 .unmask = pxa_unmask_irq,
111 .type = pxa_gpio_irq_type,
115 * Demux handler for GPIO 2-80 edge detect interrupts
118 static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc,
119 struct pt_regs *regs)
131 desc = irq_desc + irq;
135 desc->handle(irq, desc, regs);
147 desc = irq_desc + irq;
150 desc->handle(irq, desc, regs);
162 desc = irq_desc + irq;
165 desc->handle(irq, desc, regs);
175 static void pxa_ack_muxed_gpio(unsigned int irq)
177 int gpio = irq - IRQ_GPIO(2) + 2;
178 GEDR(gpio) = GPIO_bit(gpio);
181 static void pxa_mask_muxed_gpio(unsigned int irq)
183 int gpio = irq - IRQ_GPIO(2) + 2;
184 __clear_bit(gpio, GPIO_IRQ_mask);
185 GRER(gpio) &= ~GPIO_bit(gpio);
186 GFER(gpio) &= ~GPIO_bit(gpio);
189 static void pxa_unmask_muxed_gpio(unsigned int irq)
191 int gpio = irq - IRQ_GPIO(2) + 2;
193 __set_bit(gpio, GPIO_IRQ_mask);
194 GRER(gpio) = GPIO_IRQ_rising_edge[idx] & GPIO_IRQ_mask[idx];
195 GFER(gpio) = GPIO_IRQ_falling_edge[idx] & GPIO_IRQ_mask[idx];
198 static struct irqchip pxa_muxed_gpio_chip = {
199 .ack = pxa_ack_muxed_gpio,
200 .mask = pxa_mask_muxed_gpio,
201 .unmask = pxa_unmask_muxed_gpio,
202 .type = pxa_gpio_irq_type,
206 void __init pxa_init_irq(void)
210 /* disable all IRQs */
213 /* all IRQs are IRQ, not FIQ */
216 /* clear all GPIO edge detects */
217 GFER0 = GFER1 = GFER2 = 0;
218 GRER0 = GRER1 = GRER2 = 0;
223 /* only unmasked interrupts kick us out of idle */
226 /* GPIO 0 and 1 must have their mask bit always set */
227 GPIO_IRQ_mask[0] = 3;
229 for (irq = PXA_IRQ(PXA_IRQ_SKIP); irq <= PXA_IRQ(31); irq++) {
230 set_irq_chip(irq, &pxa_internal_chip);
231 set_irq_handler(irq, do_level_IRQ);
232 set_irq_flags(irq, IRQF_VALID);
235 for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
236 set_irq_chip(irq, &pxa_low_gpio_chip);
237 set_irq_handler(irq, do_edge_IRQ);
238 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
241 for (irq = IRQ_GPIO(2); irq <= IRQ_GPIO(80); irq++) {
242 set_irq_chip(irq, &pxa_muxed_gpio_chip);
243 set_irq_handler(irq, do_edge_IRQ);
244 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
247 /* Install handler for GPIO 2-80 edge detect interrupts */
248 set_irq_chip(IRQ_GPIO_2_80, &pxa_internal_chip);
249 set_irq_chained_handler(IRQ_GPIO_2_80, pxa_gpio_demux_handler);