1 /* linux/arch/arm/mach-s3c2410/s3c2440.c
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * Samsung S3C2440 Mobile CPU support
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 * 24-Aug-2004 BJD Start of s3c2440 support
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/interrupt.h>
19 #include <linux/list.h>
20 #include <linux/timer.h>
21 #include <linux/init.h>
22 #include <linux/device.h>
24 #include <asm/mach/arch.h>
25 #include <asm/mach/map.h>
26 #include <asm/mach/irq.h>
28 #include <asm/hardware.h>
32 #include <asm/arch/regs-clock.h>
33 #include <asm/arch/regs-serial.h>
38 int s3c2440_clock_tick_rate = 12*1000*1000; /* current timers at 12MHz */
42 unsigned long s3c2440_baseclk = 12*1000*1000; /* assume base is 12MHz */
43 unsigned long s3c2440_hdiv;
45 unsigned long s3c2440_fclk;
46 unsigned long s3c2440_hclk;
47 unsigned long s3c2440_pclk;
49 static struct map_desc s3c2440_iodesc[] __initdata = {
57 static struct resource s3c_uart0_resource[] = {
59 .start = S3C2410_PA_UART0,
60 .end = S3C2410_PA_UART0 + 0x3fff,
61 .flags = IORESOURCE_MEM,
64 .start = IRQ_S3CUART_RX0,
65 .end = IRQ_S3CUART_ERR0,
66 .flags = IORESOURCE_IRQ,
71 static struct resource s3c_uart1_resource[] = {
73 .start = S3C2410_PA_UART1,
74 .end = S3C2410_PA_UART1 + 0x3fff,
75 .flags = IORESOURCE_MEM,
78 .start = IRQ_S3CUART_RX1,
79 .end = IRQ_S3CUART_ERR1,
80 .flags = IORESOURCE_IRQ,
84 static struct resource s3c_uart2_resource[] = {
86 .start = S3C2410_PA_UART2,
87 .end = S3C2410_PA_UART2 + 0x3fff,
88 .flags = IORESOURCE_MEM,
91 .start = IRQ_S3CUART_RX2,
92 .end = IRQ_S3CUART_ERR2,
93 .flags = IORESOURCE_IRQ,
97 /* our uart devices */
99 static struct platform_device s3c_uart0 = {
100 .name = "s3c2440-uart",
102 .num_resources = ARRAY_SIZE(s3c_uart0_resource),
103 .resource = s3c_uart0_resource,
107 static struct platform_device s3c_uart1 = {
108 .name = "s3c2440-uart",
110 .num_resources = ARRAY_SIZE(s3c_uart1_resource),
111 .resource = s3c_uart1_resource,
114 static struct platform_device s3c_uart2 = {
115 .name = "s3c2440-uart",
117 .num_resources = ARRAY_SIZE(s3c_uart2_resource),
118 .resource = s3c_uart2_resource,
121 static struct platform_device *uart_devices[] __initdata = {
127 void __init s3c2440_map_io(struct map_desc *mach_desc, int size)
130 unsigned long camdiv;
132 /* register our io-tables */
134 iotable_init(s3c2440_iodesc, ARRAY_SIZE(s3c2440_iodesc));
135 iotable_init(mach_desc, size);
137 /* now we've got our machine bits initialised, work out what
138 * clocks we've got */
140 s3c2440_fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON),
143 tmp = __raw_readl(S3C2410_CLKDIVN);
144 camdiv = __raw_readl(S3C2440_CAMDIVN);
146 /* work out clock scalings */
148 switch (tmp & S3C2440_CLKDIVN_HDIVN_MASK) {
149 case S3C2440_CLKDIVN_HDIVN_1:
153 case S3C2440_CLKDIVN_HDIVN_2:
157 case S3C2440_CLKDIVN_HDIVN_4_8:
158 s3c2440_hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
161 case S3C2440_CLKDIVN_HDIVN_3_6:
162 s3c2440_hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 6 : 3;
166 s3c2440_hclk = s3c2440_fclk / s3c2440_hdiv;
167 s3c2440_pclk = s3c2440_hclk / ((tmp & S3C2440_CLKDIVN_PDIVN) ? 2 : 1);
169 /* print brieft summary of clocks, etc */
171 printk("S3C2440: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
172 print_mhz(s3c2440_fclk), print_mhz(s3c2440_hclk),
173 print_mhz(s3c2440_pclk));
178 int __init s3c2440_init(void)
182 printk("S3C2440: Initialising architecture\n");
184 ret = platform_add_devices(uart_devices, ARRAY_SIZE(uart_devices));
188 // todo: board specific inits?