1 /* linux/arch/arm/mach-s3c2410/time.c
3 * Copyright (C) 2003,2004 Simtec Electronics
4 * Ben Dooks, <ben@simtec.co.uk>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include <linux/config.h>
22 #include <linux/kernel.h>
23 #include <linux/sched.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
26 #include <asm/system.h>
28 #include <asm/mach-types.h>
32 #include <asm/arch/map.h>
33 #include <asm/arch/regs-timer.h>
34 #include <asm/arch/regs-irq.h>
35 #include <asm/mach/time.h>
39 static unsigned long timer_startval;
40 static unsigned long timer_usec_ticks;
42 #define TIMER_USEC_SHIFT 16
44 /* we use the shifted arithmetic to work out the ratio of timer ticks
45 * to usecs, as often the peripheral clock is not a nice even multiple
48 * shift of 14 and 15 are too low for the 12MHz, 16 seems to be ok
49 * for the current HZ value of 200 without producing overflows.
51 * Original patch by Dimitry Andric, updated by Ben Dooks
55 /* timer_mask_usec_ticks
57 * given a clock and divisor, make the value to pass into timer_ticks_to_usec
58 * to scale the ticks into usecs
61 static inline unsigned long
62 timer_mask_usec_ticks(unsigned long scaler, unsigned long pclk)
64 unsigned long den = pclk / 1000;
66 return ((1000 << TIMER_USEC_SHIFT) * scaler + (den >> 1)) / den;
69 /* timer_ticks_to_usec
71 * convert timer ticks to usec.
74 static inline unsigned long timer_ticks_to_usec(unsigned long ticks)
78 res = ticks * timer_usec_ticks;
79 res += 1 << (TIMER_USEC_SHIFT - 4); /* round up slightly */
81 return res >> TIMER_USEC_SHIFT;
85 * Returns microsecond since last clock interrupt. Note that interrupts
86 * will have been disabled by do_gettimeoffset()
87 * IRQs are disabled before entering here from do_gettimeofday()
90 #define SRCPND_TIMER4 (1<<(IRQ_TIMER4 - IRQ_EINT0))
92 static unsigned long s3c2410_gettimeoffset (void)
95 unsigned long irqpend;
98 /* work out how many ticks have gone since last timer interrupt */
100 tval = __raw_readl(S3C2410_TCNTO(4));
101 tdone = timer_startval - tval;
103 /* check to see if there is an interrupt pending */
105 irqpend = __raw_readl(S3C2410_SRCPND);
106 if (irqpend & SRCPND_TIMER4) {
107 /* re-read the timer, and try and fix up for the missed
108 * interrupt. Note, the interrupt may go off before the
109 * timer has re-loaded from wrapping.
112 tval = __raw_readl(S3C2410_TCNTO(4));
113 tdone = timer_startval - tval;
116 tdone += timer_startval;
119 return timer_ticks_to_usec(tdone);
124 * IRQ handler for the timer
127 s3c2410_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
129 write_seqlock(&xtime_lock);
131 write_sequnlock(&xtime_lock);
135 static struct irqaction s3c2410_timer_irq = {
136 .name = "S3C2410 Timer Tick",
137 .flags = SA_INTERRUPT,
138 .handler = s3c2410_timer_interrupt
142 * Set up timer interrupt, and return the current time in seconds.
144 * Currently we only use timer4, as it is the only timer which has no
145 * other function that can be exploited externally
147 static void s3c2410_timer_setup (void)
154 tcnt = 0xffff; /* default value for tcnt */
156 /* read the current timer configuration bits */
158 tcon = __raw_readl(S3C2410_TCON);
159 tcfg1 = __raw_readl(S3C2410_TCFG1);
160 tcfg0 = __raw_readl(S3C2410_TCFG0);
162 /* configure the system for whichever machine is in use */
164 if (machine_is_bast() || machine_is_vr1000()) {
165 /* timer is at 12MHz, scaler is 1 */
166 timer_usec_ticks = timer_mask_usec_ticks(1, 12000000);
167 tcnt = 12000000 / HZ;
169 tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK;
170 tcfg1 |= S3C2410_TCFG1_MUX4_TCLK1;
172 /* for the h1940 (and others), we use the pclk from the core
173 * to generate the timer values. since values around 50 to
174 * 70MHz are not values we can directly generate the timer
175 * value from, we need to pre-scale and divide before using it.
177 * for instance, using 50.7MHz and dividing by 6 gives 8.45MHz
178 * (8.45 ticks per usec)
181 /* this is used as default if no other timer can be found */
183 timer_usec_ticks = timer_mask_usec_ticks(6, s3c24xx_pclk);
185 tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK;
186 tcfg1 |= S3C2410_TCFG1_MUX4_DIV2;
188 tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
189 tcfg0 |= ((6 - 1) / 2) << S3C2410_TCFG_PRESCALER1_SHIFT;
191 tcnt = (s3c24xx_pclk / 6) / HZ;
194 /* timers reload after counting zero, so reduce the count by 1 */
198 printk("timer tcon=%08lx, tcnt %04lx, tcfg %08lx,%08lx, usec %08lx\n",
199 tcon, tcnt, tcfg0, tcfg1, timer_usec_ticks);
201 /* check to see if timer is within 16bit range... */
203 panic("setup_timer: HZ is too small, cannot configure timer!");
207 __raw_writel(tcfg1, S3C2410_TCFG1);
208 __raw_writel(tcfg0, S3C2410_TCFG0);
210 timer_startval = tcnt;
211 __raw_writel(tcnt, S3C2410_TCNTB(4));
213 /* ensure timer is stopped... */
216 tcon |= S3C2410_TCON_T4RELOAD;
217 tcon |= S3C2410_TCON_T4MANUALUPD;
219 __raw_writel(tcon, S3C2410_TCON);
220 __raw_writel(tcnt, S3C2410_TCNTB(4));
221 __raw_writel(tcnt, S3C2410_TCMPB(4));
223 /* start the timer running */
224 tcon |= S3C2410_TCON_T4START;
225 tcon &= ~S3C2410_TCON_T4MANUALUPD;
226 __raw_writel(tcon, S3C2410_TCON);
229 static void __init s3c2410_timer_init (void)
231 s3c2410_timer_setup();
232 setup_irq(IRQ_TIMER4, &s3c2410_timer_irq);
235 struct sys_timer s3c24xx_timer = {
236 .init = s3c2410_timer_init,
237 .offset = s3c2410_gettimeoffset,
238 .resume = s3c2410_timer_setup