1 /* $Id: serial.c,v 1.20 2004/05/24 12:00:20 starvik Exp $
3 * Serial port driver for the ETRAX 100LX chip
5 * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Axis Communications AB
7 * Many, many authors. Based once upon a time on serial.c for 16x50.
10 * Revision 1.20 2004/05/24 12:00:20 starvik
11 * Big merge of stuff from Linux 2.4 (e.g. manual mode for the serial port).
13 * Revision 1.19 2004/05/17 13:12:15 starvik
15 * Big merge from Linux 2.4 still pending.
17 * Revision 1.18 2003/10/28 07:18:30 starvik
18 * Compiles with debug info
20 * Revision 1.17 2003/07/04 08:27:37 starvik
21 * Merge of Linux 2.5.74
23 * Revision 1.16 2003/06/13 10:05:19 johana
24 * Help the user to avoid trouble by:
25 * Forcing mixed mode for status/control lines if not all pins are used.
27 * Revision 1.15 2003/06/13 09:43:01 johana
28 * Merged in the following changes from os/linux/arch/cris/drivers/serial.c
29 * + some minor changes to reduce diff.
31 * Revision 1.49 2003/05/30 11:31:54 johana
32 * Merged in change-branch--serial9bit that adds CMSPAR support for sticky
35 * Revision 1.48 2003/05/30 11:03:57 johana
36 * Implemented rs_send_xchar() by disabling the DMA and writing manually.
37 * Added e100_disable_txdma_channel() and e100_enable_txdma_channel().
38 * Fixed rs_throttle() and rs_unthrottle() to properly call rs_send_xchar
39 * instead of setting info->x_char and check the CRTSCTS flag before
40 * controlling the rts pin.
42 * Revision 1.14 2003/04/09 08:12:44 pkj
43 * Corrected typo changes made upstream.
45 * Revision 1.13 2003/04/09 05:20:47 starvik
46 * Merge of Linux 2.5.67
48 * Revision 1.11 2003/01/22 06:48:37 starvik
49 * Fixed warnings issued by GCC 3.2.1
51 * Revision 1.9 2002/12/13 09:07:47 starvik
52 * Alert user that RX_TIMEOUT_TICKS==0 doesn't work
54 * Revision 1.8 2002/12/11 13:13:57 starvik
55 * Added arch/ to v10 specific includes
56 * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
58 * Revision 1.7 2002/12/06 07:13:57 starvik
59 * Corrected work queue stuff
60 * Removed CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
62 * Revision 1.6 2002/11/21 07:17:46 starvik
63 * Change static inline to extern inline where otherwise outlined with gcc-3.2
65 * Revision 1.5 2002/11/14 15:59:49 starvik
66 * Linux 2.5 port of the latest serial driver from 2.4. The work queue stuff
67 * probably doesn't work yet.
69 * Revision 1.42 2002/11/05 09:08:47 johana
70 * Better implementation of rs_stop() and rs_start() that uses the XOFF
71 * register to start/stop transmission.
72 * change_speed() also initilises XOFF register correctly so that
73 * auto_xoff is enabled when IXON flag is set by user.
74 * This gives fast XOFF response times.
76 * Revision 1.41 2002/11/04 18:40:57 johana
77 * Implemented rs_stop() and rs_start().
78 * Simple tests using hwtestserial indicates that this should be enough
81 * Revision 1.40 2002/10/14 05:33:18 starvik
82 * RS-485 uses fast timers even if SERIAL_FAST_TIMER is disabled
84 * Revision 1.39 2002/09/30 21:00:57 johana
85 * Support for CONFIG_ETRAX_SERx_DTR_RI_DSR_CD_MIXED where the status and
86 * control pins can be mixed between PA and PB.
87 * If no serial port uses MIXED old solution is used
88 * (saves a few bytes and cycles).
89 * control_pins struct uses masks instead of bit numbers.
90 * Corrected dummy values and polarity in line_info() so
91 * /proc/tty/driver/serial is now correct.
92 * (the E100_xxx_GET() macros is really active low - perhaps not obvious)
94 * Revision 1.38 2002/08/23 11:01:36 starvik
95 * Check that serial port is enabled in all interrupt handlers to avoid
96 * restarts of DMA channels not assigned to serial ports
98 * Revision 1.37 2002/08/13 13:02:37 bjornw
99 * Removed some warnings because of unused code
101 * Revision 1.36 2002/08/08 12:50:01 starvik
102 * Serial interrupt is shared with synchronous serial port driver
104 * Revision 1.35 2002/06/03 10:40:49 starvik
105 * Increased RS-485 RTS toggle timer to 2 characters
107 * Revision 1.34 2002/05/28 18:59:36 johana
108 * Whitespace and comment fixing to be more like etrax100ser.c 1.71.
110 * Revision 1.33 2002/05/28 17:55:43 johana
111 * RS-485 uses FAST_TIMER if enabled, and starts a short (one char time)
112 * timer from tranismit_chars (interrupt context).
113 * The timer toggles RTS in interrupt context when expired giving minimum
116 * Revision 1.32 2002/05/22 13:58:00 johana
117 * Renamed rs_write() to raw_write() and made it inline.
118 * New rs_write() handles RS-485 if configured and enabled
119 * (moved code from e100_write_rs485()).
120 * RS-485 ioctl's uses copy_from_user() instead of verify_area().
122 * Revision 1.31 2002/04/22 11:20:03 johana
123 * Updated copyright years.
125 * Revision 1.30 2002/04/22 09:39:12 johana
126 * RS-485 support compiles.
128 * Revision 1.29 2002/01/14 16:10:01 pkj
129 * Allocate the receive buffers dynamically. The static 4kB buffer was
130 * too small for the peaks. This means that we can get rid of the extra
131 * buffer and the copying to it. It also means we require less memory
132 * under normal operations, but can use more when needed (there is a
133 * cap at 64kB for safety reasons). If there is no memory available
134 * we panic(), and die a horrible death...
136 * Revision 1.28 2001/12/18 15:04:53 johana
137 * Cleaned up write_rs485() - now it works correctly without padding extra
139 * Added sane default initialisation of rs485.
140 * Added #ifdef around dummy variables.
142 * Revision 1.27 2001/11/29 17:00:41 pkj
143 * 2kB seems to be too small a buffer when using 921600 bps,
144 * so increase it to 4kB (this was already done for the elinux
145 * version of the serial driver).
147 * Revision 1.26 2001/11/19 14:20:41 pkj
148 * Minor changes to comments and unused code.
150 * Revision 1.25 2001/11/12 20:03:43 pkj
151 * Fixed compiler warnings.
153 * Revision 1.24 2001/11/12 15:10:05 pkj
154 * Total redesign of the receiving part of the serial driver.
155 * Uses eight chained descriptors to write to a 4kB buffer.
156 * This data is then serialised into a 2kB buffer. From there it
157 * is copied into the TTY's flip buffers when they become available.
158 * A lot of copying, and the sizes of the buffers might need to be
159 * tweaked, but all in all it should work better than the previous
160 * version, without the need to modify the TTY code in any way.
161 * Also note that erroneous bytes are now correctly marked in the
162 * flag buffers (instead of always marking the first byte).
164 * Revision 1.23 2001/10/30 17:53:26 pkj
165 * * Set info->uses_dma to 0 when a port is closed.
166 * * Mark the timer1 interrupt as a fast one (SA_INTERRUPT).
167 * * Call start_flush_timer() in start_receive() if
168 * CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST is defined.
170 * Revision 1.22 2001/10/30 17:44:03 pkj
171 * Use %lu for received and transmitted counters in line_info().
173 * Revision 1.21 2001/10/30 17:40:34 pkj
174 * Clean-up. The only change to functionality is that
175 * CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS(=5) is used instead of
176 * MAX_FLUSH_TIME(=8).
178 * Revision 1.20 2001/10/30 15:24:49 johana
179 * Added char_time stuff from 2.0 driver.
181 * Revision 1.19 2001/10/30 15:23:03 johana
182 * Merged with 1.13.2 branch + fixed indentation
183 * and changed CONFIG_ETRAX100_XYS to CONFIG_ETRAX_XYZ
185 * Revision 1.18 2001/09/24 09:27:22 pkj
186 * Completed ext_baud_table[] in cflag_to_baud() and cflag_to_etrax_baud().
188 * Revision 1.17 2001/08/24 11:32:49 ronny
189 * More fixes for the CONFIG_ETRAX_SERIAL_PORT0 define.
191 * Revision 1.16 2001/08/24 07:56:22 ronny
192 * Added config ifdefs around ser0 irq requests.
194 * Revision 1.15 2001/08/16 09:10:31 bjarne
195 * serial.c - corrected the initialization of rs_table, the wrong defines
197 * Corrected a test in timed_flush_handler.
198 * Changed configured to enabled.
199 * serial.h - Changed configured to enabled.
201 * Revision 1.14 2001/08/15 07:31:23 bjarne
202 * Introduced two new members to the e100_serial struct.
203 * configured - Will be set to 1 if the port has been configured in .config
204 * uses_dma - Should be set to 1 if the port uses DMA. Currently it is set
206 * when a port is opened. This is used to limit the DMA interrupt
207 * routines to only manipulate DMA channels actually used by the
210 * Revision 1.13.2.2 2001/10/17 13:57:13 starvik
211 * Receiver was broken by the break fixes
213 * Revision 1.13.2.1 2001/07/20 13:57:39 ronny
214 * Merge with new stuff from etrax100ser.c. Works but haven't checked stuff
215 * like break handling.
217 * Revision 1.13 2001/05/09 12:40:31 johana
218 * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h
220 * Revision 1.12 2001/04/19 12:23:07 bjornw
221 * CONFIG_RS485 -> CONFIG_ETRAX_RS485
223 * Revision 1.11 2001/04/05 14:29:48 markusl
224 * Updated according to review remarks i.e.
225 * -Use correct types in port structure to avoid compiler warnings
226 * -Try to use IO_* macros whenever possible
227 * -Open should never return -EBUSY
229 * Revision 1.10 2001/03/05 13:14:07 bjornw
230 * Another spelling fix
232 * Revision 1.9 2001/02/23 13:46:38 bjornw
235 * Revision 1.8 2001/01/23 14:56:35 markusl
236 * Made use of ser1 optional
239 * Revision 1.7 2001/01/19 16:14:48 perf
240 * Added kernel options for serial ports 234.
241 * Changed option names from CONFIG_ETRAX100_XYZ to CONFIG_ETRAX_XYZ.
243 * Revision 1.6 2000/11/22 16:36:09 bjornw
244 * Please marketing by using the correct case when spelling Etrax.
246 * Revision 1.5 2000/11/21 16:43:37 bjornw
247 * Fixed so it compiles under CONFIG_SVINTO_SIM
249 * Revision 1.4 2000/11/15 17:34:12 bjornw
250 * Added a timeout timer for flushing input channels. The interrupt-based
251 * fast flush system should be easy to merge with this later (works the same
252 * way, only with an irq instead of a system timer_list)
254 * Revision 1.3 2000/11/13 17:19:57 bjornw
255 * * Incredibly, this almost complete rewrite of serial.c worked (at least
256 * for output) the first time.
258 * Items worth noticing:
260 * No Etrax100 port 1 workarounds (does only compile on 2.4 anyway now)
261 * RS485 is not ported (why can't it be done in userspace as on x86 ?)
262 * Statistics done through async_icount - if any more stats are needed,
263 * that's the place to put them or in an arch-dep version of it.
264 * timeout_interrupt and the other fast timeout stuff not ported yet
265 * There be dragons in this 3k+ line driver
267 * Revision 1.2 2000/11/10 16:50:28 bjornw
268 * First shot at a 2.4 port, does not compile totally yet
270 * Revision 1.1 2000/11/10 16:47:32 bjornw
271 * Added verbatim copy of rev 1.49 etrax100ser.c from elinux
273 * Revision 1.49 2000/10/30 15:47:14 tobiasa
274 * Changed version number.
276 * Revision 1.48 2000/10/25 11:02:43 johana
277 * Changed %ul to %lu in printf's
279 * Revision 1.47 2000/10/18 15:06:53 pkj
280 * Compile correctly with CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST and
281 * CONFIG_ETRAX_SERIAL_PROC_ENTRY together.
282 * Some clean-up of the /proc/serial file.
284 * Revision 1.46 2000/10/16 12:59:40 johana
285 * Added CONFIG_ETRAX_SERIAL_PROC_ENTRY for statistics and debug info.
287 * Revision 1.45 2000/10/13 17:10:59 pkj
288 * Do not flush DMAs while flipping TTY buffers.
290 * Revision 1.44 2000/10/13 16:34:29 pkj
291 * Added a delay in ser_interrupt() for 2.3ms when an error is detected.
292 * We do not know why this delay is required yet, but without it the
293 * irmaflash program does not work (this was the program that needed
294 * the ser_interrupt() to be needed in the first place). This should not
295 * affect normal use of the serial ports.
297 * Revision 1.43 2000/10/13 16:30:44 pkj
298 * New version of the fast flush of serial buffers code. This time
299 * it is localized to the serial driver and uses a fast timer to
302 * Revision 1.42 2000/10/13 14:54:26 bennyo
303 * Fix for switching RTS when using rs485
305 * Revision 1.41 2000/10/12 11:43:44 pkj
306 * Cleaned up a number of comments.
308 * Revision 1.40 2000/10/10 11:58:39 johana
309 * Made RS485 support generic for all ports.
310 * Toggle rts in interrupt if no delay wanted.
311 * WARNING: No true transmitter empty check??
312 * Set d_wait bit when sending data so interrupt is delayed until
313 * fifo flushed. (Fix tcdrain() problem)
315 * Revision 1.39 2000/10/04 16:08:02 bjornw
316 * * Use virt_to_phys etc. for DMA addresses
317 * * Removed CONFIG_FLUSH_DMA_FAST hacks
320 * Revision 1.38 2000/10/02 12:27:10 mattias
321 * * added variable used when using fast flush on serial dma.
322 * (CONFIG_FLUSH_DMA_FAST)
324 * Revision 1.37 2000/09/27 09:44:24 pkj
325 * Uncomment definition of SERIAL_HANDLE_EARLY_ERRORS.
327 * Revision 1.36 2000/09/20 13:12:52 johana
328 * Support for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS:
329 * Number of timer ticks between flush of receive fifo (1 tick = 10ms).
330 * Try 0-3 for low latency applications. Approx 5 for high load
331 * applications (e.g. PPP). Maybe this should be more adaptive some day...
333 * Revision 1.35 2000/09/20 10:36:08 johana
334 * Typo in get_lsr_info()
336 * Revision 1.34 2000/09/20 10:29:59 johana
337 * Let rs_chars_in_buffer() check fifo content as well.
338 * get_lsr_info() might work now (not tested).
339 * Easier to change the port to debug.
341 * Revision 1.33 2000/09/13 07:52:11 torbjore
344 * Revision 1.32 2000/08/31 14:45:37 bjornw
345 * After sending a break we need to reset the transmit DMA channel
347 * Revision 1.31 2000/06/21 12:13:29 johana
348 * Fixed wait for all chars sent when closing port.
349 * (Used to always take 1 second!)
350 * Added shadows for directions of status/ctrl signals.
352 * Revision 1.30 2000/05/29 16:27:55 bjornw
353 * Simulator ifdef moved a bit
355 * Revision 1.29 2000/05/09 09:40:30 mattias
356 * * Added description of dma registers used in timeout_interrupt
359 * Revision 1.28 2000/05/08 16:38:58 mattias
360 * * Bugfix for flushing fifo in timeout_interrupt
361 * Problem occurs when bluetooth stack waits for a small number of bytes
362 * containing an event acknowledging free buffers in bluetooth HW
363 * As before, data was stuck in fifo until more data came on uart and
364 * flushed it up to the stack.
366 * Revision 1.27 2000/05/02 09:52:28 jonasd
367 * Added fix for peculiar etrax behaviour when eop is forced on an empty
368 * fifo. This is used when flashing the IRMA chip. Disabled by default.
370 * Revision 1.26 2000/03/29 15:32:02 bjornw
373 * Revision 1.25 2000/02/16 16:59:36 bjornw
374 * * Receive DMA directly into the flip-buffer, eliminating an intermediary
375 * receive buffer and a memcpy. Will avoid some overruns.
376 * * Error message on debug port if an overrun or flip buffer overrun occurs.
377 * * Just use the first byte in the flag flip buffer for errors.
378 * * Check for timeout on the serial ports only each 5/100 s, not 1/100.
380 * Revision 1.24 2000/02/09 18:02:28 bjornw
381 * * Clear serial errors (overrun, framing, parity) correctly. Before, the
382 * receiver would get stuck if an error occurred and we did not restart
384 * * Cosmetics (indentation, some code made into inlines)
385 * * Some more debug options
386 * * Actually shut down the serial port (DMA irq, DMA reset, receiver stop)
387 * when the last open is closed. Corresponding fixes in startup().
388 * * rs_close() "tx FIFO wait" code moved into right place, bug & -> && fixed
389 * and make a special case out of port 1 (R_DMA_CHx_STATUS is broken for that)
390 * * e100_disable_rx/enable_rx just disables/enables the receiver, not RTS
392 * Revision 1.23 2000/01/24 17:46:19 johana
393 * Wait for flush of DMA/FIFO when closing port.
395 * Revision 1.22 2000/01/20 18:10:23 johana
396 * Added TIOCMGET ioctl to return modem status.
397 * Implemented modem status/control that works with the extra signals
398 * (DTR, DSR, RI,CD) as well.
399 * 3 different modes supported:
400 * ser0 on PB (Bundy), ser1 on PB (Lisa) and ser2 on PA (Bundy)
401 * Fixed DEF_TX value that caused the serial transmitter pin (txd) to go to 0 when
402 * closing the last filehandle, NASTY!.
403 * Added break generation, not tested though!
404 * Use SA_SHIRQ when request_irq() for ser2 and ser3 (shared with) par0 and par1.
405 * You can't use them at the same time (yet..), but you can hopefully switch
406 * between ser2/par0, ser3/par1 with the same kernel config.
407 * Replaced some magic constants with defines
412 static char *serial_version = "$Revision: 1.20 $";
414 #include <linux/config.h>
415 #include <linux/version.h>
417 #include <linux/types.h>
418 #include <linux/errno.h>
419 #include <linux/signal.h>
420 #include <linux/sched.h>
421 #include <linux/timer.h>
422 #include <linux/interrupt.h>
423 #include <linux/tty.h>
424 #include <linux/tty_flip.h>
425 #include <linux/major.h>
426 #include <linux/string.h>
427 #include <linux/fcntl.h>
428 #include <linux/mm.h>
429 #include <linux/slab.h>
430 #include <linux/init.h>
431 #include <asm/uaccess.h>
432 #include <linux/kernel.h>
436 #include <asm/system.h>
437 #include <asm/segment.h>
438 #include <asm/bitops.h>
439 #include <linux/delay.h>
441 #include <asm/arch/svinto.h>
443 /* non-arch dependent serial structures are in linux/serial.h */
444 #include <linux/serial.h>
445 /* while we keep our own stuff (struct e100_serial) in a local .h file */
447 #include <asm/fasttimer.h>
449 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
450 #ifndef CONFIG_ETRAX_FAST_TIMER
451 #error "Enable FAST_TIMER to use SERIAL_FAST_TIMER"
455 #if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \
456 (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0)
457 #error "RX_TIMEOUT_TICKS == 0 not allowed, use 1"
460 #if defined(CONFIG_ETRAX_RS485_ON_PA) && defined(CONFIG_ETRAX_RS485_ON_PORT_G)
461 #error "Disable either CONFIG_ETRAX_RS485_ON_PA or CONFIG_ETRAX_RS485_ON_PORT_G"
465 * All of the compatibilty code so we can compile serial.c against
466 * older kernels is hidden in serial_compat.h
468 #if defined(LOCAL_HEADERS)
469 #include "serial_compat.h"
472 #define _INLINE_ inline
474 struct tty_driver *serial_driver;
476 /* serial subtype definitions */
477 #ifndef SERIAL_TYPE_NORMAL
478 #define SERIAL_TYPE_NORMAL 1
481 /* number of characters left in xmit buffer before we ask for more */
482 #define WAKEUP_CHARS 256
484 //#define SERIAL_DEBUG_INTR
485 //#define SERIAL_DEBUG_OPEN
486 //#define SERIAL_DEBUG_FLOW
487 //#define SERIAL_DEBUG_DATA
488 //#define SERIAL_DEBUG_THROTTLE
489 //#define SERIAL_DEBUG_IO /* Debug for Extra control and status pins */
490 //#define SERIAL_DEBUG_LINE 0 /* What serport we want to debug */
492 /* Enable this to use serial interrupts to handle when you
493 expect the first received event on the serial port to
494 be an error, break or similar. Used to be able to flash IRMA
496 #define SERIAL_HANDLE_EARLY_ERRORS
498 /* Defined and used in n_tty.c, but we need it here as well */
499 #define TTY_THRESHOLD_THROTTLE 128
501 /* Due to buffersizes and threshold values, our SERIAL_DESCR_BUF_SIZE
502 * must not be to high or flow control won't work if we leave it to the tty
503 * layer so we have our own throttling in flush_to_flip
504 * TTY_FLIPBUF_SIZE=512,
505 * TTY_THRESHOLD_THROTTLE/UNTHROTTLE=128
506 * BUF_SIZE can't be > 128
508 /* Currently 16 descriptors x 128 bytes = 2048 bytes */
509 #define SERIAL_DESCR_BUF_SIZE 256
511 #define SERIAL_PRESCALE_BASE 3125000 /* 3.125MHz */
512 #define DEF_BAUD_BASE SERIAL_PRESCALE_BASE
514 /* We don't want to load the system with massive fast timer interrupt
515 * on high baudrates so limit it to 250 us (4kHz) */
516 #define MIN_FLUSH_TIME_USEC 250
518 /* Add an x here to log a lot of timer stuff */
520 /* Debug details of interrupt handling */
521 #define DINTR1(x) /* irq on/off, errors */
522 #define DINTR2(x) /* tx and rx */
523 /* Debug flip buffer stuff */
525 /* Debug flow control and overview of data flow */
528 #define DLOG_INT_TRIG(x)
530 //#define DEBUG_LOG_INCLUDED
531 #ifndef DEBUG_LOG_INCLUDED
532 #define DEBUG_LOG(line, string, value)
534 struct debug_log_info
537 unsigned long timer_data;
542 #define DEBUG_LOG_SIZE 4096
544 struct debug_log_info debug_log[DEBUG_LOG_SIZE];
545 int debug_log_pos = 0;
547 #define DEBUG_LOG(_line, _string, _value) do { \
548 if ((_line) == SERIAL_DEBUG_LINE) {\
549 debug_log_func(_line, _string, _value); \
553 void debug_log_func(int line, const char *string, int value)
555 if (debug_log_pos < DEBUG_LOG_SIZE) {
556 debug_log[debug_log_pos].time = jiffies;
557 debug_log[debug_log_pos].timer_data = *R_TIMER_DATA;
558 // debug_log[debug_log_pos].line = line;
559 debug_log[debug_log_pos].string = string;
560 debug_log[debug_log_pos].value = value;
563 /*printk(string, value);*/
567 #ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
568 /* Default number of timer ticks before flushing rx fifo
569 * When using "little data, low latency applications: use 0
570 * When using "much data applications (PPP)" use ~5
572 #define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5
575 unsigned long timer_data_to_ns(unsigned long timer_data);
577 static void change_speed(struct e100_serial *info);
578 static void rs_throttle(struct tty_struct * tty);
579 static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
580 static int rs_write(struct tty_struct * tty, int from_user,
581 const unsigned char *buf, int count);
582 extern _INLINE_ int rs_raw_write(struct tty_struct * tty, int from_user,
583 const unsigned char *buf, int count);
584 #ifdef CONFIG_ETRAX_RS485
585 static int e100_write_rs485(struct tty_struct * tty, int from_user,
586 const unsigned char *buf, int count);
588 static int get_lsr_info(struct e100_serial * info, unsigned int *value);
591 #define DEF_BAUD 115200 /* 115.2 kbit/s */
592 #define STD_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
593 #define DEF_RX 0x20 /* or SERIAL_CTRL_W >> 8 */
594 /* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */
595 #define DEF_TX 0x80 /* or SERIAL_CTRL_B */
597 /* offsets from R_SERIALx_CTRL */
600 #define REG_DATA_STATUS32 0 /* this is the 32 bit register R_SERIALx_READ */
601 #define REG_TR_DATA 0
603 #define REG_TR_CTRL 1
604 #define REG_REC_CTRL 2
606 #define REG_XOFF 4 /* this is a 32 bit register */
608 /* The bitfields are the same for all serial ports */
609 #define SER_RXD_MASK IO_MASK(R_SERIAL0_STATUS, rxd)
610 #define SER_DATA_AVAIL_MASK IO_MASK(R_SERIAL0_STATUS, data_avail)
611 #define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err)
612 #define SER_PAR_ERR_MASK IO_MASK(R_SERIAL0_STATUS, par_err)
613 #define SER_OVERRUN_MASK IO_MASK(R_SERIAL0_STATUS, overrun)
615 #define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK)
617 /* Values for info->errorcode */
618 #define ERRCODE_SET_BREAK (TTY_BREAK)
619 #define ERRCODE_INSERT 0x100
620 #define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK)
622 #define FORCE_EOP(info) *R_SET_EOP = 1U << info->iseteop;
625 * General note regarding the use of IO_* macros in this file:
627 * We will use the bits defined for DMA channel 6 when using various
628 * IO_* macros (e.g. IO_STATE, IO_MASK, IO_EXTRACT) and _assume_ they are
629 * the same for all channels (which of course they are).
631 * We will also use the bits defined for serial port 0 when writing commands
632 * to the different ports, as these bits too are the same for all ports.
636 /* Mask for the irqs possibly enabled in R_IRQ_MASK1_RD etc. */
637 static const unsigned long e100_ser_int_mask = 0
638 #ifdef CONFIG_ETRAX_SERIAL_PORT0
639 | IO_MASK(R_IRQ_MASK1_RD, ser0_data) | IO_MASK(R_IRQ_MASK1_RD, ser0_ready)
641 #ifdef CONFIG_ETRAX_SERIAL_PORT1
642 | IO_MASK(R_IRQ_MASK1_RD, ser1_data) | IO_MASK(R_IRQ_MASK1_RD, ser1_ready)
644 #ifdef CONFIG_ETRAX_SERIAL_PORT2
645 | IO_MASK(R_IRQ_MASK1_RD, ser2_data) | IO_MASK(R_IRQ_MASK1_RD, ser2_ready)
647 #ifdef CONFIG_ETRAX_SERIAL_PORT3
648 | IO_MASK(R_IRQ_MASK1_RD, ser3_data) | IO_MASK(R_IRQ_MASK1_RD, ser3_ready)
651 unsigned long r_alt_ser_baudrate_shadow = 0;
653 /* this is the data for the four serial ports in the etrax100 */
654 /* DMA2(ser2), DMA4(ser3), DMA6(ser0) or DMA8(ser1) */
655 /* R_DMA_CHx_CLR_INTR, R_DMA_CHx_FIRST, R_DMA_CHx_CMD */
657 static struct e100_serial rs_table[] = {
659 .port = (unsigned char *)R_SERIAL0_CTRL,
660 .irq = 1U << 12, /* uses DMA 6 and 7 */
661 .oclrintradr = R_DMA_CH6_CLR_INTR,
662 .ofirstadr = R_DMA_CH6_FIRST,
663 .ocmdadr = R_DMA_CH6_CMD,
664 .ostatusadr = R_DMA_CH6_STATUS,
665 .iclrintradr = R_DMA_CH7_CLR_INTR,
666 .ifirstadr = R_DMA_CH7_FIRST,
667 .icmdadr = R_DMA_CH7_CMD,
668 .idescradr = R_DMA_CH7_DESCR,
673 #ifdef CONFIG_ETRAX_SERIAL_PORT0
675 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
676 .dma_out_enabled = 1,
678 .dma_out_enabled = 0,
680 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
687 .dma_out_enabled = 0,
692 #ifndef CONFIG_SVINTO_SIM
694 .port = (unsigned char *)R_SERIAL1_CTRL,
695 .irq = 1U << 16, /* uses DMA 8 and 9 */
696 .oclrintradr = R_DMA_CH8_CLR_INTR,
697 .ofirstadr = R_DMA_CH8_FIRST,
698 .ocmdadr = R_DMA_CH8_CMD,
699 .ostatusadr = R_DMA_CH8_STATUS,
700 .iclrintradr = R_DMA_CH9_CLR_INTR,
701 .ifirstadr = R_DMA_CH9_FIRST,
702 .icmdadr = R_DMA_CH9_CMD,
703 .idescradr = R_DMA_CH9_DESCR,
708 #ifdef CONFIG_ETRAX_SERIAL_PORT1
710 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
711 .dma_out_enabled = 1,
713 .dma_out_enabled = 0,
715 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
722 .dma_out_enabled = 0,
728 .port = (unsigned char *)R_SERIAL2_CTRL,
729 .irq = 1U << 4, /* uses DMA 2 and 3 */
730 .oclrintradr = R_DMA_CH2_CLR_INTR,
731 .ofirstadr = R_DMA_CH2_FIRST,
732 .ocmdadr = R_DMA_CH2_CMD,
733 .ostatusadr = R_DMA_CH2_STATUS,
734 .iclrintradr = R_DMA_CH3_CLR_INTR,
735 .ifirstadr = R_DMA_CH3_FIRST,
736 .icmdadr = R_DMA_CH3_CMD,
737 .idescradr = R_DMA_CH3_DESCR,
742 #ifdef CONFIG_ETRAX_SERIAL_PORT2
744 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
745 .dma_out_enabled = 1,
747 .dma_out_enabled = 0,
749 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
756 .dma_out_enabled = 0,
762 .port = (unsigned char *)R_SERIAL3_CTRL,
763 .irq = 1U << 8, /* uses DMA 4 and 5 */
764 .oclrintradr = R_DMA_CH4_CLR_INTR,
765 .ofirstadr = R_DMA_CH4_FIRST,
766 .ocmdadr = R_DMA_CH4_CMD,
767 .ostatusadr = R_DMA_CH4_STATUS,
768 .iclrintradr = R_DMA_CH5_CLR_INTR,
769 .ifirstadr = R_DMA_CH5_FIRST,
770 .icmdadr = R_DMA_CH5_CMD,
771 .idescradr = R_DMA_CH5_DESCR,
776 #ifdef CONFIG_ETRAX_SERIAL_PORT3
778 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
779 .dma_out_enabled = 1,
781 .dma_out_enabled = 0,
783 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
790 .dma_out_enabled = 0,
798 #define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial))
800 static struct termios *serial_termios[NR_PORTS];
801 static struct termios *serial_termios_locked[NR_PORTS];
802 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
803 static struct fast_timer fast_timers[NR_PORTS];
806 #ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY
807 #define PROCSTAT(x) x
808 struct ser_statistics_type {
810 int early_errors_cnt;
813 unsigned long int processing_flip;
814 unsigned long processing_flip_still_room;
815 unsigned long int timeout_flush_cnt;
822 static struct ser_statistics_type ser_stat[NR_PORTS];
828 #endif /* CONFIG_ETRAX_SERIAL_PROC_ENTRY */
831 #if defined(CONFIG_ETRAX_RS485)
832 #ifdef CONFIG_ETRAX_FAST_TIMER
833 static struct fast_timer fast_timers_rs485[NR_PORTS];
835 #if defined(CONFIG_ETRAX_RS485_ON_PA)
836 static int rs485_pa_bit = CONFIG_ETRAX_RS485_ON_PA_BIT;
838 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
839 static int rs485_port_g_bit = CONFIG_ETRAX_RS485_ON_PORT_G_BIT;
843 /* Info and macros needed for each ports extra control/status signals. */
844 #define E100_STRUCT_PORT(line, pinname) \
845 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
846 (R_PORT_PA_DATA): ( \
847 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
848 (R_PORT_PB_DATA):&dummy_ser[line]))
850 #define E100_STRUCT_SHADOW(line, pinname) \
851 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
852 (&port_pa_data_shadow): ( \
853 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
854 (&port_pb_data_shadow):&dummy_ser[line]))
855 #define E100_STRUCT_MASK(line, pinname) \
856 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
857 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \
858 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
859 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK))
861 #define DUMMY_DTR_MASK 1
862 #define DUMMY_RI_MASK 2
863 #define DUMMY_DSR_MASK 4
864 #define DUMMY_CD_MASK 8
865 static unsigned char dummy_ser[NR_PORTS] = {0xFF, 0xFF, 0xFF,0xFF};
867 /* If not all status pins are used or disabled, use mixed mode */
868 #ifdef CONFIG_ETRAX_SERIAL_PORT0
870 #define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT)
872 #if SER0_PA_BITSUM != -4
873 # if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1
874 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
875 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
878 # if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1
879 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
880 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
883 # if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1
884 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
885 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
888 # if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1
889 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
890 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
895 #define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT)
897 #if SER0_PB_BITSUM != -4
898 # if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1
899 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
900 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
903 # if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1
904 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
905 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
908 # if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1
909 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
910 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
913 # if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1
914 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
915 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
923 #ifdef CONFIG_ETRAX_SERIAL_PORT1
925 #define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT)
927 #if SER1_PA_BITSUM != -4
928 # if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1
929 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
930 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
933 # if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1
934 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
935 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
938 # if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1
939 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
940 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
943 # if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1
944 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
945 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
950 #define SER1_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT)
952 #if SER1_PB_BITSUM != -4
953 # if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1
954 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
955 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
958 # if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1
959 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
960 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
963 # if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1
964 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
965 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
968 # if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1
969 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
970 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
977 #ifdef CONFIG_ETRAX_SERIAL_PORT2
979 #define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT)
981 #if SER2_PA_BITSUM != -4
982 # if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1
983 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
984 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
987 # if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1
988 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
989 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
992 # if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1
993 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
994 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
997 # if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1
998 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
999 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1004 #define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT)
1006 #if SER2_PB_BITSUM != -4
1007 # if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1
1008 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1009 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1012 # if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1
1013 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1014 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1017 # if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1
1018 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1019 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1022 # if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1
1023 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1024 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1031 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1033 #define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT)
1035 #if SER3_PA_BITSUM != -4
1036 # if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1
1037 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1038 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1041 # if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1
1042 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1043 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1046 # if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1
1047 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1048 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1051 # if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1
1052 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1053 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1058 #define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT)
1060 #if SER3_PB_BITSUM != -4
1061 # if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1
1062 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1063 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1066 # if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1
1067 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1068 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1071 # if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1
1072 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1073 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1076 # if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1
1077 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1078 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1086 #if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \
1087 defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \
1088 defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \
1089 defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED)
1090 #define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
1093 #ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
1094 /* The pins can be mixed on PA and PB */
1095 #define CONTROL_PINS_PORT_NOT_USED(line) \
1096 &dummy_ser[line], &dummy_ser[line], \
1097 &dummy_ser[line], &dummy_ser[line], \
1098 &dummy_ser[line], &dummy_ser[line], \
1099 &dummy_ser[line], &dummy_ser[line], \
1100 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1105 volatile unsigned char *dtr_port;
1106 unsigned char *dtr_shadow;
1107 volatile unsigned char *ri_port;
1108 unsigned char *ri_shadow;
1109 volatile unsigned char *dsr_port;
1110 unsigned char *dsr_shadow;
1111 volatile unsigned char *cd_port;
1112 unsigned char *cd_shadow;
1114 unsigned char dtr_mask;
1115 unsigned char ri_mask;
1116 unsigned char dsr_mask;
1117 unsigned char cd_mask;
1120 static const struct control_pins e100_modem_pins[NR_PORTS] =
1124 #ifdef CONFIG_ETRAX_SERIAL_PORT0
1125 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
1126 E100_STRUCT_PORT(0,RI), E100_STRUCT_SHADOW(0,RI),
1127 E100_STRUCT_PORT(0,DSR), E100_STRUCT_SHADOW(0,DSR),
1128 E100_STRUCT_PORT(0,CD), E100_STRUCT_SHADOW(0,CD),
1129 E100_STRUCT_MASK(0,DTR),
1130 E100_STRUCT_MASK(0,RI),
1131 E100_STRUCT_MASK(0,DSR),
1132 E100_STRUCT_MASK(0,CD)
1134 CONTROL_PINS_PORT_NOT_USED(0)
1140 #ifdef CONFIG_ETRAX_SERIAL_PORT1
1141 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
1142 E100_STRUCT_PORT(1,RI), E100_STRUCT_SHADOW(1,RI),
1143 E100_STRUCT_PORT(1,DSR), E100_STRUCT_SHADOW(1,DSR),
1144 E100_STRUCT_PORT(1,CD), E100_STRUCT_SHADOW(1,CD),
1145 E100_STRUCT_MASK(1,DTR),
1146 E100_STRUCT_MASK(1,RI),
1147 E100_STRUCT_MASK(1,DSR),
1148 E100_STRUCT_MASK(1,CD)
1150 CONTROL_PINS_PORT_NOT_USED(1)
1156 #ifdef CONFIG_ETRAX_SERIAL_PORT2
1157 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
1158 E100_STRUCT_PORT(2,RI), E100_STRUCT_SHADOW(2,RI),
1159 E100_STRUCT_PORT(2,DSR), E100_STRUCT_SHADOW(2,DSR),
1160 E100_STRUCT_PORT(2,CD), E100_STRUCT_SHADOW(2,CD),
1161 E100_STRUCT_MASK(2,DTR),
1162 E100_STRUCT_MASK(2,RI),
1163 E100_STRUCT_MASK(2,DSR),
1164 E100_STRUCT_MASK(2,CD)
1166 CONTROL_PINS_PORT_NOT_USED(2)
1172 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1173 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
1174 E100_STRUCT_PORT(3,RI), E100_STRUCT_SHADOW(3,RI),
1175 E100_STRUCT_PORT(3,DSR), E100_STRUCT_SHADOW(3,DSR),
1176 E100_STRUCT_PORT(3,CD), E100_STRUCT_SHADOW(3,CD),
1177 E100_STRUCT_MASK(3,DTR),
1178 E100_STRUCT_MASK(3,RI),
1179 E100_STRUCT_MASK(3,DSR),
1180 E100_STRUCT_MASK(3,CD)
1182 CONTROL_PINS_PORT_NOT_USED(3)
1186 #else /* CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1188 /* All pins are on either PA or PB for each serial port */
1189 #define CONTROL_PINS_PORT_NOT_USED(line) \
1190 &dummy_ser[line], &dummy_ser[line], \
1191 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1196 volatile unsigned char *port;
1197 unsigned char *shadow;
1199 unsigned char dtr_mask;
1200 unsigned char ri_mask;
1201 unsigned char dsr_mask;
1202 unsigned char cd_mask;
1205 #define dtr_port port
1206 #define dtr_shadow shadow
1207 #define ri_port port
1208 #define ri_shadow shadow
1209 #define dsr_port port
1210 #define dsr_shadow shadow
1211 #define cd_port port
1212 #define cd_shadow shadow
1214 static const struct control_pins e100_modem_pins[NR_PORTS] =
1218 #ifdef CONFIG_ETRAX_SERIAL_PORT0
1219 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
1220 E100_STRUCT_MASK(0,DTR),
1221 E100_STRUCT_MASK(0,RI),
1222 E100_STRUCT_MASK(0,DSR),
1223 E100_STRUCT_MASK(0,CD)
1225 CONTROL_PINS_PORT_NOT_USED(0)
1231 #ifdef CONFIG_ETRAX_SERIAL_PORT1
1232 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
1233 E100_STRUCT_MASK(1,DTR),
1234 E100_STRUCT_MASK(1,RI),
1235 E100_STRUCT_MASK(1,DSR),
1236 E100_STRUCT_MASK(1,CD)
1238 CONTROL_PINS_PORT_NOT_USED(1)
1244 #ifdef CONFIG_ETRAX_SERIAL_PORT2
1245 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
1246 E100_STRUCT_MASK(2,DTR),
1247 E100_STRUCT_MASK(2,RI),
1248 E100_STRUCT_MASK(2,DSR),
1249 E100_STRUCT_MASK(2,CD)
1251 CONTROL_PINS_PORT_NOT_USED(2)
1257 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1258 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
1259 E100_STRUCT_MASK(3,DTR),
1260 E100_STRUCT_MASK(3,RI),
1261 E100_STRUCT_MASK(3,DSR),
1262 E100_STRUCT_MASK(3,CD)
1264 CONTROL_PINS_PORT_NOT_USED(3)
1268 #endif /* !CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1270 #define E100_RTS_MASK 0x20
1271 #define E100_CTS_MASK 0x40
1273 /* All serial port signals are active low:
1274 * active = 0 -> 3.3V to RS-232 driver -> -12V on RS-232 level
1275 * inactive = 1 -> 0V to RS-232 driver -> +12V on RS-232 level
1277 * These macros returns the pin value: 0=0V, >=1 = 3.3V on ETRAX chip
1281 #define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK)
1283 #define E100_CTS_GET(info) ((info)->port[REG_STATUS] & E100_CTS_MASK)
1285 /* These are typically PA or PB and 0 means 0V, 1 means 3.3V */
1287 #define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask)
1289 /* Normally inputs */
1290 #define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask)
1291 #define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask)
1294 #define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask)
1298 * tmp_buf is used as a temporary buffer by serial_write. We need to
1299 * lock it in case the memcpy_fromfs blocks while swapping in a page,
1300 * and some other program tries to do a serial write at the same time.
1301 * Since the lock will only come under contention when the system is
1302 * swapping and available memory is low, it makes sense to share one
1303 * buffer across all the serial ports, since it significantly saves
1304 * memory if large numbers of serial ports are open.
1306 static unsigned char *tmp_buf;
1307 #ifdef DECLARE_MUTEX
1308 static DECLARE_MUTEX(tmp_buf_sem);
1310 static struct semaphore tmp_buf_sem = MUTEX;
1313 /* Calculate the chartime depending on baudrate, numbor of bits etc. */
1314 static void update_char_time(struct e100_serial * info)
1316 tcflag_t cflags = info->tty->termios->c_cflag;
1319 /* calc. number of bits / data byte */
1320 /* databits + startbit and 1 stopbit */
1321 if ((cflags & CSIZE) == CS7)
1326 if (cflags & CSTOPB) /* 2 stopbits ? */
1329 if (cflags & PARENB) /* parity bit ? */
1333 info->char_time_usec = ((bits * 1000000) / info->baud) + 1;
1334 info->flush_time_usec = 4*info->char_time_usec;
1335 if (info->flush_time_usec < MIN_FLUSH_TIME_USEC)
1336 info->flush_time_usec = MIN_FLUSH_TIME_USEC;
1341 * This function maps from the Bxxxx defines in asm/termbits.h into real
1346 cflag_to_baud(unsigned int cflag)
1348 static int baud_table[] = {
1349 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400,
1350 4800, 9600, 19200, 38400 };
1352 static int ext_baud_table[] = {
1353 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000,
1354 0, 0, 0, 0, 0, 0, 0, 0 };
1356 if (cflag & CBAUDEX)
1357 return ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1359 return baud_table[cflag & CBAUD];
1362 /* and this maps to an etrax100 hardware baud constant */
1364 static unsigned char
1365 cflag_to_etrax_baud(unsigned int cflag)
1369 static char baud_table[] = {
1370 -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 };
1372 static char ext_baud_table[] = {
1373 -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 };
1375 if (cflag & CBAUDEX)
1376 retval = ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1378 retval = baud_table[cflag & CBAUD];
1381 printk(KERN_WARNING "serdriver tried setting invalid baud rate, flags %x.\n", cflag);
1382 retval = 5; /* choose default 9600 instead */
1385 return retval | (retval << 4); /* choose same for both TX and RX */
1389 /* Various static support functions */
1391 /* Functions to set or clear DTR/RTS on the requested line */
1392 /* It is complicated by the fact that RTS is a serial port register, while
1393 * DTR might not be implemented in the HW at all, and if it is, it can be on
1399 e100_dtr(struct e100_serial *info, int set)
1401 #ifndef CONFIG_SVINTO_SIM
1402 unsigned char mask = e100_modem_pins[info->line].dtr_mask;
1404 #ifdef SERIAL_DEBUG_IO
1405 printk("ser%i dtr %i mask: 0x%02X\n", info->line, set, mask);
1406 printk("ser%i shadow before 0x%02X get: %i\n",
1407 info->line, *e100_modem_pins[info->line].dtr_shadow,
1408 E100_DTR_GET(info));
1410 /* DTR is active low */
1412 unsigned long flags;
1416 *e100_modem_pins[info->line].dtr_shadow &= ~mask;
1417 *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask);
1418 *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow;
1419 restore_flags(flags);
1422 #ifdef SERIAL_DEBUG_IO
1423 printk("ser%i shadow after 0x%02X get: %i\n",
1424 info->line, *e100_modem_pins[info->line].dtr_shadow,
1425 E100_DTR_GET(info));
1430 /* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
1434 e100_rts(struct e100_serial *info, int set)
1436 #ifndef CONFIG_SVINTO_SIM
1437 unsigned long flags;
1440 info->rx_ctrl &= ~E100_RTS_MASK;
1441 info->rx_ctrl |= (set ? 0 : E100_RTS_MASK); /* RTS is active low */
1442 info->port[REG_REC_CTRL] = info->rx_ctrl;
1443 restore_flags(flags);
1444 #ifdef SERIAL_DEBUG_IO
1445 printk("ser%i rts %i\n", info->line, set);
1451 /* If this behaves as a modem, RI and CD is an output */
1453 e100_ri_out(struct e100_serial *info, int set)
1455 #ifndef CONFIG_SVINTO_SIM
1456 /* RI is active low */
1458 unsigned char mask = e100_modem_pins[info->line].ri_mask;
1459 unsigned long flags;
1463 *e100_modem_pins[info->line].ri_shadow &= ~mask;
1464 *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask);
1465 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
1466 restore_flags(flags);
1471 e100_cd_out(struct e100_serial *info, int set)
1473 #ifndef CONFIG_SVINTO_SIM
1474 /* CD is active low */
1476 unsigned char mask = e100_modem_pins[info->line].cd_mask;
1477 unsigned long flags;
1481 *e100_modem_pins[info->line].cd_shadow &= ~mask;
1482 *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask);
1483 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
1484 restore_flags(flags);
1490 e100_disable_rx(struct e100_serial *info)
1492 #ifndef CONFIG_SVINTO_SIM
1493 /* disable the receiver */
1494 info->port[REG_REC_CTRL] =
1495 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1500 e100_enable_rx(struct e100_serial *info)
1502 #ifndef CONFIG_SVINTO_SIM
1503 /* enable the receiver */
1504 info->port[REG_REC_CTRL] =
1505 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1509 /* the rx DMA uses both the dma_descr and the dma_eop interrupts */
1512 e100_disable_rxdma_irq(struct e100_serial *info)
1514 #ifdef SERIAL_DEBUG_INTR
1515 printk("rxdma_irq(%d): 0\n",info->line);
1517 DINTR1(DEBUG_LOG(info->line,"IRQ disable_rxdma_irq %i\n", info->line));
1518 *R_IRQ_MASK2_CLR = (info->irq << 2) | (info->irq << 3);
1522 e100_enable_rxdma_irq(struct e100_serial *info)
1524 #ifdef SERIAL_DEBUG_INTR
1525 printk("rxdma_irq(%d): 1\n",info->line);
1527 DINTR1(DEBUG_LOG(info->line,"IRQ enable_rxdma_irq %i\n", info->line));
1528 *R_IRQ_MASK2_SET = (info->irq << 2) | (info->irq << 3);
1531 /* the tx DMA uses only dma_descr interrupt */
1533 static _INLINE_ void
1534 e100_disable_txdma_irq(struct e100_serial *info)
1536 #ifdef SERIAL_DEBUG_INTR
1537 printk("txdma_irq(%d): 0\n",info->line);
1539 DINTR1(DEBUG_LOG(info->line,"IRQ disable_txdma_irq %i\n", info->line));
1540 *R_IRQ_MASK2_CLR = info->irq;
1543 static _INLINE_ void
1544 e100_enable_txdma_irq(struct e100_serial *info)
1546 #ifdef SERIAL_DEBUG_INTR
1547 printk("txdma_irq(%d): 1\n",info->line);
1549 DINTR1(DEBUG_LOG(info->line,"IRQ enable_txdma_irq %i\n", info->line));
1550 *R_IRQ_MASK2_SET = info->irq;
1553 static _INLINE_ void
1554 e100_disable_txdma_channel(struct e100_serial *info)
1556 unsigned long flags;
1558 /* Disable output DMA channel for the serial port in question
1559 * ( set to something other then serialX)
1563 DFLOW(DEBUG_LOG(info->line, "disable_txdma_channel %i\n", info->line));
1564 if (info->line == 0) {
1565 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma6)) ==
1566 IO_STATE(R_GEN_CONFIG, dma6, serial0)) {
1567 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1568 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused);
1570 } else if (info->line == 1) {
1571 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma8)) ==
1572 IO_STATE(R_GEN_CONFIG, dma8, serial1)) {
1573 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1574 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb);
1576 } else if (info->line == 2) {
1577 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma2)) ==
1578 IO_STATE(R_GEN_CONFIG, dma2, serial2)) {
1579 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1580 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0);
1582 } else if (info->line == 3) {
1583 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma4)) ==
1584 IO_STATE(R_GEN_CONFIG, dma4, serial3)) {
1585 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1586 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1);
1589 *R_GEN_CONFIG = genconfig_shadow;
1590 restore_flags(flags);
1594 static _INLINE_ void
1595 e100_enable_txdma_channel(struct e100_serial *info)
1597 unsigned long flags;
1601 DFLOW(DEBUG_LOG(info->line, "enable_txdma_channel %i\n", info->line));
1602 /* Enable output DMA channel for the serial port in question */
1603 if (info->line == 0) {
1604 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1605 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, serial0);
1606 } else if (info->line == 1) {
1607 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1608 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, serial1);
1609 } else if (info->line == 2) {
1610 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1611 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, serial2);
1612 } else if (info->line == 3) {
1613 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1614 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3);
1616 *R_GEN_CONFIG = genconfig_shadow;
1617 restore_flags(flags);
1620 static _INLINE_ void
1621 e100_disable_rxdma_channel(struct e100_serial *info)
1623 unsigned long flags;
1625 /* Disable input DMA channel for the serial port in question
1626 * ( set to something other then serialX)
1630 if (info->line == 0) {
1631 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma7)) ==
1632 IO_STATE(R_GEN_CONFIG, dma7, serial0)) {
1633 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1634 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, unused);
1636 } else if (info->line == 1) {
1637 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma9)) ==
1638 IO_STATE(R_GEN_CONFIG, dma9, serial1)) {
1639 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1640 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, usb);
1642 } else if (info->line == 2) {
1643 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma3)) ==
1644 IO_STATE(R_GEN_CONFIG, dma3, serial2)) {
1645 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1646 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, par0);
1648 } else if (info->line == 3) {
1649 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma5)) ==
1650 IO_STATE(R_GEN_CONFIG, dma5, serial3)) {
1651 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1652 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, par1);
1655 *R_GEN_CONFIG = genconfig_shadow;
1656 restore_flags(flags);
1660 static _INLINE_ void
1661 e100_enable_rxdma_channel(struct e100_serial *info)
1663 unsigned long flags;
1667 /* Enable input DMA channel for the serial port in question */
1668 if (info->line == 0) {
1669 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1670 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, serial0);
1671 } else if (info->line == 1) {
1672 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1673 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, serial1);
1674 } else if (info->line == 2) {
1675 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1676 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, serial2);
1677 } else if (info->line == 3) {
1678 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1679 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, serial3);
1681 *R_GEN_CONFIG = genconfig_shadow;
1682 restore_flags(flags);
1685 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1686 /* in order to detect and fix errors on the first byte
1687 we have to use the serial interrupts as well. */
1690 e100_disable_serial_data_irq(struct e100_serial *info)
1692 #ifdef SERIAL_DEBUG_INTR
1693 printk("ser_irq(%d): 0\n",info->line);
1695 DINTR1(DEBUG_LOG(info->line,"IRQ disable data_irq %i\n", info->line));
1696 *R_IRQ_MASK1_CLR = (1U << (8+2*info->line));
1700 e100_enable_serial_data_irq(struct e100_serial *info)
1702 #ifdef SERIAL_DEBUG_INTR
1703 printk("ser_irq(%d): 1\n",info->line);
1704 printk("**** %d = %d\n",
1706 (1U << (8+2*info->line)));
1708 DINTR1(DEBUG_LOG(info->line,"IRQ enable data_irq %i\n", info->line));
1709 *R_IRQ_MASK1_SET = (1U << (8+2*info->line));
1714 e100_disable_serial_tx_ready_irq(struct e100_serial *info)
1716 #ifdef SERIAL_DEBUG_INTR
1717 printk("ser_tx_irq(%d): 0\n",info->line);
1719 DINTR1(DEBUG_LOG(info->line,"IRQ disable ready_irq %i\n", info->line));
1720 *R_IRQ_MASK1_CLR = (1U << (8+1+2*info->line));
1724 e100_enable_serial_tx_ready_irq(struct e100_serial *info)
1726 #ifdef SERIAL_DEBUG_INTR
1727 printk("ser_tx_irq(%d): 1\n",info->line);
1728 printk("**** %d = %d\n",
1730 (1U << (8+1+2*info->line)));
1732 DINTR2(DEBUG_LOG(info->line,"IRQ enable ready_irq %i\n", info->line));
1733 *R_IRQ_MASK1_SET = (1U << (8+1+2*info->line));
1736 static inline void e100_enable_rx_irq(struct e100_serial *info)
1738 if (info->uses_dma_in)
1739 e100_enable_rxdma_irq(info);
1741 e100_enable_serial_data_irq(info);
1743 static inline void e100_disable_rx_irq(struct e100_serial *info)
1745 if (info->uses_dma_in)
1746 e100_disable_rxdma_irq(info);
1748 e100_disable_serial_data_irq(info);
1751 #if defined(CONFIG_ETRAX_RS485)
1752 /* Enable RS-485 mode on selected port. This is UGLY. */
1754 e100_enable_rs485(struct tty_struct *tty,struct rs485_control *r)
1756 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1758 #if defined(CONFIG_ETRAX_RS485_ON_PA)
1759 *R_PORT_PA_DATA = port_pa_data_shadow |= (1 << rs485_pa_bit);
1761 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
1762 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1763 rs485_port_g_bit, 1);
1765 #if defined(CONFIG_ETRAX_RS485_LTC1387)
1766 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1767 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 1);
1768 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1769 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 1);
1772 info->rs485.rts_on_send = 0x01 & r->rts_on_send;
1773 info->rs485.rts_after_sent = 0x01 & r->rts_after_sent;
1774 if (r->delay_rts_before_send >= 1000)
1775 info->rs485.delay_rts_before_send = 1000;
1777 info->rs485.delay_rts_before_send = r->delay_rts_before_send;
1778 info->rs485.enabled = r->enabled;
1779 /* printk("rts: on send = %i, after = %i, enabled = %i",
1780 info->rs485.rts_on_send,
1781 info->rs485.rts_after_sent,
1789 e100_write_rs485(struct tty_struct *tty, int from_user,
1790 const unsigned char *buf, int count)
1792 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1793 int old_enabled = info->rs485.enabled;
1795 /* rs485 is always implicitly enabled if we're using the ioctl()
1796 * but it doesn't have to be set in the rs485_control
1797 * (to be backward compatible with old apps)
1798 * So we store, set and restore it.
1800 info->rs485.enabled = 1;
1801 /* rs_write now deals with RS485 if enabled */
1802 count = rs_write(tty, from_user, buf, count);
1803 info->rs485.enabled = old_enabled;
1807 #ifdef CONFIG_ETRAX_FAST_TIMER
1808 /* Timer function to toggle RTS when using FAST_TIMER */
1809 static void rs485_toggle_rts_timer_function(unsigned long data)
1811 struct e100_serial *info = (struct e100_serial *)data;
1813 fast_timers_rs485[info->line].function = NULL;
1814 e100_rts(info, info->rs485.rts_after_sent);
1815 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
1816 e100_enable_rx(info);
1817 e100_enable_rx_irq(info);
1821 #endif /* CONFIG_ETRAX_RS485 */
1824 * ------------------------------------------------------------
1825 * rs_stop() and rs_start()
1827 * This routines are called before setting or resetting tty->stopped.
1828 * They enable or disable transmitter using the XOFF registers, as necessary.
1829 * ------------------------------------------------------------
1833 rs_stop(struct tty_struct *tty)
1835 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1837 unsigned long flags;
1840 save_flags(flags); cli();
1841 DFLOW(DEBUG_LOG(info->line, "XOFF rs_stop xmit %i\n",
1842 CIRC_CNT(info->xmit.head,
1843 info->xmit.tail,SERIAL_XMIT_SIZE)));
1845 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
1846 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, stop);
1847 if (tty->termios->c_iflag & IXON ) {
1848 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1851 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
1852 restore_flags(flags);
1857 rs_start(struct tty_struct *tty)
1859 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1861 unsigned long flags;
1864 save_flags(flags); cli();
1865 DFLOW(DEBUG_LOG(info->line, "XOFF rs_start xmit %i\n",
1866 CIRC_CNT(info->xmit.head,
1867 info->xmit.tail,SERIAL_XMIT_SIZE)));
1868 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(tty));
1869 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
1870 if (tty->termios->c_iflag & IXON ) {
1871 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1874 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
1875 if (!info->uses_dma_out &&
1876 info->xmit.head != info->xmit.tail && info->xmit.buf)
1877 e100_enable_serial_tx_ready_irq(info);
1879 restore_flags(flags);
1884 * ----------------------------------------------------------------------
1886 * Here starts the interrupt handling routines. All of the following
1887 * subroutines are declared as inline and are folded into
1888 * rs_interrupt(). They were separated out for readability's sake.
1890 * Note: rs_interrupt() is a "fast" interrupt, which means that it
1891 * runs with interrupts turned off. People who may want to modify
1892 * rs_interrupt() should try to keep the interrupt handler as fast as
1893 * possible. After you are done making modifications, it is not a bad
1896 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
1898 * and look at the resulting assemble code in serial.s.
1900 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
1901 * -----------------------------------------------------------------------
1905 * This routine is used by the interrupt handler to schedule
1906 * processing in the software interrupt portion of the driver.
1908 static _INLINE_ void
1909 rs_sched_event(struct e100_serial *info,
1912 if (info->event & (1 << event))
1914 info->event |= 1 << event;
1915 schedule_work(&info->work);
1918 /* The output DMA channel is free - use it to send as many chars as possible
1920 * We don't pay attention to info->x_char, which means if the TTY wants to
1921 * use XON/XOFF it will set info->x_char but we won't send any X char!
1923 * To implement this, we'd just start a DMA send of 1 byte pointing at a
1924 * buffer containing the X char, and skip updating xmit. We'd also have to
1925 * check if the last sent char was the X char when we enter this function
1926 * the next time, to avoid updating xmit with the sent X value.
1930 transmit_chars_dma(struct e100_serial *info)
1932 unsigned int c, sentl;
1933 struct etrax_dma_descr *descr;
1935 #ifdef CONFIG_SVINTO_SIM
1936 /* This will output too little if tail is not 0 always since
1937 * we don't reloop to send the other part. Anyway this SHOULD be a
1938 * no-op - transmit_chars_dma would never really be called during sim
1939 * since rs_write does not write into the xmit buffer then.
1941 if (info->xmit.tail)
1942 printk("Error in serial.c:transmit_chars-dma(), tail!=0\n");
1943 if (info->xmit.head != info->xmit.tail) {
1944 SIMCOUT(info->xmit.buf + info->xmit.tail,
1945 CIRC_CNT(info->xmit.head,
1948 info->xmit.head = info->xmit.tail; /* move back head */
1949 info->tr_running = 0;
1953 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1954 *info->oclrintradr =
1955 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1956 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1958 #ifdef SERIAL_DEBUG_INTR
1959 if (info->line == SERIAL_DEBUG_LINE)
1962 if (!info->tr_running) {
1963 /* weirdo... we shouldn't get here! */
1964 printk(KERN_WARNING "Achtung: transmit_chars_dma with !tr_running\n");
1968 descr = &info->tr_descr;
1970 /* first get the amount of bytes sent during the last DMA transfer,
1971 and update xmit accordingly */
1973 /* if the stop bit was not set, all data has been sent */
1974 if (!(descr->status & d_stop)) {
1975 sentl = descr->sw_len;
1977 /* otherwise we find the amount of data sent here */
1978 sentl = descr->hw_len;
1980 DFLOW(DEBUG_LOG(info->line, "TX %i done\n", sentl));
1983 info->icount.tx += sentl;
1985 /* update xmit buffer */
1986 info->xmit.tail = (info->xmit.tail + sentl) & (SERIAL_XMIT_SIZE - 1);
1988 /* if there is only a few chars left in the buf, wake up the blocked
1990 if (CIRC_CNT(info->xmit.head,
1992 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
1993 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
1995 /* find out the largest amount of consecutive bytes we want to send now */
1997 c = CIRC_CNT_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
1999 /* Don't send all in one DMA transfer - divide it so we wake up
2000 * application before all is sent
2003 if (c >= 4*WAKEUP_CHARS)
2007 /* our job here is done, don't schedule any new DMA transfer */
2008 info->tr_running = 0;
2010 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
2011 if (info->rs485.enabled) {
2012 /* Set a short timer to toggle RTS */
2013 start_one_shot_timer(&fast_timers_rs485[info->line],
2014 rs485_toggle_rts_timer_function,
2015 (unsigned long)info,
2016 info->char_time_usec*2,
2023 /* ok we can schedule a dma send of c chars starting at info->xmit.tail */
2024 /* set up the descriptor correctly for output */
2025 DFLOW(DEBUG_LOG(info->line, "TX %i\n", c));
2026 descr->ctrl = d_int | d_eol | d_wait; /* Wait needed for tty_wait_until_sent() */
2028 descr->buf = virt_to_phys(info->xmit.buf + info->xmit.tail);
2031 *info->ofirstadr = virt_to_phys(descr); /* write to R_DMAx_FIRST */
2032 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
2034 /* DMA is now running (hopefully) */
2035 } /* transmit_chars_dma */
2038 start_transmit(struct e100_serial *info)
2041 if (info->line == SERIAL_DEBUG_LINE)
2045 info->tr_descr.sw_len = 0;
2046 info->tr_descr.hw_len = 0;
2047 info->tr_descr.status = 0;
2048 info->tr_running = 1;
2049 if (info->uses_dma_out)
2050 transmit_chars_dma(info);
2052 e100_enable_serial_tx_ready_irq(info);
2053 } /* start_transmit */
2055 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2056 static int serial_fast_timer_started = 0;
2057 static int serial_fast_timer_expired = 0;
2058 static void flush_timeout_function(unsigned long data);
2059 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\
2060 unsigned long timer_flags; \
2061 save_flags(timer_flags); \
2063 if (fast_timers[info->line].function == NULL) { \
2064 serial_fast_timer_started++; \
2065 TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
2066 TIMERD(DEBUG_LOG(info->line, "num started: %i\n", serial_fast_timer_started)); \
2067 start_one_shot_timer(&fast_timers[info->line], \
2068 flush_timeout_function, \
2069 (unsigned long)info, \
2074 TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
2076 restore_flags(timer_flags); \
2078 #define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec)
2081 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec)
2082 #define START_FLUSH_FAST_TIMER(info, string)
2085 static struct etrax_recv_buffer *
2086 alloc_recv_buffer(unsigned int size)
2088 struct etrax_recv_buffer *buffer;
2090 if (!(buffer = kmalloc(sizeof *buffer + size, GFP_ATOMIC)))
2093 buffer->next = NULL;
2095 buffer->error = TTY_NORMAL;
2101 append_recv_buffer(struct e100_serial *info, struct etrax_recv_buffer *buffer)
2103 unsigned long flags;
2108 if (!info->first_recv_buffer)
2109 info->first_recv_buffer = buffer;
2111 info->last_recv_buffer->next = buffer;
2113 info->last_recv_buffer = buffer;
2115 info->recv_cnt += buffer->length;
2116 if (info->recv_cnt > info->max_recv_cnt)
2117 info->max_recv_cnt = info->recv_cnt;
2119 restore_flags(flags);
2123 add_char_and_flag(struct e100_serial *info, unsigned char data, unsigned char flag)
2125 struct etrax_recv_buffer *buffer;
2126 if (info->uses_dma_in) {
2127 if (!(buffer = alloc_recv_buffer(4)))
2131 buffer->error = flag;
2132 buffer->buffer[0] = data;
2134 append_recv_buffer(info, buffer);
2138 struct tty_struct *tty = info->tty;
2139 *tty->flip.char_buf_ptr = data;
2140 *tty->flip.flag_buf_ptr = flag;
2141 tty->flip.flag_buf_ptr++;
2142 tty->flip.char_buf_ptr++;
2150 extern _INLINE_ unsigned int
2151 handle_descr_data(struct e100_serial *info, struct etrax_dma_descr *descr, unsigned int recvl)
2153 struct etrax_recv_buffer *buffer = phys_to_virt(descr->buf) - sizeof *buffer;
2155 if (info->recv_cnt + recvl > 65536) {
2157 "%s: Too much pending incoming serial data! Dropping %u bytes.\n", __FUNCTION__, recvl);
2161 buffer->length = recvl;
2163 if (info->errorcode == ERRCODE_SET_BREAK)
2164 buffer->error = TTY_BREAK;
2165 info->errorcode = 0;
2167 append_recv_buffer(info, buffer);
2169 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
2170 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
2172 descr->buf = virt_to_phys(buffer->buffer);
2177 static _INLINE_ unsigned int
2178 handle_all_descr_data(struct e100_serial *info)
2180 struct etrax_dma_descr *descr;
2182 unsigned int ret = 0;
2186 descr = &info->rec_descr[info->cur_rec_descr];
2188 if (descr == phys_to_virt(*info->idescradr))
2191 if (++info->cur_rec_descr == SERIAL_RECV_DESCRIPTORS)
2192 info->cur_rec_descr = 0;
2194 /* find out how many bytes were read */
2196 /* if the eop bit was not set, all data has been received */
2197 if (!(descr->status & d_eop)) {
2198 recvl = descr->sw_len;
2200 /* otherwise we find the amount of data received here */
2201 recvl = descr->hw_len;
2204 /* Reset the status information */
2207 DFLOW( DEBUG_LOG(info->line, "RX %lu\n", recvl);
2208 if (info->tty->stopped) {
2209 unsigned char *buf = phys_to_virt(descr->buf);
2210 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[0]);
2211 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[1]);
2212 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[2]);
2217 info->icount.rx += recvl;
2219 ret += handle_descr_data(info, descr, recvl);
2225 static _INLINE_ void
2226 receive_chars_dma(struct e100_serial *info)
2228 struct tty_struct *tty;
2229 unsigned char rstat;
2231 #ifdef CONFIG_SVINTO_SIM
2232 /* No receive in the simulator. Will probably be when the rest of
2233 * the serial interface works, and this piece will just be removed.
2238 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
2239 *info->iclrintradr =
2240 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2241 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2244 if (!tty) /* Something wrong... */
2247 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2248 if (info->uses_dma_in)
2249 e100_enable_serial_data_irq(info);
2252 if (info->errorcode == ERRCODE_INSERT_BREAK)
2253 add_char_and_flag(info, '\0', TTY_BREAK);
2255 handle_all_descr_data(info);
2257 /* Read the status register to detect errors */
2258 rstat = info->port[REG_STATUS];
2259 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2260 DFLOW(DEBUG_LOG(info->line, "XOFF detect stat %x\n", rstat));
2263 if (rstat & SER_ERROR_MASK) {
2264 /* If we got an error, we must reset it by reading the
2267 unsigned char data = info->port[REG_DATA];
2269 PROCSTAT(ser_stat[info->line].errors_cnt++);
2270 DEBUG_LOG(info->line, "#dERR: s d 0x%04X\n",
2271 ((rstat & SER_ERROR_MASK) << 8) | data);
2273 if (rstat & SER_PAR_ERR_MASK)
2274 add_char_and_flag(info, data, TTY_PARITY);
2275 else if (rstat & SER_OVERRUN_MASK)
2276 add_char_and_flag(info, data, TTY_OVERRUN);
2277 else if (rstat & SER_FRAMING_ERR_MASK)
2278 add_char_and_flag(info, data, TTY_FRAME);
2281 START_FLUSH_FAST_TIMER(info, "receive_chars");
2283 /* Restart the receiving DMA */
2284 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2288 start_recv_dma(struct e100_serial *info)
2290 struct etrax_dma_descr *descr = info->rec_descr;
2291 struct etrax_recv_buffer *buffer;
2294 /* Set up the receiving descriptors */
2295 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) {
2296 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
2297 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
2299 descr[i].ctrl = d_int;
2300 descr[i].buf = virt_to_phys(buffer->buffer);
2301 descr[i].sw_len = SERIAL_DESCR_BUF_SIZE;
2302 descr[i].hw_len = 0;
2303 descr[i].status = 0;
2304 descr[i].next = virt_to_phys(&descr[i+1]);
2307 /* Link the last descriptor to the first */
2308 descr[i-1].next = virt_to_phys(&descr[0]);
2310 /* Start with the first descriptor in the list */
2311 info->cur_rec_descr = 0;
2314 *info->ifirstadr = virt_to_phys(&descr[info->cur_rec_descr]);
2315 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
2317 /* Input DMA should be running now */
2322 start_receive(struct e100_serial *info)
2324 #ifdef CONFIG_SVINTO_SIM
2325 /* No receive in the simulator. Will probably be when the rest of
2326 * the serial interface works, and this piece will just be removed.
2330 info->tty->flip.count = 0;
2331 if (info->uses_dma_in) {
2332 /* reset the input dma channel to be sure it works */
2334 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2335 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
2336 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2338 start_recv_dma(info);
2343 static _INLINE_ void
2344 status_handle(struct e100_serial *info, unsigned short status)
2348 /* the bits in the MASK2 register are laid out like this:
2349 DMAI_EOP DMAI_DESCR DMAO_EOP DMAO_DESCR
2350 where I is the input channel and O is the output channel for the port.
2351 info->irq is the bit number for the DMAO_DESCR so to check the others we
2352 shift info->irq to the left.
2355 /* dma output channel interrupt handler
2356 this interrupt is called from DMA2(ser2), DMA4(ser3), DMA6(ser0) or
2357 DMA8(ser1) when they have finished a descriptor with the intr flag set.
2361 tr_interrupt(int irq, void *dev_id, struct pt_regs * regs)
2363 struct e100_serial *info;
2368 #ifdef CONFIG_SVINTO_SIM
2369 /* No receive in the simulator. Will probably be when the rest of
2370 * the serial interface works, and this piece will just be removed.
2373 const char *s = "What? tr_interrupt in simulator??\n";
2374 SIMCOUT(s,strlen(s));
2379 /* find out the line that caused this irq and get it from rs_table */
2381 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2383 for (i = 0; i < NR_PORTS; i++) {
2384 info = rs_table + i;
2385 if (!info->enabled || !info->uses_dma_out)
2387 /* check for dma_descr (don't need to check for dma_eop in output dma for serial */
2388 if (ireg & info->irq) {
2390 /* we can send a new dma bunch. make it so. */
2391 DINTR2(DEBUG_LOG(info->line, "tr_interrupt %i\n", i));
2392 /* Read jiffies_usec first,
2393 * we want this time to be as late as possible
2395 PROCSTAT(ser_stat[info->line].tx_dma_ints++);
2396 info->last_tx_active_usec = GET_JIFFIES_USEC();
2397 info->last_tx_active = jiffies;
2398 transmit_chars_dma(info);
2401 /* FIXME: here we should really check for a change in the
2402 status lines and if so call status_handle(info) */
2404 return IRQ_RETVAL(handled);
2405 } /* tr_interrupt */
2407 /* dma input channel interrupt handler */
2410 rec_interrupt(int irq, void *dev_id, struct pt_regs * regs)
2412 struct e100_serial *info;
2417 #ifdef CONFIG_SVINTO_SIM
2418 /* No receive in the simulator. Will probably be when the rest of
2419 * the serial interface works, and this piece will just be removed.
2422 const char *s = "What? rec_interrupt in simulator??\n";
2423 SIMCOUT(s,strlen(s));
2428 /* find out the line that caused this irq and get it from rs_table */
2430 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2432 for (i = 0; i < NR_PORTS; i++) {
2433 info = rs_table + i;
2434 if (!info->enabled || !info->uses_dma_in)
2436 /* check for both dma_eop and dma_descr for the input dma channel */
2437 if (ireg & ((info->irq << 2) | (info->irq << 3))) {
2439 /* we have received something */
2440 receive_chars_dma(info);
2443 /* FIXME: here we should really check for a change in the
2444 status lines and if so call status_handle(info) */
2446 return IRQ_RETVAL(handled);
2447 } /* rec_interrupt */
2450 force_eop_if_needed(struct e100_serial *info)
2452 /* We check data_avail bit to determine if data has
2453 * arrived since last time
2455 unsigned char rstat = info->port[REG_STATUS];
2457 /* error or datavail? */
2458 if (rstat & SER_ERROR_MASK) {
2459 /* Some error has occurred. If there has been valid data, an
2460 * EOP interrupt will be made automatically. If no data, the
2461 * normal ser_interrupt should be enabled and handle it.
2464 DEBUG_LOG(info->line, "timeout err: rstat 0x%03X\n",
2465 rstat | (info->line << 8));
2469 if (rstat & SER_DATA_AVAIL_MASK) {
2470 /* Ok data, no error, count it */
2471 TIMERD(DEBUG_LOG(info->line, "timeout: rstat 0x%03X\n",
2472 rstat | (info->line << 8)));
2473 /* Read data to clear status flags */
2474 (void)info->port[REG_DATA];
2476 info->forced_eop = 0;
2477 START_FLUSH_FAST_TIMER(info, "magic");
2481 /* hit the timeout, force an EOP for the input
2482 * dma channel if we haven't already
2484 if (!info->forced_eop) {
2485 info->forced_eop = 1;
2486 PROCSTAT(ser_stat[info->line].timeout_flush_cnt++);
2487 TIMERD(DEBUG_LOG(info->line, "timeout EOP %i\n", info->line));
2494 extern _INLINE_ void
2495 flush_to_flip_buffer(struct e100_serial *info)
2497 struct tty_struct *tty;
2498 struct etrax_recv_buffer *buffer;
2499 unsigned int length;
2500 unsigned long flags;
2503 if (!info->first_recv_buffer)
2509 if (!(tty = info->tty)) {
2510 restore_flags(flags);
2514 length = tty->flip.count;
2515 /* Don't flip more than the ldisc has room for.
2516 * The return value from ldisc.receive_room(tty) - might not be up to
2517 * date, the previous flip of up to TTY_FLIPBUF_SIZE might be on the
2518 * processed and not accounted for yet.
2519 * Since we use DMA, 1 SERIAL_DESCR_BUF_SIZE could be on the way.
2520 * Lets buffer data here and let flow control take care of it.
2521 * Since we normally flip large chunks, the ldisc don't react
2522 * with throttle until too late if we flip to much.
2524 max_flip_size = tty->ldisc.receive_room(tty);
2525 if (max_flip_size < 0)
2527 if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
2528 length + info->recv_cnt + /* We have this queued */
2529 2*SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
2530 TTY_THRESHOLD_THROTTLE)) { /* Some slack */
2531 /* check TTY_THROTTLED first so it indicates our state */
2532 if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
2533 DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles room %lu\n", max_flip_size));
2537 else if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
2538 length + info->recv_cnt + /* We have this queued */
2539 SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
2540 TTY_THRESHOLD_THROTTLE)) { /* Some slack */
2541 DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles again! %lu\n", max_flip_size));
2547 if (max_flip_size > TTY_FLIPBUF_SIZE)
2548 max_flip_size = TTY_FLIPBUF_SIZE;
2550 while ((buffer = info->first_recv_buffer) && length < max_flip_size) {
2551 unsigned int count = buffer->length;
2553 if (length + count > max_flip_size)
2554 count = max_flip_size - length;
2556 memcpy(tty->flip.char_buf_ptr + length, buffer->buffer, count);
2557 memset(tty->flip.flag_buf_ptr + length, TTY_NORMAL, count);
2558 tty->flip.flag_buf_ptr[length] = buffer->error;
2561 info->recv_cnt -= count;
2562 DFLIP(DEBUG_LOG(info->line,"flip: %i\n", length));
2564 if (count == buffer->length) {
2565 info->first_recv_buffer = buffer->next;
2568 buffer->length -= count;
2569 memmove(buffer->buffer, buffer->buffer + count, buffer->length);
2570 buffer->error = TTY_NORMAL;
2574 if (!info->first_recv_buffer)
2575 info->last_recv_buffer = NULL;
2577 tty->flip.count = length;
2578 DFLIP(if (tty->ldisc.chars_in_buffer(tty) > 3500) {
2579 DEBUG_LOG(info->line, "ldisc %lu\n",
2580 tty->ldisc.chars_in_buffer(tty));
2581 DEBUG_LOG(info->line, "flip.count %lu\n",
2585 restore_flags(flags);
2590 if (test_bit(TTY_DONT_FLIP, &tty->flags)) {
2591 DEBUG_LOG(info->line, "*** TTY_DONT_FLIP set flip.count %i ***\n", tty->flip.count);
2592 DEBUG_LOG(info->line, "*** recv_cnt %i\n", info->recv_cnt);
2595 DEBUG_LOG(info->line, "*** rxtot %i\n", info->icount.rx);
2596 DEBUG_LOG(info->line, "ldisc %lu\n", tty->ldisc.chars_in_buffer(tty));
2597 DEBUG_LOG(info->line, "room %lu\n", tty->ldisc.receive_room(tty));
2602 /* this includes a check for low-latency */
2603 tty_flip_buffer_push(tty);
2606 static _INLINE_ void
2607 check_flush_timeout(struct e100_serial *info)
2609 /* Flip what we've got (if we can) */
2610 flush_to_flip_buffer(info);
2612 /* We might need to flip later, but not to fast
2613 * since the system is busy processing input... */
2614 if (info->first_recv_buffer)
2615 START_FLUSH_FAST_TIMER_TIME(info, "flip", 2000);
2617 /* Force eop last, since data might have come while we're processing
2618 * and if we started the slow timer above, we won't start a fast
2621 force_eop_if_needed(info);
2624 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2625 static void flush_timeout_function(unsigned long data)
2627 struct e100_serial *info = (struct e100_serial *)data;
2629 fast_timers[info->line].function = NULL;
2630 serial_fast_timer_expired++;
2631 TIMERD(DEBUG_LOG(info->line, "flush_timout %i ", info->line));
2632 TIMERD(DEBUG_LOG(info->line, "num expired: %i\n", serial_fast_timer_expired));
2633 check_flush_timeout(info);
2638 /* dma fifo/buffer timeout handler
2639 forces an end-of-packet for the dma input channel if no chars
2640 have been received for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS/100 s.
2643 static struct timer_list flush_timer;
2646 timed_flush_handler(unsigned long ptr)
2648 struct e100_serial *info;
2651 #ifdef CONFIG_SVINTO_SIM
2655 for (i = 0; i < NR_PORTS; i++) {
2656 info = rs_table + i;
2657 if (info->uses_dma_in)
2658 check_flush_timeout(info);
2661 /* restart flush timer */
2662 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
2666 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2668 /* If there is an error (ie break) when the DMA is running and
2669 * there are no bytes in the fifo the DMA is stopped and we get no
2670 * eop interrupt. Thus we have to monitor the first bytes on a DMA
2671 * transfer, and if it is without error we can turn the serial
2676 BREAK handling on ETRAX 100:
2677 ETRAX will generate interrupt although there is no stop bit between the
2680 Depending on how long the break sequence is, the end of the breaksequence
2681 will look differently:
2682 | indicates start/end of a character.
2684 B= Break character (0x00) with framing error.
2685 E= Error byte with parity error received after B characters.
2686 F= "Faked" valid byte received immediately after B characters.
2690 B BL ___________________________ V
2691 .._|__________|__________| |valid data |
2693 Multiple frame errors with data == 0x00 (B),
2694 the timing matches up "perfectly" so no extra ending char is detected.
2695 The RXD pin is 1 in the last interrupt, in that case
2696 we set info->errorcode = ERRCODE_INSERT_BREAK, but we can't really
2697 know if another byte will come and this really is case 2. below
2698 (e.g F=0xFF or 0xFE)
2699 If RXD pin is 0 we can expect another character (see 2. below).
2704 B B E or F__________________..__ V
2705 .._|__________|__________|______ | |valid data
2709 Multiple frame errors with data == 0x00 (B),
2710 but the part of the break trigs is interpreted as a start bit (and possibly
2711 some 0 bits followed by a number of 1 bits and a stop bit).
2712 Depending on parity settings etc. this last character can be either
2713 a fake "valid" char (F) or have a parity error (E).
2715 If the character is valid it will be put in the buffer,
2716 we set info->errorcode = ERRCODE_SET_BREAK so the receive interrupt
2717 will set the flags so the tty will handle it,
2718 if it's an error byte it will not be put in the buffer
2719 and we set info->errorcode = ERRCODE_INSERT_BREAK.
2721 To distinguish a V byte in 1. from an F byte in 2. we keep a timestamp
2722 of the last faulty char (B) and compares it with the current time:
2723 If the time elapsed time is less then 2*char_time_usec we will assume
2724 it's a faked F char and not a Valid char and set
2725 info->errorcode = ERRCODE_SET_BREAK.
2727 Flaws in the above solution:
2728 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2729 We use the timer to distinguish a F character from a V character,
2730 if a V character is to close after the break we might make the wrong decision.
2732 TODO: The break will be delayed until an F or V character is received.
2737 struct e100_serial * handle_ser_rx_interrupt_no_dma(struct e100_serial *info)
2739 unsigned long data_read;
2740 struct tty_struct *tty = info->tty;
2743 printk("!NO TTY!\n");
2746 if (tty->flip.count >= TTY_FLIPBUF_SIZE - TTY_THRESHOLD_THROTTLE) {
2747 /* check TTY_THROTTLED first so it indicates our state */
2748 if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
2749 DFLOW(DEBUG_LOG(info->line, "rs_throttle flip.count: %i\n", tty->flip.count));
2753 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
2754 DEBUG_LOG(info->line, "force FLIP! %i\n", tty->flip.count);
2755 tty->flip.work.func((void *) tty);
2756 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
2757 DEBUG_LOG(info->line, "FLIP FULL! %i\n", tty->flip.count);
2758 return info; /* if TTY_DONT_FLIP is set */
2761 /* Read data and status at the same time */
2762 data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
2764 if (data_read & IO_MASK(R_SERIAL0_READ, xoff_detect) ) {
2765 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2767 DINTR2(DEBUG_LOG(info->line, "ser_rx %c\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read)));
2769 if (data_read & ( IO_MASK(R_SERIAL0_READ, framing_err) |
2770 IO_MASK(R_SERIAL0_READ, par_err) |
2771 IO_MASK(R_SERIAL0_READ, overrun) )) {
2773 info->last_rx_active_usec = GET_JIFFIES_USEC();
2774 info->last_rx_active = jiffies;
2775 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat_data %04X\n", data_read));
2777 if (!log_int_trig1_pos) {
2778 log_int_trig1_pos = log_int_pos;
2779 log_int(rdpc(), 0, 0);
2784 if ( ((data_read & IO_MASK(R_SERIAL0_READ, data_in)) == 0) &&
2785 (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) ) {
2786 /* Most likely a break, but we get interrupts over and
2790 if (!info->break_detected_cnt) {
2791 DEBUG_LOG(info->line, "#BRK start\n", 0);
2793 if (data_read & IO_MASK(R_SERIAL0_READ, rxd)) {
2794 /* The RX pin is high now, so the break
2795 * must be over, but....
2796 * we can't really know if we will get another
2797 * last byte ending the break or not.
2798 * And we don't know if the byte (if any) will
2799 * have an error or look valid.
2801 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2802 info->errorcode = ERRCODE_INSERT_BREAK;
2804 info->break_detected_cnt++;
2806 /* The error does not look like a break, but could be
2809 if (info->break_detected_cnt) {
2810 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2811 info->errorcode = ERRCODE_INSERT_BREAK;
2813 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2815 *tty->flip.char_buf_ptr = 0;
2816 *tty->flip.flag_buf_ptr = TTY_BREAK;
2817 tty->flip.flag_buf_ptr++;
2818 tty->flip.char_buf_ptr++;
2822 *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
2824 if (data_read & IO_MASK(R_SERIAL0_READ, par_err)) {
2825 info->icount.parity++;
2826 *tty->flip.flag_buf_ptr = TTY_PARITY;
2827 } else if (data_read & IO_MASK(R_SERIAL0_READ, overrun)) {
2828 info->icount.overrun++;
2829 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
2830 } else if (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) {
2831 info->icount.frame++;
2832 *tty->flip.flag_buf_ptr = TTY_FRAME;
2834 info->errorcode = 0;
2836 info->break_detected_cnt = 0;
2838 } else if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2841 if (!log_int_trig1_pos) {
2842 if (log_int_pos >= log_int_size) {
2845 log_int_trig0_pos = log_int_pos;
2846 log_int(rdpc(), 0, 0);
2849 *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
2850 *tty->flip.flag_buf_ptr = 0;
2852 DEBUG_LOG(info->line, "ser_rx int but no data_avail %08lX\n", data_read);
2856 tty->flip.flag_buf_ptr++;
2857 tty->flip.char_buf_ptr++;
2860 data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
2861 if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2862 DEBUG_LOG(info->line, "ser_rx %c in loop\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read));
2866 tty_flip_buffer_push(info->tty);
2871 struct e100_serial* handle_ser_rx_interrupt(struct e100_serial *info)
2873 unsigned char rstat;
2875 #ifdef SERIAL_DEBUG_INTR
2876 printk("Interrupt from serport %d\n", i);
2878 /* DEBUG_LOG(info->line, "ser_interrupt stat %03X\n", rstat | (i << 8)); */
2879 if (!info->uses_dma_in) {
2880 return handle_ser_rx_interrupt_no_dma(info);
2883 rstat = info->port[REG_STATUS];
2884 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2885 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2888 if (rstat & SER_ERROR_MASK) {
2891 info->last_rx_active_usec = GET_JIFFIES_USEC();
2892 info->last_rx_active = jiffies;
2893 /* If we got an error, we must reset it by reading the
2896 data = info->port[REG_DATA];
2897 DINTR1(DEBUG_LOG(info->line, "ser_rx! %c\n", data));
2898 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat %02X\n", rstat));
2899 if (!data && (rstat & SER_FRAMING_ERR_MASK)) {
2900 /* Most likely a break, but we get interrupts over and
2904 if (!info->break_detected_cnt) {
2905 DEBUG_LOG(info->line, "#BRK start\n", 0);
2907 if (rstat & SER_RXD_MASK) {
2908 /* The RX pin is high now, so the break
2909 * must be over, but....
2910 * we can't really know if we will get another
2911 * last byte ending the break or not.
2912 * And we don't know if the byte (if any) will
2913 * have an error or look valid.
2915 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2916 info->errorcode = ERRCODE_INSERT_BREAK;
2918 info->break_detected_cnt++;
2920 /* The error does not look like a break, but could be
2923 if (info->break_detected_cnt) {
2924 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2925 info->errorcode = ERRCODE_INSERT_BREAK;
2927 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2929 add_char_and_flag(info, '\0', TTY_BREAK);
2932 if (rstat & SER_PAR_ERR_MASK) {
2933 info->icount.parity++;
2934 add_char_and_flag(info, data, TTY_PARITY);
2935 } else if (rstat & SER_OVERRUN_MASK) {
2936 info->icount.overrun++;
2937 add_char_and_flag(info, data, TTY_OVERRUN);
2938 } else if (rstat & SER_FRAMING_ERR_MASK) {
2939 info->icount.frame++;
2940 add_char_and_flag(info, data, TTY_FRAME);
2943 info->errorcode = 0;
2945 info->break_detected_cnt = 0;
2946 DEBUG_LOG(info->line, "#iERR s d %04X\n",
2947 ((rstat & SER_ERROR_MASK) << 8) | data);
2949 PROCSTAT(ser_stat[info->line].early_errors_cnt++);
2950 } else { /* It was a valid byte, now let the DMA do the rest */
2951 unsigned long curr_time_u = GET_JIFFIES_USEC();
2952 unsigned long curr_time = jiffies;
2954 if (info->break_detected_cnt) {
2955 /* Detect if this character is a new valid char or the
2956 * last char in a break sequence: If LSBits are 0 and
2957 * MSBits are high AND the time is close to the
2958 * previous interrupt we should discard it.
2961 (curr_time - info->last_rx_active) * (1000000/HZ) +
2962 curr_time_u - info->last_rx_active_usec;
2963 if (elapsed_usec < 2*info->char_time_usec) {
2964 DEBUG_LOG(info->line, "FBRK %i\n", info->line);
2965 /* Report as BREAK (error) and let
2966 * receive_chars_dma() handle it
2968 info->errorcode = ERRCODE_SET_BREAK;
2970 DEBUG_LOG(info->line, "Not end of BRK (V)%i\n", info->line);
2972 DEBUG_LOG(info->line, "num brk %i\n", info->break_detected_cnt);
2975 #ifdef SERIAL_DEBUG_INTR
2976 printk("** OK, disabling ser_interrupts\n");
2978 e100_disable_serial_data_irq(info);
2979 DINTR2(DEBUG_LOG(info->line, "ser_rx OK %d\n", info->line));
2980 info->break_detected_cnt = 0;
2982 PROCSTAT(ser_stat[info->line].ser_ints_ok_cnt++);
2984 /* Restarting the DMA never hurts */
2985 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2986 START_FLUSH_FAST_TIMER(info, "ser_int");
2988 } /* handle_ser_rx_interrupt */
2990 extern _INLINE_ void handle_ser_tx_interrupt(struct e100_serial *info)
2992 unsigned long flags;
2995 unsigned char rstat;
2996 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar 0x%02X\n", info->x_char));
2997 save_flags(flags); cli();
2998 rstat = info->port[REG_STATUS];
2999 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
3001 info->port[REG_TR_DATA] = info->x_char;
3004 /* We must enable since it is disabled in ser_interrupt */
3005 e100_enable_serial_tx_ready_irq(info);
3006 restore_flags(flags);
3009 if (info->uses_dma_out) {
3010 unsigned char rstat;
3012 /* We only use normal tx interrupt when sending x_char */
3013 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar sent\n", 0));
3014 save_flags(flags); cli();
3015 rstat = info->port[REG_STATUS];
3016 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
3017 e100_disable_serial_tx_ready_irq(info);
3018 if (info->tty->stopped)
3020 /* Enable the DMA channel and tell it to continue */
3021 e100_enable_txdma_channel(info);
3022 /* Wait 12 cycles before doing the DMA command */
3023 for(i = 6; i > 0; i--)
3026 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, continue);
3027 restore_flags(flags);
3030 /* Normal char-by-char interrupt */
3031 if (info->xmit.head == info->xmit.tail
3032 || info->tty->stopped
3033 || info->tty->hw_stopped) {
3034 DFLOW(DEBUG_LOG(info->line, "tx_int: stopped %i\n", info->tty->stopped));
3035 e100_disable_serial_tx_ready_irq(info);
3036 info->tr_running = 0;
3039 DINTR2(DEBUG_LOG(info->line, "tx_int %c\n", info->xmit.buf[info->xmit.tail]));
3040 /* Send a byte, rs485 timing is critical so turn of ints */
3041 save_flags(flags); cli();
3042 info->port[REG_TR_DATA] = info->xmit.buf[info->xmit.tail];
3043 info->xmit.tail = (info->xmit.tail + 1) & (SERIAL_XMIT_SIZE-1);
3045 if (info->xmit.head == info->xmit.tail) {
3046 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
3047 if (info->rs485.enabled) {
3048 /* Set a short timer to toggle RTS */
3049 start_one_shot_timer(&fast_timers_rs485[info->line],
3050 rs485_toggle_rts_timer_function,
3051 (unsigned long)info,
3052 info->char_time_usec*2,
3056 info->last_tx_active_usec = GET_JIFFIES_USEC();
3057 info->last_tx_active = jiffies;
3058 e100_disable_serial_tx_ready_irq(info);
3059 info->tr_running = 0;
3060 DFLOW(DEBUG_LOG(info->line, "tx_int: stop2\n", 0));
3062 /* We must enable since it is disabled in ser_interrupt */
3063 e100_enable_serial_tx_ready_irq(info);
3065 restore_flags(flags);
3067 if (CIRC_CNT(info->xmit.head,
3069 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
3070 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
3072 } /* handle_ser_tx_interrupt */
3074 /* result of time measurements:
3075 * RX duration 54-60 us when doing something, otherwise 6-9 us
3076 * ser_int duration: just sending: 8-15 us normally, up to 73 us
3079 ser_interrupt(int irq, void *dev_id, struct pt_regs *regs)
3081 static volatile int tx_started = 0;
3082 struct e100_serial *info;
3084 unsigned long flags;
3085 unsigned long irq_mask1_rd;
3086 unsigned long data_mask = (1 << (8+2*0)); /* ser0 data_avail */
3088 static volatile unsigned long reentered_ready_mask = 0;
3090 save_flags(flags); cli();
3091 irq_mask1_rd = *R_IRQ_MASK1_RD;
3092 /* First handle all rx interrupts with ints disabled */
3094 irq_mask1_rd &= e100_ser_int_mask;
3095 for (i = 0; i < NR_PORTS; i++) {
3096 /* Which line caused the data irq? */
3097 if (irq_mask1_rd & data_mask) {
3099 handle_ser_rx_interrupt(info);
3104 /* Handle tx interrupts with interrupts enabled so we
3105 * can take care of new data interrupts while transmitting
3106 * We protect the tx part with the tx_started flag.
3107 * We disable the tr_ready interrupts we are about to handle and
3108 * unblock the serial interrupt so new serial interrupts may come.
3110 * If we get a new interrupt:
3111 * - it migth be due to synchronous serial ports.
3112 * - serial irq will be blocked by general irq handler.
3113 * - async data will be handled above (sync will be ignored).
3114 * - tx_started flag will prevent us from trying to send again and
3115 * we will exit fast - no need to unblock serial irq.
3116 * - Next (sync) serial interrupt handler will be runned with
3117 * disabled interrupt due to restore_flags() at end of function,
3118 * so sync handler will not be preempted or reentered.
3121 unsigned long ready_mask;
3124 /* Only the tr_ready interrupts left */
3125 irq_mask1_rd &= (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
3126 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
3127 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
3128 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
3129 while (irq_mask1_rd) {
3130 /* Disable those we are about to handle */
3131 *R_IRQ_MASK1_CLR = irq_mask1_rd;
3132 /* Unblock the serial interrupt */
3133 *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set);
3136 ready_mask = (1 << (8+1+2*0)); /* ser0 tr_ready */
3138 for (i = 0; i < NR_PORTS; i++) {
3139 /* Which line caused the ready irq? */
3140 if (irq_mask1_rd & ready_mask) {
3142 handle_ser_tx_interrupt(info);
3147 /* handle_ser_tx_interrupt enables tr_ready interrupts */
3149 /* Handle reentered TX interrupt */
3150 irq_mask1_rd = reentered_ready_mask;
3155 unsigned long ready_mask;
3156 ready_mask = irq_mask1_rd & (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
3157 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
3158 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
3159 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
3161 reentered_ready_mask |= ready_mask;
3162 /* Disable those we are about to handle */
3163 *R_IRQ_MASK1_CLR = ready_mask;
3164 DFLOW(DEBUG_LOG(SERIAL_DEBUG_LINE, "ser_int reentered with TX %X\n", ready_mask));
3168 restore_flags(flags);
3169 return IRQ_RETVAL(handled);
3170 } /* ser_interrupt */
3174 * -------------------------------------------------------------------
3175 * Here ends the serial interrupt routines.
3176 * -------------------------------------------------------------------
3180 * This routine is used to handle the "bottom half" processing for the
3181 * serial driver, known also the "software interrupt" processing.
3182 * This processing is done at the kernel interrupt level, after the
3183 * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
3184 * is where time-consuming activities which can not be done in the
3185 * interrupt driver proper are done; the interrupt driver schedules
3186 * them using rs_sched_event(), and they get done here.
3189 do_softint(void *private_)
3191 struct e100_serial *info = (struct e100_serial *) private_;
3192 struct tty_struct *tty;
3198 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
3199 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
3200 tty->ldisc.write_wakeup)
3201 (tty->ldisc.write_wakeup)(tty);
3202 wake_up_interruptible(&tty->write_wait);
3207 startup(struct e100_serial * info)
3209 unsigned long flags;
3210 unsigned long xmit_page;
3213 xmit_page = get_zeroed_page(GFP_KERNEL);
3220 /* if it was already initialized, skip this */
3222 if (info->flags & ASYNC_INITIALIZED) {
3223 restore_flags(flags);
3224 free_page(xmit_page);
3229 free_page(xmit_page);
3231 info->xmit.buf = (unsigned char *) xmit_page;
3233 #ifdef SERIAL_DEBUG_OPEN
3234 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf);
3237 #ifdef CONFIG_SVINTO_SIM
3238 /* Bits and pieces collected from below. Better to have them
3239 in one ifdef:ed clause than to mix in a lot of ifdefs,
3242 clear_bit(TTY_IO_ERROR, &info->tty->flags);
3244 info->xmit.head = info->xmit.tail = 0;
3245 info->first_recv_buffer = info->last_recv_buffer = NULL;
3246 info->recv_cnt = info->max_recv_cnt = 0;
3248 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3249 info->rec_descr[i].buf = NULL;
3251 /* No real action in the simulator, but may set info important
3257 * Clear the FIFO buffers and disable them
3258 * (they will be reenabled in change_speed())
3262 * Reset the DMA channels and make sure their interrupts are cleared
3265 if (info->dma_in_enabled) {
3266 info->uses_dma_in = 1;
3267 e100_enable_rxdma_channel(info);
3269 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3271 /* Wait until reset cycle is complete */
3272 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
3273 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
3275 /* Make sure the irqs are cleared */
3276 *info->iclrintradr =
3277 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
3278 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
3280 e100_disable_rxdma_channel(info);
3283 if (info->dma_out_enabled) {
3284 info->uses_dma_out = 1;
3285 e100_enable_txdma_channel(info);
3286 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3288 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) ==
3289 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
3291 /* Make sure the irqs are cleared */
3292 *info->oclrintradr =
3293 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
3294 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
3296 e100_disable_txdma_channel(info);
3300 clear_bit(TTY_IO_ERROR, &info->tty->flags);
3302 info->xmit.head = info->xmit.tail = 0;
3303 info->first_recv_buffer = info->last_recv_buffer = NULL;
3304 info->recv_cnt = info->max_recv_cnt = 0;
3306 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3307 info->rec_descr[i].buf = 0;
3310 * and set the speed and other flags of the serial port
3311 * this will start the rx/tx as well
3313 #ifdef SERIAL_HANDLE_EARLY_ERRORS
3314 e100_enable_serial_data_irq(info);
3318 /* dummy read to reset any serial errors */
3320 (void)info->port[REG_DATA];
3322 /* enable the interrupts */
3323 if (info->uses_dma_out)
3324 e100_enable_txdma_irq(info);
3326 e100_enable_rx_irq(info);
3328 info->tr_running = 0; /* to be sure we don't lock up the transmitter */
3330 /* setup the dma input descriptor and start dma */
3332 start_receive(info);
3334 /* for safety, make sure the descriptors last result is 0 bytes written */
3336 info->tr_descr.sw_len = 0;
3337 info->tr_descr.hw_len = 0;
3338 info->tr_descr.status = 0;
3340 /* enable RTS/DTR last */
3345 #endif /* CONFIG_SVINTO_SIM */
3347 info->flags |= ASYNC_INITIALIZED;
3349 restore_flags(flags);
3354 * This routine will shutdown a serial port; interrupts are disabled, and
3355 * DTR is dropped if the hangup on close termio flag is on.
3358 shutdown(struct e100_serial * info)
3360 unsigned long flags;
3361 struct etrax_dma_descr *descr = info->rec_descr;
3362 struct etrax_recv_buffer *buffer;
3365 #ifndef CONFIG_SVINTO_SIM
3366 /* shut down the transmitter and receiver */
3367 DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line));
3368 e100_disable_rx(info);
3369 info->port[REG_TR_CTRL] = (info->tx_ctrl &= ~0x40);
3371 /* disable interrupts, reset dma channels */
3372 if (info->uses_dma_in) {
3373 e100_disable_rxdma_irq(info);
3374 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3375 info->uses_dma_in = 0;
3377 e100_disable_serial_data_irq(info);
3380 if (info->uses_dma_out) {
3381 e100_disable_txdma_irq(info);
3382 info->tr_running = 0;
3383 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3384 info->uses_dma_out = 0;
3386 e100_disable_serial_tx_ready_irq(info);
3387 info->tr_running = 0;
3390 #endif /* CONFIG_SVINTO_SIM */
3392 if (!(info->flags & ASYNC_INITIALIZED))
3395 #ifdef SERIAL_DEBUG_OPEN
3396 printk("Shutting down serial port %d (irq %d)....\n", info->line,
3401 cli(); /* Disable interrupts */
3403 if (info->xmit.buf) {
3404 free_page((unsigned long)info->xmit.buf);
3405 info->xmit.buf = NULL;
3408 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3410 buffer = phys_to_virt(descr[i].buf) - sizeof *buffer;
3415 if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) {
3416 /* hang up DTR and RTS if HUPCL is enabled */
3418 e100_rts(info, 0); /* could check CRTSCTS before doing this */
3422 set_bit(TTY_IO_ERROR, &info->tty->flags);
3424 info->flags &= ~ASYNC_INITIALIZED;
3425 restore_flags(flags);
3429 /* change baud rate and other assorted parameters */
3432 change_speed(struct e100_serial *info)
3436 unsigned long flags;
3437 /* first some safety checks */
3439 if (!info->tty || !info->tty->termios)
3444 cflag = info->tty->termios->c_cflag;
3446 /* possibly, the tx/rx should be disabled first to do this safely */
3448 /* change baud-rate and write it to the hardware */
3449 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) {
3450 /* Special baudrate */
3451 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3452 unsigned long alt_source =
3453 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3454 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3455 /* R_ALT_SER_BAUDRATE selects the source */
3456 DBAUD(printk("Custom baudrate: baud_base/divisor %lu/%i\n",
3457 (unsigned long)info->baud_base, info->custom_divisor));
3458 if (info->baud_base == SERIAL_PRESCALE_BASE) {
3459 /* 0, 2-65535 (0=65536) */
3460 u16 divisor = info->custom_divisor;
3461 /* R_SERIAL_PRESCALE (upper 16 bits of R_CLOCK_PRESCALE) */
3462 /* baudrate is 3.125MHz/custom_divisor */
3464 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, prescale) |
3465 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, prescale);
3467 DBAUD(printk("Writing SERIAL_PRESCALE: divisor %i\n", divisor));
3468 *R_SERIAL_PRESCALE = divisor;
3469 info->baud = SERIAL_PRESCALE_BASE/divisor;
3471 #ifdef CONFIG_ETRAX_EXTERN_PB6CLK_ENABLED
3472 else if ((info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8 &&
3473 info->custom_divisor == 1) ||
3474 (info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ &&
3475 info->custom_divisor == 8)) {
3476 /* ext_clk selected */
3478 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, extern) |
3479 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, extern);
3480 DBAUD(printk("using external baudrate: %lu\n", CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8));
3481 info->baud = CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8;
3487 /* Bad baudbase, we don't support using timer0
3490 printk(KERN_WARNING "Bad baud_base/custom_divisor: %lu/%i\n",
3491 (unsigned long)info->baud_base, info->custom_divisor);
3493 r_alt_ser_baudrate_shadow &= ~mask;
3494 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3495 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3497 /* Normal baudrate */
3498 /* Make sure we use normal baudrate */
3499 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3500 unsigned long alt_source =
3501 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3502 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3503 r_alt_ser_baudrate_shadow &= ~mask;
3504 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3505 #ifndef CONFIG_SVINTO_SIM
3506 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3507 #endif /* CONFIG_SVINTO_SIM */
3509 info->baud = cflag_to_baud(cflag);
3510 #ifndef CONFIG_SVINTO_SIM
3511 info->port[REG_BAUD] = cflag_to_etrax_baud(cflag);
3512 #endif /* CONFIG_SVINTO_SIM */
3515 #ifndef CONFIG_SVINTO_SIM
3516 /* start with default settings and then fill in changes */
3519 /* 8 bit, no/even parity */
3520 info->rx_ctrl &= ~(IO_MASK(R_SERIAL0_REC_CTRL, rec_bitnr) |
3521 IO_MASK(R_SERIAL0_REC_CTRL, rec_par_en) |
3522 IO_MASK(R_SERIAL0_REC_CTRL, rec_par));
3524 /* 8 bit, no/even parity, 1 stop bit, no cts */
3525 info->tx_ctrl &= ~(IO_MASK(R_SERIAL0_TR_CTRL, tr_bitnr) |
3526 IO_MASK(R_SERIAL0_TR_CTRL, tr_par_en) |
3527 IO_MASK(R_SERIAL0_TR_CTRL, tr_par) |
3528 IO_MASK(R_SERIAL0_TR_CTRL, stop_bits) |
3529 IO_MASK(R_SERIAL0_TR_CTRL, auto_cts));
3531 if ((cflag & CSIZE) == CS7) {
3532 /* set 7 bit mode */
3533 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit);
3534 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit);
3537 if (cflag & CSTOPB) {
3538 /* set 2 stop bit mode */
3539 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, two_bits);
3542 if (cflag & PARENB) {
3544 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable);
3545 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable);
3548 if (cflag & CMSPAR) {
3549 /* enable stick parity, PARODD mean Mark which matches ETRAX */
3550 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, stick);
3551 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_stick_par, stick);
3553 if (cflag & PARODD) {
3554 /* set odd parity (or Mark if CMSPAR) */
3555 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd);
3556 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd);
3559 if (cflag & CRTSCTS) {
3560 /* enable automatic CTS handling */
3561 DFLOW(DEBUG_LOG(info->line, "FLOW auto_cts enabled\n", 0));
3562 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, active);
3565 /* make sure the tx and rx are enabled */
3567 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable);
3568 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable);
3570 /* actually write the control regs to the hardware */
3572 info->port[REG_TR_CTRL] = info->tx_ctrl;
3573 info->port[REG_REC_CTRL] = info->rx_ctrl;
3574 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
3575 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
3576 if (info->tty->termios->c_iflag & IXON ) {
3577 DFLOW(DEBUG_LOG(info->line, "FLOW XOFF enabled 0x%02X\n", STOP_CHAR(info->tty)));
3578 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
3581 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
3582 restore_flags(flags);
3583 #endif /* !CONFIG_SVINTO_SIM */
3585 update_char_time(info);
3587 } /* change_speed */
3589 /* start transmitting chars NOW */
3592 rs_flush_chars(struct tty_struct *tty)
3594 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3595 unsigned long flags;
3597 if (info->tr_running ||
3598 info->xmit.head == info->xmit.tail ||
3604 #ifdef SERIAL_DEBUG_FLOW
3605 printk("rs_flush_chars\n");
3608 /* this protection might not exactly be necessary here */
3612 start_transmit(info);
3613 restore_flags(flags);
3617 rs_raw_write(struct tty_struct * tty, int from_user,
3618 const unsigned char *buf, int count)
3621 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3622 unsigned long flags;
3624 /* first some sanity checks */
3626 if (!tty || !info->xmit.buf || !tmp_buf)
3629 #ifdef SERIAL_DEBUG_DATA
3630 if (info->line == SERIAL_DEBUG_LINE)
3631 printk("rs_raw_write (%d), status %d\n",
3632 count, info->port[REG_STATUS]);
3635 #ifdef CONFIG_SVINTO_SIM
3636 /* Really simple. The output is here and now. */
3637 SIMCOUT(buf, count);
3641 DFLOW(DEBUG_LOG(info->line, "write count %i ", count));
3642 DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty)));
3645 /* the cli/restore_flags pairs below are needed because the
3646 * DMA interrupt handler moves the info->xmit values. the memcpy
3647 * needs to be in the critical region unfortunately, because we
3648 * need to read xmit values, memcpy, write xmit values in one
3649 * atomic operation... this could perhaps be avoided by more clever
3656 c = CIRC_SPACE_TO_END(info->xmit.head,
3664 c -= copy_from_user(tmp_buf, buf, c);
3671 c1 = CIRC_SPACE_TO_END(info->xmit.head,
3676 memcpy(info->xmit.buf + info->xmit.head, tmp_buf, c);
3677 info->xmit.head = ((info->xmit.head + c) &
3678 (SERIAL_XMIT_SIZE-1));
3679 restore_flags(flags);
3688 c = CIRC_SPACE_TO_END(info->xmit.head,
3697 memcpy(info->xmit.buf + info->xmit.head, buf, c);
3698 info->xmit.head = (info->xmit.head + c) &
3699 (SERIAL_XMIT_SIZE-1);
3704 restore_flags(flags);
3707 /* enable transmitter if not running, unless the tty is stopped
3708 * this does not need IRQ protection since if tr_running == 0
3709 * the IRQ's are not running anyway for this port.
3711 DFLOW(DEBUG_LOG(info->line, "write ret %i\n", ret));
3713 if (info->xmit.head != info->xmit.tail &&
3716 !info->tr_running) {
3717 start_transmit(info);
3721 } /* raw_raw_write() */
3724 rs_write(struct tty_struct * tty, int from_user,
3725 const unsigned char *buf, int count)
3727 #if defined(CONFIG_ETRAX_RS485)
3728 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3730 if (info->rs485.enabled)
3732 /* If we are in RS-485 mode, we need to toggle RTS and disable
3733 * the receiver before initiating a DMA transfer
3735 #ifdef CONFIG_ETRAX_FAST_TIMER
3736 /* Abort any started timer */
3737 fast_timers_rs485[info->line].function = NULL;
3738 del_fast_timer(&fast_timers_rs485[info->line]);
3740 e100_rts(info, info->rs485.rts_on_send);
3741 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3742 e100_disable_rx(info);
3743 e100_enable_rx_irq(info);
3746 if (info->rs485.delay_rts_before_send > 0) {
3747 set_current_state(TASK_INTERRUPTIBLE);
3748 schedule_timeout((info->rs485.delay_rts_before_send * HZ)/1000);
3751 #endif /* CONFIG_ETRAX_RS485 */
3753 count = rs_raw_write(tty, from_user, buf, count);
3755 #if defined(CONFIG_ETRAX_RS485)
3756 if (info->rs485.enabled)
3759 /* If we are in RS-485 mode the following has to be done:
3760 * wait until DMA is ready
3761 * wait on transmit shift register
3763 * enable the receiver
3766 /* Sleep until all sent */
3767 tty_wait_until_sent(tty, 0);
3768 #ifdef CONFIG_ETRAX_FAST_TIMER
3769 /* Now sleep a little more so that shift register is empty */
3770 schedule_usleep(info->char_time_usec * 2);
3772 /* wait on transmit shift register */
3774 get_lsr_info(info, &val);
3775 }while (!(val & TIOCSER_TEMT));
3777 e100_rts(info, info->rs485.rts_after_sent);
3779 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3780 e100_enable_rx(info);
3781 e100_enable_rxdma_irq(info);
3784 #endif /* CONFIG_ETRAX_RS485 */
3790 /* how much space is available in the xmit buffer? */
3793 rs_write_room(struct tty_struct *tty)
3795 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3797 return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3800 /* How many chars are in the xmit buffer?
3801 * This does not include any chars in the transmitter FIFO.
3802 * Use wait_until_sent for waiting for FIFO drain.
3806 rs_chars_in_buffer(struct tty_struct *tty)
3808 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3810 return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3813 /* discard everything in the xmit buffer */
3816 rs_flush_buffer(struct tty_struct *tty)
3818 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3819 unsigned long flags;
3823 info->xmit.head = info->xmit.tail = 0;
3824 restore_flags(flags);
3826 wake_up_interruptible(&tty->write_wait);
3828 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
3829 tty->ldisc.write_wakeup)
3830 (tty->ldisc.write_wakeup)(tty);
3834 * This function is used to send a high-priority XON/XOFF character to
3837 * Since we use DMA we don't check for info->x_char in transmit_chars_dma(),
3838 * but we do it in handle_ser_tx_interrupt().
3839 * We disable DMA channel and enable tx ready interrupt and write the
3840 * character when possible.
3842 static void rs_send_xchar(struct tty_struct *tty, char ch)
3844 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3845 unsigned long flags;
3846 save_flags(flags); cli();
3847 if (info->uses_dma_out) {
3848 /* Put the DMA on hold and disable the channel */
3849 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, hold);
3850 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) !=
3851 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, hold));
3852 e100_disable_txdma_channel(info);
3855 /* Must make sure transmitter is not stopped before we can transmit */
3859 /* Enable manual transmit interrupt and send from there */
3860 DFLOW(DEBUG_LOG(info->line, "rs_send_xchar 0x%02X\n", ch));
3862 e100_enable_serial_tx_ready_irq(info);
3863 restore_flags(flags);
3867 * ------------------------------------------------------------
3870 * This routine is called by the upper-layer tty layer to signal that
3871 * incoming characters should be throttled.
3872 * ------------------------------------------------------------
3875 rs_throttle(struct tty_struct * tty)
3877 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3878 #ifdef SERIAL_DEBUG_THROTTLE
3881 printk("throttle %s: %lu....\n", tty_name(tty, buf),
3882 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3884 DFLOW(DEBUG_LOG(info->line,"rs_throttle %lu\n", tty->ldisc.chars_in_buffer(tty)));
3886 /* Do RTS before XOFF since XOFF might take some time */
3887 if (tty->termios->c_cflag & CRTSCTS) {
3888 /* Turn off RTS line */
3892 rs_send_xchar(tty, STOP_CHAR(tty));
3897 rs_unthrottle(struct tty_struct * tty)
3899 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3900 #ifdef SERIAL_DEBUG_THROTTLE
3903 printk("unthrottle %s: %lu....\n", tty_name(tty, buf),
3904 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3906 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle ldisc %d\n", tty->ldisc.chars_in_buffer(tty)));
3907 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle flip.count: %i\n", tty->flip.count));
3908 /* Do RTS before XOFF since XOFF might take some time */
3909 if (tty->termios->c_cflag & CRTSCTS) {
3910 /* Assert RTS line */
3918 rs_send_xchar(tty, START_CHAR(tty));
3924 * ------------------------------------------------------------
3925 * rs_ioctl() and friends
3926 * ------------------------------------------------------------
3930 get_serial_info(struct e100_serial * info,
3931 struct serial_struct * retinfo)
3933 struct serial_struct tmp;
3935 /* this is all probably wrong, there are a lot of fields
3936 * here that we don't have in e100_serial and maybe we
3937 * should set them to something else than 0.
3942 memset(&tmp, 0, sizeof(tmp));
3943 tmp.type = info->type;
3944 tmp.line = info->line;
3945 tmp.port = (int)info->port;
3946 tmp.irq = info->irq;
3947 tmp.flags = info->flags;
3948 tmp.baud_base = info->baud_base;
3949 tmp.close_delay = info->close_delay;
3950 tmp.closing_wait = info->closing_wait;
3951 tmp.custom_divisor = info->custom_divisor;
3952 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
3958 set_serial_info(struct e100_serial *info,
3959 struct serial_struct *new_info)
3961 struct serial_struct new_serial;
3962 struct e100_serial old_info;
3965 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
3970 if (!capable(CAP_SYS_ADMIN)) {
3971 if ((new_serial.type != info->type) ||
3972 (new_serial.close_delay != info->close_delay) ||
3973 ((new_serial.flags & ~ASYNC_USR_MASK) !=
3974 (info->flags & ~ASYNC_USR_MASK)))
3976 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
3977 (new_serial.flags & ASYNC_USR_MASK));
3978 goto check_and_exit;
3981 if (info->count > 1)
3985 * OK, past this point, all the error checking has been done.
3986 * At this point, we start making changes.....
3989 info->baud_base = new_serial.baud_base;
3990 info->flags = ((info->flags & ~ASYNC_FLAGS) |
3991 (new_serial.flags & ASYNC_FLAGS));
3992 info->custom_divisor = new_serial.custom_divisor;
3993 info->type = new_serial.type;
3994 info->close_delay = new_serial.close_delay;
3995 info->closing_wait = new_serial.closing_wait;
3996 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
3999 if (info->flags & ASYNC_INITIALIZED) {
4002 retval = startup(info);
4007 * get_lsr_info - get line status register info
4009 * Purpose: Let user call ioctl() to get info when the UART physically
4010 * is emptied. On bus types like RS485, the transmitter must
4011 * release the bus after transmitting. This must be done when
4012 * the transmit shift register is empty, not be done when the
4013 * transmit holding register is empty. This functionality
4014 * allows an RS485 driver to be written in user space.
4017 get_lsr_info(struct e100_serial * info, unsigned int *value)
4019 unsigned int result = TIOCSER_TEMT;
4020 #ifndef CONFIG_SVINTO_SIM
4021 unsigned long curr_time = jiffies;
4022 unsigned long curr_time_usec = GET_JIFFIES_USEC();
4023 unsigned long elapsed_usec =
4024 (curr_time - info->last_tx_active) * 1000000/HZ +
4025 curr_time_usec - info->last_tx_active_usec;
4027 if (info->xmit.head != info->xmit.tail ||
4028 elapsed_usec < 2*info->char_time_usec) {
4033 if (copy_to_user(value, &result, sizeof(int)))
4038 #ifdef SERIAL_DEBUG_IO
4045 const struct state_str control_state_str[] = {
4046 {TIOCM_DTR, "DTR" },
4050 {TIOCM_CTS, "CTS" },
4053 {TIOCM_DSR, "DSR" },
4057 char *get_control_state_str(int MLines, char *s)
4062 while (control_state_str[i].str != NULL) {
4063 if (MLines & control_state_str[i].state) {
4067 strcat(s, control_state_str[i].str);
4076 get_modem_info(struct e100_serial * info, unsigned int *value)
4078 unsigned int result;
4079 /* Polarity isn't verified */
4080 #if 0 /*def SERIAL_DEBUG_IO */
4082 printk("get_modem_info: RTS: %i DTR: %i CD: %i RI: %i DSR: %i CTS: %i\n",
4088 E100_CTS_GET(info));
4092 (!E100_RTS_GET(info) ? TIOCM_RTS : 0)
4093 | (!E100_DTR_GET(info) ? TIOCM_DTR : 0)
4094 | (!E100_RI_GET(info) ? TIOCM_RNG : 0)
4095 | (!E100_DSR_GET(info) ? TIOCM_DSR : 0)
4096 | (!E100_CD_GET(info) ? TIOCM_CAR : 0)
4097 | (!E100_CTS_GET(info) ? TIOCM_CTS : 0);
4099 #ifdef SERIAL_DEBUG_IO
4100 printk("e100ser: modem state: %i 0x%08X\n", result, result);
4104 get_control_state_str(result, s);
4105 printk("state: %s\n", s);
4108 if (copy_to_user(value, &result, sizeof(int)))
4115 set_modem_info(struct e100_serial * info, unsigned int cmd,
4116 unsigned int *value)
4120 if (copy_from_user(&arg, value, sizeof(int)))
4125 if (arg & TIOCM_RTS) {
4128 if (arg & TIOCM_DTR) {
4131 /* Handle FEMALE behaviour */
4132 if (arg & TIOCM_RI) {
4133 e100_ri_out(info, 1);
4135 if (arg & TIOCM_CD) {
4136 e100_cd_out(info, 1);
4140 if (arg & TIOCM_RTS) {
4143 if (arg & TIOCM_DTR) {
4146 /* Handle FEMALE behaviour */
4147 if (arg & TIOCM_RI) {
4148 e100_ri_out(info, 0);
4150 if (arg & TIOCM_CD) {
4151 e100_cd_out(info, 0);
4155 e100_rts(info, arg & TIOCM_RTS);
4156 e100_dtr(info, arg & TIOCM_DTR);
4157 /* Handle FEMALE behaviour */
4158 e100_ri_out(info, arg & TIOCM_RI);
4159 e100_cd_out(info, arg & TIOCM_CD);
4169 rs_break(struct tty_struct *tty, int break_state)
4171 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4172 unsigned long flags;
4179 if (break_state == -1) {
4180 /* Go to manual mode and set the txd pin to 0 */
4181 info->tx_ctrl &= 0x3F; /* Clear bit 7 (txd) and 6 (tr_enable) */
4183 info->tx_ctrl |= (0x80 | 0x40); /* Set bit 7 (txd) and 6 (tr_enable) */
4185 info->port[REG_TR_CTRL] = info->tx_ctrl;
4186 restore_flags(flags);
4190 rs_ioctl(struct tty_struct *tty, struct file * file,
4191 unsigned int cmd, unsigned long arg)
4193 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4195 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
4196 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
4197 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
4198 if (tty->flags & (1 << TTY_IO_ERROR))
4204 return get_modem_info(info, (unsigned int *) arg);
4208 return set_modem_info(info, cmd, (unsigned int *) arg);
4210 return get_serial_info(info,
4211 (struct serial_struct *) arg);
4213 return set_serial_info(info,
4214 (struct serial_struct *) arg);
4215 case TIOCSERGETLSR: /* Get line status register */
4216 return get_lsr_info(info, (unsigned int *) arg);
4218 case TIOCSERGSTRUCT:
4219 if (copy_to_user((struct e100_serial *) arg,
4220 info, sizeof(struct e100_serial)))
4224 #if defined(CONFIG_ETRAX_RS485)
4225 case TIOCSERSETRS485:
4227 struct rs485_control rs485ctrl;
4228 if (copy_from_user(&rs485ctrl, (struct rs485_control*)arg, sizeof(rs485ctrl)))
4231 return e100_enable_rs485(tty, &rs485ctrl);
4234 case TIOCSERWRRS485:
4236 struct rs485_write rs485wr;
4237 if (copy_from_user(&rs485wr, (struct rs485_write*)arg, sizeof(rs485wr)))
4240 return e100_write_rs485(tty, 1, rs485wr.outc, rs485wr.outc_size);
4245 return -ENOIOCTLCMD;
4251 rs_set_termios(struct tty_struct *tty, struct termios *old_termios)
4253 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
4255 if (tty->termios->c_cflag == old_termios->c_cflag)
4260 /* Handle turning off CRTSCTS */
4261 if ((old_termios->c_cflag & CRTSCTS) &&
4262 !(tty->termios->c_cflag & CRTSCTS)) {
4263 tty->hw_stopped = 0;
4269 /* In debugport.c - register a console write function that uses the normal
4272 typedef int (*debugport_write_function)(int i, const char *buf, unsigned int len);
4274 extern debugport_write_function debug_write_function;
4276 static int rs_debug_write_function(int i, const char *buf, unsigned int len)
4279 struct tty_struct *tty;
4280 static int recurse_cnt = 0;
4282 tty = rs_table[i].tty;
4284 unsigned long flags;
4285 if (recurse_cnt > 5) /* We skip this debug output */
4288 local_irq_save(flags);
4291 cnt = rs_write(tty, 0, buf, len);
4299 local_irq_restore(flags);
4306 * ------------------------------------------------------------
4309 * This routine is called when the serial port gets closed. First, we
4310 * wait for the last remaining data to be sent. Then, we unlink its
4311 * S structure from the interrupt chain if necessary, and we free
4312 * that IRQ if nothing is left in the chain.
4313 * ------------------------------------------------------------
4316 rs_close(struct tty_struct *tty, struct file * filp)
4318 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4319 unsigned long flags;
4324 /* interrupts are disabled for this entire function */
4329 if (tty_hung_up_p(filp)) {
4330 restore_flags(flags);
4334 #ifdef SERIAL_DEBUG_OPEN
4335 printk("[%d] rs_close ttyS%d, count = %d\n", current->pid,
4336 info->line, info->count);
4338 if ((tty->count == 1) && (info->count != 1)) {
4340 * Uh, oh. tty->count is 1, which means that the tty
4341 * structure will be freed. Info->count should always
4342 * be one in these conditions. If it's greater than
4343 * one, we've got real problems, since it means the
4344 * serial port won't be shutdown.
4347 "rs_close: bad serial port count; tty->count is 1, "
4348 "info->count is %d\n", info->count);
4351 if (--info->count < 0) {
4352 printk(KERN_CRIT "rs_close: bad serial port count for ttyS%d: %d\n",
4353 info->line, info->count);
4357 restore_flags(flags);
4360 info->flags |= ASYNC_CLOSING;
4362 * Save the termios structure, since this port may have
4363 * separate termios for callout and dialin.
4365 if (info->flags & ASYNC_NORMAL_ACTIVE)
4366 info->normal_termios = *tty->termios;
4368 * Now we wait for the transmit buffer to clear; and we notify
4369 * the line discipline to only process XON/XOFF characters.
4372 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
4373 tty_wait_until_sent(tty, info->closing_wait);
4375 * At this point we stop accepting input. To do this, we
4376 * disable the serial receiver and the DMA receive interrupt.
4378 #ifdef SERIAL_HANDLE_EARLY_ERRORS
4379 e100_disable_serial_data_irq(info);
4382 #ifndef CONFIG_SVINTO_SIM
4383 e100_disable_rx(info);
4384 e100_disable_rx_irq(info);
4386 if (info->flags & ASYNC_INITIALIZED) {
4388 * Before we drop DTR, make sure the UART transmitter
4389 * has completely drained; this is especially
4390 * important as we have a transmit FIFO!
4392 rs_wait_until_sent(tty, HZ);
4397 if (tty->driver->flush_buffer)
4398 tty->driver->flush_buffer(tty);
4399 if (tty->ldisc.flush_buffer)
4400 tty->ldisc.flush_buffer(tty);
4404 if (info->blocked_open) {
4405 if (info->close_delay) {
4406 set_current_state(TASK_INTERRUPTIBLE);
4407 schedule_timeout(info->close_delay);
4409 wake_up_interruptible(&info->open_wait);
4411 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
4412 wake_up_interruptible(&info->close_wait);
4413 restore_flags(flags);
4417 #if defined(CONFIG_ETRAX_RS485)
4418 if (info->rs485.enabled) {
4419 info->rs485.enabled = 0;
4420 #if defined(CONFIG_ETRAX_RS485_ON_PA)
4421 *R_PORT_PA_DATA = port_pa_data_shadow &= ~(1 << rs485_pa_bit);
4423 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
4424 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4425 rs485_port_g_bit, 0);
4427 #if defined(CONFIG_ETRAX_RS485_LTC1387)
4428 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4429 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 0);
4430 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4431 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 0);
4438 * rs_wait_until_sent() --- wait until the transmitter is empty
4440 static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
4442 unsigned long orig_jiffies;
4443 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
4444 unsigned long curr_time = jiffies;
4445 unsigned long curr_time_usec = GET_JIFFIES_USEC();
4447 (curr_time - info->last_tx_active) * (1000000/HZ) +
4448 curr_time_usec - info->last_tx_active_usec;
4451 * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO
4452 * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k)
4454 orig_jiffies = jiffies;
4455 while (info->xmit.head != info->xmit.tail || /* More in send queue */
4456 (*info->ostatusadr & 0x007f) || /* more in FIFO */
4457 (elapsed_usec < 2*info->char_time_usec)) {
4458 set_current_state(TASK_INTERRUPTIBLE);
4459 schedule_timeout(1);
4460 if (signal_pending(current))
4462 if (timeout && time_after(jiffies, orig_jiffies + timeout))
4464 curr_time = jiffies;
4465 curr_time_usec = GET_JIFFIES_USEC();
4467 (curr_time - info->last_tx_active) * (1000000/HZ) +
4468 curr_time_usec - info->last_tx_active_usec;
4470 set_current_state(TASK_RUNNING);
4474 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
4477 rs_hangup(struct tty_struct *tty)
4479 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4481 rs_flush_buffer(tty);
4485 info->flags &= ~ASYNC_NORMAL_ACTIVE;
4487 wake_up_interruptible(&info->open_wait);
4491 * ------------------------------------------------------------
4492 * rs_open() and friends
4493 * ------------------------------------------------------------
4496 block_til_ready(struct tty_struct *tty, struct file * filp,
4497 struct e100_serial *info)
4499 DECLARE_WAITQUEUE(wait, current);
4500 unsigned long flags;
4502 int do_clocal = 0, extra_count = 0;
4505 * If the device is in the middle of being closed, then block
4506 * until it's done, and then try again.
4508 if (tty_hung_up_p(filp) ||
4509 (info->flags & ASYNC_CLOSING)) {
4510 if (info->flags & ASYNC_CLOSING)
4511 interruptible_sleep_on(&info->close_wait);
4512 #ifdef SERIAL_DO_RESTART
4513 if (info->flags & ASYNC_HUP_NOTIFY)
4516 return -ERESTARTSYS;
4523 * If non-blocking mode is set, or the port is not enabled,
4524 * then make the check up front and then exit.
4526 if ((filp->f_flags & O_NONBLOCK) ||
4527 (tty->flags & (1 << TTY_IO_ERROR))) {
4528 info->flags |= ASYNC_NORMAL_ACTIVE;
4532 if (tty->termios->c_cflag & CLOCAL) {
4537 * Block waiting for the carrier detect and the line to become
4538 * free (i.e., not in use by the callout). While we are in
4539 * this loop, info->count is dropped by one, so that
4540 * rs_close() knows when to free things. We restore it upon
4541 * exit, either normal or abnormal.
4544 add_wait_queue(&info->open_wait, &wait);
4545 #ifdef SERIAL_DEBUG_OPEN
4546 printk("block_til_ready before block: ttyS%d, count = %d\n",
4547 info->line, info->count);
4551 if (!tty_hung_up_p(filp)) {
4555 restore_flags(flags);
4556 info->blocked_open++;
4560 /* assert RTS and DTR */
4563 restore_flags(flags);
4564 set_current_state(TASK_INTERRUPTIBLE);
4565 if (tty_hung_up_p(filp) ||
4566 !(info->flags & ASYNC_INITIALIZED)) {
4567 #ifdef SERIAL_DO_RESTART
4568 if (info->flags & ASYNC_HUP_NOTIFY)
4571 retval = -ERESTARTSYS;
4577 if (!(info->flags & ASYNC_CLOSING) && do_clocal)
4578 /* && (do_clocal || DCD_IS_ASSERTED) */
4580 if (signal_pending(current)) {
4581 retval = -ERESTARTSYS;
4584 #ifdef SERIAL_DEBUG_OPEN
4585 printk("block_til_ready blocking: ttyS%d, count = %d\n",
4586 info->line, info->count);
4590 set_current_state(TASK_RUNNING);
4591 remove_wait_queue(&info->open_wait, &wait);
4594 info->blocked_open--;
4595 #ifdef SERIAL_DEBUG_OPEN
4596 printk("block_til_ready after blocking: ttyS%d, count = %d\n",
4597 info->line, info->count);
4601 info->flags |= ASYNC_NORMAL_ACTIVE;
4606 * This routine is called whenever a serial port is opened.
4607 * It performs the serial-specific initialization for the tty structure.
4610 rs_open(struct tty_struct *tty, struct file * filp)
4612 struct e100_serial *info;
4616 /* find which port we want to open */
4620 if (line < 0 || line >= NR_PORTS)
4623 /* find the corresponding e100_serial struct in the table */
4624 info = rs_table + line;
4626 /* don't allow the opening of ports that are not enabled in the HW config */
4630 #ifdef SERIAL_DEBUG_OPEN
4631 printk("[%d] rs_open %s, count = %d\n", current->pid, tty->name,
4636 tty->driver_data = info;
4639 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
4642 page = get_zeroed_page(GFP_KERNEL);
4649 tmp_buf = (unsigned char *) page;
4653 * If the port is in the middle of closing, bail out now
4655 if (tty_hung_up_p(filp) ||
4656 (info->flags & ASYNC_CLOSING)) {
4657 if (info->flags & ASYNC_CLOSING)
4658 interruptible_sleep_on(&info->close_wait);
4659 #ifdef SERIAL_DO_RESTART
4660 return ((info->flags & ASYNC_HUP_NOTIFY) ?
4661 -EAGAIN : -ERESTARTSYS);
4668 * Start up the serial port
4671 retval = startup(info);
4675 retval = block_til_ready(tty, filp, info);
4677 #ifdef SERIAL_DEBUG_OPEN
4678 printk("rs_open returning after block_til_ready with %d\n",
4684 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
4685 *tty->termios = info->normal_termios;
4689 #ifdef SERIAL_DEBUG_OPEN
4690 printk("rs_open ttyS%d successful...\n", info->line);
4692 DLOG_INT_TRIG( log_int_pos = 0);
4694 DFLIP( if (info->line == SERIAL_DEBUG_LINE) {
4695 info->icount.rx = 0;
4702 * /proc fs routines....
4705 extern _INLINE_ int line_info(char *buf, struct e100_serial *info)
4711 ret = sprintf(buf, "%d: uart:E100 port:%lX irq:%d",
4712 info->line, (unsigned long)info->port, info->irq);
4714 if (!info->port || (info->type == PORT_UNKNOWN)) {
4715 ret += sprintf(buf+ret, "\n");
4721 if (!E100_RTS_GET(info))
4722 strcat(stat_buf, "|RTS");
4723 if (!E100_CTS_GET(info))
4724 strcat(stat_buf, "|CTS");
4725 if (!E100_DTR_GET(info))
4726 strcat(stat_buf, "|DTR");
4727 if (!E100_DSR_GET(info))
4728 strcat(stat_buf, "|DSR");
4729 if (!E100_CD_GET(info))
4730 strcat(stat_buf, "|CD");
4731 if (!E100_RI_GET(info))
4732 strcat(stat_buf, "|RI");
4734 ret += sprintf(buf+ret, " baud:%d", info->baud);
4736 ret += sprintf(buf+ret, " tx:%lu rx:%lu",
4737 (unsigned long)info->icount.tx,
4738 (unsigned long)info->icount.rx);
4739 tmp = CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
4741 ret += sprintf(buf+ret, " tx_pend:%lu/%lu",
4743 (unsigned long)SERIAL_XMIT_SIZE);
4746 ret += sprintf(buf+ret, " rx_pend:%lu/%lu",
4747 (unsigned long)info->recv_cnt,
4748 (unsigned long)info->max_recv_cnt);
4753 if (info->tty->stopped)
4754 ret += sprintf(buf+ret, " stopped:%i",
4755 (int)info->tty->stopped);
4756 if (info->tty->hw_stopped)
4757 ret += sprintf(buf+ret, " hw_stopped:%i",
4758 (int)info->tty->hw_stopped);
4762 unsigned char rstat = info->port[REG_STATUS];
4763 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) )
4764 ret += sprintf(buf+ret, " xoff_detect:1");
4772 if (info->icount.frame)
4773 ret += sprintf(buf+ret, " fe:%lu",
4774 (unsigned long)info->icount.frame);
4776 if (info->icount.parity)
4777 ret += sprintf(buf+ret, " pe:%lu",
4778 (unsigned long)info->icount.parity);
4780 if (info->icount.brk)
4781 ret += sprintf(buf+ret, " brk:%lu",
4782 (unsigned long)info->icount.brk);
4784 if (info->icount.overrun)
4785 ret += sprintf(buf+ret, " oe:%lu",
4786 (unsigned long)info->icount.overrun);
4789 * Last thing is the RS-232 status lines
4791 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
4795 int rs_read_proc(char *page, char **start, off_t off, int count,
4796 int *eof, void *data)
4801 len += sprintf(page, "serinfo:1.0 driver:%s\n",
4803 for (i = 0; i < NR_PORTS && len < 4000; i++) {
4804 if (!rs_table[i].enabled)
4806 l = line_info(page + len, &rs_table[i]);
4808 if (len+begin > off+count)
4810 if (len+begin < off) {
4815 #ifdef DEBUG_LOG_INCLUDED
4816 for (i = 0; i < debug_log_pos; i++) {
4817 len += sprintf(page + len, "%-4i %lu.%lu ", i, debug_log[i].time, timer_data_to_ns(debug_log[i].timer_data));
4818 len += sprintf(page + len, debug_log[i].string, debug_log[i].value);
4819 if (len+begin > off+count)
4821 if (len+begin < off) {
4826 len += sprintf(page + len, "debug_log %i/%i %li bytes\n",
4827 i, DEBUG_LOG_SIZE, begin+len);
4833 if (off >= len+begin)
4835 *start = page + (off-begin);
4836 return ((count < begin+len-off) ? count : begin+len-off);
4839 /* Finally, routines used to initialize the serial driver. */
4842 show_serial_version(void)
4845 "ETRAX 100LX serial-driver %s, (c) 2000-2004 Axis Communications AB\r\n",
4846 &serial_version[11]); /* "$Revision: x.yy" */
4849 /* rs_init inits the driver at boot (using the module_init chain) */
4851 static struct tty_operations rs_ops = {
4855 .flush_chars = rs_flush_chars,
4856 .write_room = rs_write_room,
4857 .chars_in_buffer = rs_chars_in_buffer,
4858 .flush_buffer = rs_flush_buffer,
4860 .throttle = rs_throttle,
4861 .unthrottle = rs_unthrottle,
4862 .set_termios = rs_set_termios,
4865 .hangup = rs_hangup,
4866 .break_ctl = rs_break,
4867 .send_xchar = rs_send_xchar,
4868 .wait_until_sent = rs_wait_until_sent,
4869 .read_proc = rs_read_proc,
4876 struct e100_serial *info;
4877 struct tty_driver *driver = alloc_tty_driver(NR_PORTS);
4882 show_serial_version();
4884 /* Setup the timed flush handler system */
4886 #if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
4887 init_timer(&flush_timer);
4888 flush_timer.function = timed_flush_handler;
4889 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
4892 /* Initialize the tty_driver structure */
4894 driver->driver_name = "serial";
4895 driver->name = "ttyS";
4896 driver->major = TTY_MAJOR;
4897 driver->minor_start = 64;
4898 driver->type = TTY_DRIVER_TYPE_SERIAL;
4899 driver->subtype = SERIAL_TYPE_NORMAL;
4900 driver->init_termios = tty_std_termios;
4901 driver->init_termios.c_cflag =
4902 B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */
4903 driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS;
4904 driver->termios = serial_termios;
4905 driver->termios_locked = serial_termios_locked;
4907 tty_set_operations(driver, &rs_ops);
4908 serial_driver = driver;
4909 if (tty_register_driver(driver))
4910 panic("Couldn't register serial driver\n");
4911 /* do some initializing for the separate ports */
4913 for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
4914 info->uses_dma_in = 0;
4915 info->uses_dma_out = 0;
4918 info->type = PORT_ETRAX;
4919 info->tr_running = 0;
4920 info->forced_eop = 0;
4921 info->baud_base = DEF_BAUD_BASE;
4922 info->custom_divisor = 0;
4924 info->close_delay = 5*HZ/10;
4925 info->closing_wait = 30*HZ;
4929 info->blocked_open = 0;
4930 info->normal_termios = driver->init_termios;
4931 init_waitqueue_head(&info->open_wait);
4932 init_waitqueue_head(&info->close_wait);
4933 info->xmit.buf = NULL;
4934 info->xmit.tail = info->xmit.head = 0;
4935 info->first_recv_buffer = info->last_recv_buffer = NULL;
4936 info->recv_cnt = info->max_recv_cnt = 0;
4937 info->last_tx_active_usec = 0;
4938 info->last_tx_active = 0;
4940 #if defined(CONFIG_ETRAX_RS485)
4941 /* Set sane defaults */
4942 info->rs485.rts_on_send = 0;
4943 info->rs485.rts_after_sent = 1;
4944 info->rs485.delay_rts_before_send = 0;
4945 info->rs485.enabled = 0;
4947 INIT_WORK(&info->work, do_softint, info);
4949 if (info->enabled) {
4950 printk(KERN_INFO "%s%d at 0x%x is a builtin UART with DMA\n",
4951 serial_driver->name, info->line, (unsigned int)info->port);
4954 #ifdef CONFIG_ETRAX_FAST_TIMER
4955 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
4956 memset(fast_timers, 0, sizeof(fast_timers));
4958 #ifdef CONFIG_ETRAX_RS485
4959 memset(fast_timers_rs485, 0, sizeof(fast_timers_rs485));
4964 #ifndef CONFIG_SVINTO_SIM
4965 /* Not needed in simulator. May only complicate stuff. */
4966 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
4968 if (request_irq(SERIAL_IRQ_NBR, ser_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial ", NULL))
4971 #ifdef CONFIG_ETRAX_SERIAL_PORT0
4972 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
4973 if (request_irq(SER0_DMA_TX_IRQ_NBR, tr_interrupt, SA_INTERRUPT, "serial 0 dma tr", NULL))
4976 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
4977 if (request_irq(SER0_DMA_RX_IRQ_NBR, rec_interrupt, SA_INTERRUPT, "serial 0 dma rec", NULL))
4982 #ifdef CONFIG_ETRAX_SERIAL_PORT1
4983 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
4984 if (request_irq(SER1_DMA_TX_IRQ_NBR, tr_interrupt, SA_INTERRUPT, "serial 1 dma tr", NULL))
4987 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
4988 if (request_irq(SER1_DMA_RX_IRQ_NBR, rec_interrupt, SA_INTERRUPT, "serial 1 dma rec", NULL))
4992 #ifdef CONFIG_ETRAX_SERIAL_PORT2
4993 /* DMA Shared with par0 (and SCSI0 and ATA) */
4994 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
4995 if (request_irq(SER2_DMA_TX_IRQ_NBR, tr_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 2 dma tr", NULL))
4998 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
4999 if (request_irq(SER2_DMA_RX_IRQ_NBR, rec_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 2 dma rec", NULL))
5003 #ifdef CONFIG_ETRAX_SERIAL_PORT3
5004 /* DMA Shared with par1 (and SCSI1 and Extern DMA 0) */
5005 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
5006 if (request_irq(SER3_DMA_TX_IRQ_NBR, tr_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 3 dma tr", NULL))
5009 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
5010 if (request_irq(SER3_DMA_RX_IRQ_NBR, rec_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 3 dma rec", NULL))
5015 #ifdef CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
5016 if (request_irq(TIMER1_IRQ_NBR, timeout_interrupt, SA_SHIRQ | SA_INTERRUPT,
5017 "fast serial dma timeout", NULL)) {
5018 printk(KERN_CRIT "err: timer1 irq\n");
5021 #endif /* CONFIG_SVINTO_SIM */
5022 debug_write_function = rs_debug_write_function;
5026 /* this makes sure that rs_init is called during kernel boot */
5028 module_init(rs_init);
5031 * register_serial and unregister_serial allows for serial ports to be
5032 * configured at run-time, to support PCMCIA modems.
5035 register_serial(struct serial_struct *req)
5040 void unregister_serial(int line)