1 /* $Id: serial.c,v 1.17 2003/07/04 08:27:37 starvik Exp $
3 * Serial port driver for the ETRAX 100LX chip
5 * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Axis Communications AB
7 * Many, many authors. Based once upon a time on serial.c for 16x50.
10 * Revision 1.17 2003/07/04 08:27:37 starvik
11 * Merge of Linux 2.5.74
13 * Revision 1.16 2003/06/13 10:05:19 johana
14 * Help the user to avoid trouble by:
15 * Forcing mixed mode for status/control lines if not all pins are used.
17 * Revision 1.15 2003/06/13 09:43:01 johana
18 * Merged in the following changes from os/linux/arch/cris/drivers/serial.c
19 * + some minor changes to reduce diff.
21 * Revision 1.49 2003/05/30 11:31:54 johana
22 * Merged in change-branch--serial9bit that adds CMSPAR support for sticky
25 * Revision 1.48 2003/05/30 11:03:57 johana
26 * Implemented rs_send_xchar() by disabling the DMA and writing manually.
27 * Added e100_disable_txdma_channel() and e100_enable_txdma_channel().
28 * Fixed rs_throttle() and rs_unthrottle() to properly call rs_send_xchar
29 * instead of setting info->x_char and check the CRTSCTS flag before
30 * controlling the rts pin.
32 * Revision 1.14 2003/04/09 08:12:44 pkj
33 * Corrected typo changes made upstream.
35 * Revision 1.13 2003/04/09 05:20:47 starvik
36 * Merge of Linux 2.5.67
38 * Revision 1.11 2003/01/22 06:48:37 starvik
39 * Fixed warnings issued by GCC 3.2.1
41 * Revision 1.9 2002/12/13 09:07:47 starvik
42 * Alert user that RX_TIMEOUT_TICKS==0 doesn't work
44 * Revision 1.8 2002/12/11 13:13:57 starvik
45 * Added arch/ to v10 specific includes
46 * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
48 * Revision 1.7 2002/12/06 07:13:57 starvik
49 * Corrected work queue stuff
50 * Removed CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
52 * Revision 1.6 2002/11/21 07:17:46 starvik
53 * Change static inline to extern inline where otherwise outlined with gcc-3.2
55 * Revision 1.5 2002/11/14 15:59:49 starvik
56 * Linux 2.5 port of the latest serial driver from 2.4. The work queue stuff
57 * probably doesn't work yet.
59 * Revision 1.42 2002/11/05 09:08:47 johana
60 * Better implementation of rs_stop() and rs_start() that uses the XOFF
61 * register to start/stop transmission.
62 * change_speed() also initilises XOFF register correctly so that
63 * auto_xoff is enabled when IXON flag is set by user.
64 * This gives fast XOFF response times.
66 * Revision 1.41 2002/11/04 18:40:57 johana
67 * Implemented rs_stop() and rs_start().
68 * Simple tests using hwtestserial indicates that this should be enough
71 * Revision 1.40 2002/10/14 05:33:18 starvik
72 * RS-485 uses fast timers even if SERIAL_FAST_TIMER is disabled
74 * Revision 1.39 2002/09/30 21:00:57 johana
75 * Support for CONFIG_ETRAX_SERx_DTR_RI_DSR_CD_MIXED where the status and
76 * control pins can be mixed between PA and PB.
77 * If no serial port uses MIXED old solution is used
78 * (saves a few bytes and cycles).
79 * control_pins struct uses masks instead of bit numbers.
80 * Corrected dummy values and polarity in line_info() so
81 * /proc/tty/driver/serial is now correct.
82 * (the E100_xxx_GET() macros is really active low - perhaps not obvious)
84 * Revision 1.38 2002/08/23 11:01:36 starvik
85 * Check that serial port is enabled in all interrupt handlers to avoid
86 * restarts of DMA channels not assigned to serial ports
88 * Revision 1.37 2002/08/13 13:02:37 bjornw
89 * Removed some warnings because of unused code
91 * Revision 1.36 2002/08/08 12:50:01 starvik
92 * Serial interrupt is shared with synchronous serial port driver
94 * Revision 1.35 2002/06/03 10:40:49 starvik
95 * Increased RS-485 RTS toggle timer to 2 characters
97 * Revision 1.34 2002/05/28 18:59:36 johana
98 * Whitespace and comment fixing to be more like etrax100ser.c 1.71.
100 * Revision 1.33 2002/05/28 17:55:43 johana
101 * RS-485 uses FAST_TIMER if enabled, and starts a short (one char time)
102 * timer from tranismit_chars (interrupt context).
103 * The timer toggles RTS in interrupt context when expired giving minimum
106 * Revision 1.32 2002/05/22 13:58:00 johana
107 * Renamed rs_write() to raw_write() and made it inline.
108 * New rs_write() handles RS-485 if configured and enabled
109 * (moved code from e100_write_rs485()).
110 * RS-485 ioctl's uses copy_from_user() instead of verify_area().
112 * Revision 1.31 2002/04/22 11:20:03 johana
113 * Updated copyright years.
115 * Revision 1.30 2002/04/22 09:39:12 johana
116 * RS-485 support compiles.
118 * Revision 1.29 2002/01/14 16:10:01 pkj
119 * Allocate the receive buffers dynamically. The static 4kB buffer was
120 * too small for the peaks. This means that we can get rid of the extra
121 * buffer and the copying to it. It also means we require less memory
122 * under normal operations, but can use more when needed (there is a
123 * cap at 64kB for safety reasons). If there is no memory available
124 * we panic(), and die a horrible death...
126 * Revision 1.28 2001/12/18 15:04:53 johana
127 * Cleaned up write_rs485() - now it works correctly without padding extra
129 * Added sane default initialisation of rs485.
130 * Added #ifdef around dummy variables.
132 * Revision 1.27 2001/11/29 17:00:41 pkj
133 * 2kB seems to be too small a buffer when using 921600 bps,
134 * so increase it to 4kB (this was already done for the elinux
135 * version of the serial driver).
137 * Revision 1.26 2001/11/19 14:20:41 pkj
138 * Minor changes to comments and unused code.
140 * Revision 1.25 2001/11/12 20:03:43 pkj
141 * Fixed compiler warnings.
143 * Revision 1.24 2001/11/12 15:10:05 pkj
144 * Total redesign of the receiving part of the serial driver.
145 * Uses eight chained descriptors to write to a 4kB buffer.
146 * This data is then serialised into a 2kB buffer. From there it
147 * is copied into the TTY's flip buffers when they become available.
148 * A lot of copying, and the sizes of the buffers might need to be
149 * tweaked, but all in all it should work better than the previous
150 * version, without the need to modify the TTY code in any way.
151 * Also note that erroneous bytes are now correctly marked in the
152 * flag buffers (instead of always marking the first byte).
154 * Revision 1.23 2001/10/30 17:53:26 pkj
155 * * Set info->uses_dma to 0 when a port is closed.
156 * * Mark the timer1 interrupt as a fast one (SA_INTERRUPT).
157 * * Call start_flush_timer() in start_receive() if
158 * CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST is defined.
160 * Revision 1.22 2001/10/30 17:44:03 pkj
161 * Use %lu for received and transmitted counters in line_info().
163 * Revision 1.21 2001/10/30 17:40:34 pkj
164 * Clean-up. The only change to functionality is that
165 * CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS(=5) is used instead of
166 * MAX_FLUSH_TIME(=8).
168 * Revision 1.20 2001/10/30 15:24:49 johana
169 * Added char_time stuff from 2.0 driver.
171 * Revision 1.19 2001/10/30 15:23:03 johana
172 * Merged with 1.13.2 branch + fixed indentation
173 * and changed CONFIG_ETRAX100_XYS to CONFIG_ETRAX_XYZ
175 * Revision 1.18 2001/09/24 09:27:22 pkj
176 * Completed ext_baud_table[] in cflag_to_baud() and cflag_to_etrax_baud().
178 * Revision 1.17 2001/08/24 11:32:49 ronny
179 * More fixes for the CONFIG_ETRAX_SERIAL_PORT0 define.
181 * Revision 1.16 2001/08/24 07:56:22 ronny
182 * Added config ifdefs around ser0 irq requests.
184 * Revision 1.15 2001/08/16 09:10:31 bjarne
185 * serial.c - corrected the initialization of rs_table, the wrong defines
187 * Corrected a test in timed_flush_handler.
188 * Changed configured to enabled.
189 * serial.h - Changed configured to enabled.
191 * Revision 1.14 2001/08/15 07:31:23 bjarne
192 * Introduced two new members to the e100_serial struct.
193 * configured - Will be set to 1 if the port has been configured in .config
194 * uses_dma - Should be set to 1 if the port uses DMA. Currently it is set
196 * when a port is opened. This is used to limit the DMA interrupt
197 * routines to only manipulate DMA channels actually used by the
200 * Revision 1.13.2.2 2001/10/17 13:57:13 starvik
201 * Receiver was broken by the break fixes
203 * Revision 1.13.2.1 2001/07/20 13:57:39 ronny
204 * Merge with new stuff from etrax100ser.c. Works but haven't checked stuff
205 * like break handling.
207 * Revision 1.13 2001/05/09 12:40:31 johana
208 * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h
210 * Revision 1.12 2001/04/19 12:23:07 bjornw
211 * CONFIG_RS485 -> CONFIG_ETRAX_RS485
213 * Revision 1.11 2001/04/05 14:29:48 markusl
214 * Updated according to review remarks i.e.
215 * -Use correct types in port structure to avoid compiler warnings
216 * -Try to use IO_* macros whenever possible
217 * -Open should never return -EBUSY
219 * Revision 1.10 2001/03/05 13:14:07 bjornw
220 * Another spelling fix
222 * Revision 1.9 2001/02/23 13:46:38 bjornw
225 * Revision 1.8 2001/01/23 14:56:35 markusl
226 * Made use of ser1 optional
229 * Revision 1.7 2001/01/19 16:14:48 perf
230 * Added kernel options for serial ports 234.
231 * Changed option names from CONFIG_ETRAX100_XYZ to CONFIG_ETRAX_XYZ.
233 * Revision 1.6 2000/11/22 16:36:09 bjornw
234 * Please marketing by using the correct case when spelling Etrax.
236 * Revision 1.5 2000/11/21 16:43:37 bjornw
237 * Fixed so it compiles under CONFIG_SVINTO_SIM
239 * Revision 1.4 2000/11/15 17:34:12 bjornw
240 * Added a timeout timer for flushing input channels. The interrupt-based
241 * fast flush system should be easy to merge with this later (works the same
242 * way, only with an irq instead of a system timer_list)
244 * Revision 1.3 2000/11/13 17:19:57 bjornw
245 * * Incredibly, this almost complete rewrite of serial.c worked (at least
246 * for output) the first time.
248 * Items worth noticing:
250 * No Etrax100 port 1 workarounds (does only compile on 2.4 anyway now)
251 * RS485 is not ported (why can't it be done in userspace as on x86 ?)
252 * Statistics done through async_icount - if any more stats are needed,
253 * that's the place to put them or in an arch-dep version of it.
254 * timeout_interrupt and the other fast timeout stuff not ported yet
255 * There be dragons in this 3k+ line driver
257 * Revision 1.2 2000/11/10 16:50:28 bjornw
258 * First shot at a 2.4 port, does not compile totally yet
260 * Revision 1.1 2000/11/10 16:47:32 bjornw
261 * Added verbatim copy of rev 1.49 etrax100ser.c from elinux
263 * Revision 1.49 2000/10/30 15:47:14 tobiasa
264 * Changed version number.
266 * Revision 1.48 2000/10/25 11:02:43 johana
267 * Changed %ul to %lu in printf's
269 * Revision 1.47 2000/10/18 15:06:53 pkj
270 * Compile correctly with CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST and
271 * CONFIG_ETRAX_SERIAL_PROC_ENTRY together.
272 * Some clean-up of the /proc/serial file.
274 * Revision 1.46 2000/10/16 12:59:40 johana
275 * Added CONFIG_ETRAX_SERIAL_PROC_ENTRY for statistics and debug info.
277 * Revision 1.45 2000/10/13 17:10:59 pkj
278 * Do not flush DMAs while flipping TTY buffers.
280 * Revision 1.44 2000/10/13 16:34:29 pkj
281 * Added a delay in ser_interrupt() for 2.3ms when an error is detected.
282 * We do not know why this delay is required yet, but without it the
283 * irmaflash program does not work (this was the program that needed
284 * the ser_interrupt() to be needed in the first place). This should not
285 * affect normal use of the serial ports.
287 * Revision 1.43 2000/10/13 16:30:44 pkj
288 * New version of the fast flush of serial buffers code. This time
289 * it is localized to the serial driver and uses a fast timer to
292 * Revision 1.42 2000/10/13 14:54:26 bennyo
293 * Fix for switching RTS when using rs485
295 * Revision 1.41 2000/10/12 11:43:44 pkj
296 * Cleaned up a number of comments.
298 * Revision 1.40 2000/10/10 11:58:39 johana
299 * Made RS485 support generic for all ports.
300 * Toggle rts in interrupt if no delay wanted.
301 * WARNING: No true transmitter empty check??
302 * Set d_wait bit when sending data so interrupt is delayed until
303 * fifo flushed. (Fix tcdrain() problem)
305 * Revision 1.39 2000/10/04 16:08:02 bjornw
306 * * Use virt_to_phys etc. for DMA addresses
307 * * Removed CONFIG_FLUSH_DMA_FAST hacks
310 * Revision 1.38 2000/10/02 12:27:10 mattias
311 * * added variable used when using fast flush on serial dma.
312 * (CONFIG_FLUSH_DMA_FAST)
314 * Revision 1.37 2000/09/27 09:44:24 pkj
315 * Uncomment definition of SERIAL_HANDLE_EARLY_ERRORS.
317 * Revision 1.36 2000/09/20 13:12:52 johana
318 * Support for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS:
319 * Number of timer ticks between flush of receive fifo (1 tick = 10ms).
320 * Try 0-3 for low latency applications. Approx 5 for high load
321 * applications (e.g. PPP). Maybe this should be more adaptive some day...
323 * Revision 1.35 2000/09/20 10:36:08 johana
324 * Typo in get_lsr_info()
326 * Revision 1.34 2000/09/20 10:29:59 johana
327 * Let rs_chars_in_buffer() check fifo content as well.
328 * get_lsr_info() might work now (not tested).
329 * Easier to change the port to debug.
331 * Revision 1.33 2000/09/13 07:52:11 torbjore
334 * Revision 1.32 2000/08/31 14:45:37 bjornw
335 * After sending a break we need to reset the transmit DMA channel
337 * Revision 1.31 2000/06/21 12:13:29 johana
338 * Fixed wait for all chars sent when closing port.
339 * (Used to always take 1 second!)
340 * Added shadows for directions of status/ctrl signals.
342 * Revision 1.30 2000/05/29 16:27:55 bjornw
343 * Simulator ifdef moved a bit
345 * Revision 1.29 2000/05/09 09:40:30 mattias
346 * * Added description of dma registers used in timeout_interrupt
349 * Revision 1.28 2000/05/08 16:38:58 mattias
350 * * Bugfix for flushing fifo in timeout_interrupt
351 * Problem occurs when bluetooth stack waits for a small number of bytes
352 * containing an event acknowledging free buffers in bluetooth HW
353 * As before, data was stuck in fifo until more data came on uart and
354 * flushed it up to the stack.
356 * Revision 1.27 2000/05/02 09:52:28 jonasd
357 * Added fix for peculiar etrax behaviour when eop is forced on an empty
358 * fifo. This is used when flashing the IRMA chip. Disabled by default.
360 * Revision 1.26 2000/03/29 15:32:02 bjornw
363 * Revision 1.25 2000/02/16 16:59:36 bjornw
364 * * Receive DMA directly into the flip-buffer, eliminating an intermediary
365 * receive buffer and a memcpy. Will avoid some overruns.
366 * * Error message on debug port if an overrun or flip buffer overrun occurs.
367 * * Just use the first byte in the flag flip buffer for errors.
368 * * Check for timeout on the serial ports only each 5/100 s, not 1/100.
370 * Revision 1.24 2000/02/09 18:02:28 bjornw
371 * * Clear serial errors (overrun, framing, parity) correctly. Before, the
372 * receiver would get stuck if an error occurred and we did not restart
374 * * Cosmetics (indentation, some code made into inlines)
375 * * Some more debug options
376 * * Actually shut down the serial port (DMA irq, DMA reset, receiver stop)
377 * when the last open is closed. Corresponding fixes in startup().
378 * * rs_close() "tx FIFO wait" code moved into right place, bug & -> && fixed
379 * and make a special case out of port 1 (R_DMA_CHx_STATUS is broken for that)
380 * * e100_disable_rx/enable_rx just disables/enables the receiver, not RTS
382 * Revision 1.23 2000/01/24 17:46:19 johana
383 * Wait for flush of DMA/FIFO when closing port.
385 * Revision 1.22 2000/01/20 18:10:23 johana
386 * Added TIOCMGET ioctl to return modem status.
387 * Implemented modem status/control that works with the extra signals
388 * (DTR, DSR, RI,CD) as well.
389 * 3 different modes supported:
390 * ser0 on PB (Bundy), ser1 on PB (Lisa) and ser2 on PA (Bundy)
391 * Fixed DEF_TX value that caused the serial transmitter pin (txd) to go to 0 when
392 * closing the last filehandle, NASTY!.
393 * Added break generation, not tested though!
394 * Use SA_SHIRQ when request_irq() for ser2 and ser3 (shared with) par0 and par1.
395 * You can't use them at the same time (yet..), but you can hopefully switch
396 * between ser2/par0, ser3/par1 with the same kernel config.
397 * Replaced some magic constants with defines
402 static char *serial_version = "$Revision: 1.17 $";
404 #include <linux/config.h>
405 #include <linux/version.h>
407 #include <linux/types.h>
408 #include <linux/errno.h>
409 #include <linux/signal.h>
410 #include <linux/sched.h>
411 #include <linux/timer.h>
412 #include <linux/interrupt.h>
413 #include <linux/tty.h>
414 #include <linux/tty_flip.h>
415 #include <linux/major.h>
416 #include <linux/string.h>
417 #include <linux/fcntl.h>
418 #include <linux/mm.h>
419 #include <linux/slab.h>
420 #include <linux/init.h>
421 #include <asm/uaccess.h>
422 #include <linux/kernel.h>
426 #include <asm/system.h>
427 #include <asm/segment.h>
428 #include <asm/bitops.h>
429 #include <linux/delay.h>
431 #include <asm/arch/svinto.h>
433 /* non-arch dependent serial structures are in linux/serial.h */
434 #include <linux/serial.h>
435 /* while we keep our own stuff (struct e100_serial) in a local .h file */
437 #include <asm/fasttimer.h>
439 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
440 #ifndef CONFIG_ETRAX_FAST_TIMER
441 #error "Enable FAST_TIMER to use SERIAL_FAST_TIMER"
445 #if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \
446 (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0)
447 #error "RX_TIMEOUT_TICKS == 0 not allowed, use 1"
451 * All of the compatibilty code so we can compile serial.c against
452 * older kernels is hidden in serial_compat.h
454 #if defined(LOCAL_HEADERS)
455 #include "serial_compat.h"
458 #define _INLINE_ inline
460 struct tty_driver *serial_driver;
462 /* serial subtype definitions */
463 #ifndef SERIAL_TYPE_NORMAL
464 #define SERIAL_TYPE_NORMAL 1
467 /* number of characters left in xmit buffer before we ask for more */
468 #define WAKEUP_CHARS 256
470 //#define SERIAL_DEBUG_INTR
471 //#define SERIAL_DEBUG_OPEN
472 //#define SERIAL_DEBUG_FLOW
473 //#define SERIAL_DEBUG_DATA
474 //#define SERIAL_DEBUG_THROTTLE
475 //#define SERIAL_DEBUG_IO /* Debug for Extra control and status pins */
476 #define SERIAL_DEBUG_LINE 0 /* What serport we want to debug */
478 /* Enable this to use serial interrupts to handle when you
479 expect the first received event on the serial port to
480 be an error, break or similar. Used to be able to flash IRMA
482 #define SERIAL_HANDLE_EARLY_ERRORS
484 #define TTY_THROTTLE_LIMIT (TTY_FLIPBUF_SIZE/10)
486 #define SERIAL_DESCR_BUF_SIZE 256
488 /* Add an x here to log a lot of timer stuff */
491 #define DEBUG_LOG(line, string, value)
493 #ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
494 /* Default number of timer ticks before flushing rx fifo
495 * When using "little data, low latency applications: use 0
496 * When using "much data applications (PPP)" use ~5
498 #define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5
501 static void change_speed(struct e100_serial *info);
502 static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
503 static int rs_write(struct tty_struct * tty, int from_user,
504 const unsigned char *buf, int count);
505 static inline int raw_write(struct tty_struct * tty, int from_user,
506 const unsigned char *buf, int count);
507 #ifdef CONFIG_ETRAX_RS485
508 static int e100_write_rs485(struct tty_struct * tty, int from_user,
509 const unsigned char *buf, int count);
511 static int get_lsr_info(struct e100_serial * info, unsigned int *value);
514 #define DEF_BAUD 0x99 /* 115.2 kbit/s */
515 #define STD_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
516 #define DEF_RX 0x20 /* or SERIAL_CTRL_W >> 8 */
517 /* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */
518 #define DEF_TX 0x80 /* or SERIAL_CTRL_B */
520 /* offsets from R_SERIALx_CTRL */
523 #define REG_TR_DATA 0
525 #define REG_TR_CTRL 1
526 #define REG_REC_CTRL 2
528 #define REG_XOFF 4 /* this is a 32 bit register */
530 /* The bitfields are the same for all serial ports */
531 #define SER_RXD_MASK IO_MASK(R_SERIAL0_STATUS, rxd)
532 #define SER_DATA_AVAIL_MASK IO_MASK(R_SERIAL0_STATUS, data_avail)
533 #define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err)
534 #define SER_PAR_ERR_MASK IO_MASK(R_SERIAL0_STATUS, par_err)
535 #define SER_OVERRUN_MASK IO_MASK(R_SERIAL0_STATUS, overrun)
537 #define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK)
539 /* Values for info->errorcode */
540 #define ERRCODE_SET_BREAK (TTY_BREAK)
541 #define ERRCODE_INSERT 0x100
542 #define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK)
544 #define FORCE_EOP(info) *R_SET_EOP = 1U << info->iseteop;
547 * General note regarding the use of IO_* macros in this file:
549 * We will use the bits defined for DMA channel 6 when using various
550 * IO_* macros (e.g. IO_STATE, IO_MASK, IO_EXTRACT) and _assume_ they are
551 * the same for all channels (which of course they are).
553 * We will also use the bits defined for serial port 0 when writing commands
554 * to the different ports, as these bits too are the same for all ports.
558 /* this is the data for the four serial ports in the etrax100 */
559 /* DMA2(ser2), DMA4(ser3), DMA6(ser0) or DMA8(ser1) */
560 /* R_DMA_CHx_CLR_INTR, R_DMA_CHx_FIRST, R_DMA_CHx_CMD */
562 static struct e100_serial rs_table[] = {
563 { DEF_BAUD, (unsigned char *)R_SERIAL0_CTRL, 1U << 12, /* uses DMA 6 and 7 */
564 R_DMA_CH6_CLR_INTR, R_DMA_CH6_FIRST, R_DMA_CH6_CMD,
565 R_DMA_CH6_STATUS, R_DMA_CH6_HWSW, R_DMA_CH6_DESCR,
566 R_DMA_CH7_CLR_INTR, R_DMA_CH7_FIRST, R_DMA_CH7_CMD,
567 R_DMA_CH7_STATUS, R_DMA_CH7_HWSW, R_DMA_CH7_DESCR,
568 STD_FLAGS, DEF_RX, DEF_TX, 2,
569 #ifdef CONFIG_ETRAX_SERIAL_PORT0
575 #ifndef CONFIG_SVINTO_SIM
576 { DEF_BAUD, (unsigned char *)R_SERIAL1_CTRL, 1U << 16, /* uses DMA 8 and 9 */
577 R_DMA_CH8_CLR_INTR, R_DMA_CH8_FIRST, R_DMA_CH8_CMD,
578 R_DMA_CH8_STATUS, R_DMA_CH8_HWSW, R_DMA_CH8_DESCR,
579 R_DMA_CH9_CLR_INTR, R_DMA_CH9_FIRST, R_DMA_CH9_CMD,
580 R_DMA_CH9_STATUS, R_DMA_CH9_HWSW, R_DMA_CH9_DESCR,
581 STD_FLAGS, DEF_RX, DEF_TX, 3 ,
582 #ifdef CONFIG_ETRAX_SERIAL_PORT1
589 { DEF_BAUD, (unsigned char *)R_SERIAL2_CTRL, 1U << 4, /* uses DMA 2 and 3 */
590 R_DMA_CH2_CLR_INTR, R_DMA_CH2_FIRST, R_DMA_CH2_CMD,
591 R_DMA_CH2_STATUS, R_DMA_CH2_HWSW, R_DMA_CH2_DESCR,
592 R_DMA_CH3_CLR_INTR, R_DMA_CH3_FIRST, R_DMA_CH3_CMD,
593 R_DMA_CH3_STATUS, R_DMA_CH3_HWSW, R_DMA_CH3_DESCR,
594 STD_FLAGS, DEF_RX, DEF_TX, 0,
595 #ifdef CONFIG_ETRAX_SERIAL_PORT2
602 { DEF_BAUD, (unsigned char *)R_SERIAL3_CTRL, 1U << 8, /* uses DMA 4 and 5 */
603 R_DMA_CH4_CLR_INTR, R_DMA_CH4_FIRST, R_DMA_CH4_CMD,
604 R_DMA_CH4_STATUS, R_DMA_CH4_HWSW, R_DMA_CH4_DESCR,
605 R_DMA_CH5_CLR_INTR, R_DMA_CH5_FIRST, R_DMA_CH5_CMD,
606 R_DMA_CH5_STATUS, R_DMA_CH5_HWSW, R_DMA_CH5_DESCR,
607 STD_FLAGS, DEF_RX, DEF_TX, 1,
608 #ifdef CONFIG_ETRAX_SERIAL_PORT3
618 #define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial))
619 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
620 static struct fast_timer fast_timers[NR_PORTS];
623 #ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY
624 #define PROCSTAT(x) x
625 struct ser_statistics_type {
627 int early_errors_cnt;
630 unsigned long int processing_flip;
631 unsigned long processing_flip_still_room;
632 unsigned long int timeout_flush_cnt;
639 static struct ser_statistics_type ser_stat[NR_PORTS];
645 #endif /* CONFIG_ETRAX_SERIAL_PROC_ENTRY */
648 #if defined(CONFIG_ETRAX_RS485)
649 #ifdef CONFIG_ETRAX_FAST_TIMER
650 static struct fast_timer fast_timers_rs485[NR_PORTS];
652 #if defined(CONFIG_ETRAX_RS485_ON_PA)
653 static int rs485_pa_bit = CONFIG_ETRAX_RS485_ON_PA_BIT;
657 /* Info and macros needed for each ports extra control/status signals. */
658 #define E100_STRUCT_PORT(line, pinname) \
659 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
660 (R_PORT_PA_DATA): ( \
661 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
662 (R_PORT_PB_DATA):&dummy_ser[line]))
664 #define E100_STRUCT_SHADOW(line, pinname) \
665 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
666 (&port_pa_data_shadow): ( \
667 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
668 (&port_pb_data_shadow):&dummy_ser[line]))
669 #define E100_STRUCT_MASK(line, pinname) \
670 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
671 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \
672 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
673 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK))
675 #define DUMMY_DTR_MASK 1
676 #define DUMMY_RI_MASK 2
677 #define DUMMY_DSR_MASK 4
678 #define DUMMY_CD_MASK 8
679 static unsigned char dummy_ser[NR_PORTS] = {0xFF, 0xFF, 0xFF,0xFF};
681 /* If not all status pins are used or disabled, use mixed mode */
682 #ifdef CONFIG_ETRAX_SERIAL_PORT0
684 #define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT)
686 #if SER0_PA_BITSUM != -4
687 # if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1
688 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
689 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
692 # if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1
693 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
694 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
697 # if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1
698 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
699 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
702 # if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1
703 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
704 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
709 #define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT)
711 #if SER0_PB_BITSUM != -4
712 # if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1
713 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
714 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
717 # if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1
718 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
719 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
722 # if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1
723 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
724 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
727 # if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1
728 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
729 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
737 #ifdef CONFIG_ETRAX_SERIAL_PORT1
739 #define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT)
741 #if SER1_PA_BITSUM != -4
742 # if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1
743 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
744 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
747 # if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1
748 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
749 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
752 # if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1
753 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
754 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
757 # if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1
758 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
759 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
764 #define SER0_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT)
766 #if SER1_PB_BITSUM != -4
767 # if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1
768 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
769 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
772 # if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1
773 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
774 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
777 # if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1
778 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
779 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
782 # if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1
783 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
784 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
791 #ifdef CONFIG_ETRAX_SERIAL_PORT2
793 #define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT)
795 #if SER2_PA_BITSUM != -4
796 # if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1
797 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
798 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
801 # if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1
802 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
803 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
806 # if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1
807 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
808 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
811 # if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1
812 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
813 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
818 #define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT)
820 #if SER2_PB_BITSUM != -4
821 # if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1
822 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
823 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
826 # if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1
827 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
828 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
831 # if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1
832 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
833 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
836 # if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1
837 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
838 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
845 #ifdef CONFIG_ETRAX_SERIAL_PORT3
847 #define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT)
849 #if SER3_PA_BITSUM != -4
850 # if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1
851 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
852 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
855 # if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1
856 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
857 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
860 # if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1
861 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
862 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
865 # if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1
866 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
867 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
872 #define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT)
874 #if SER3_PB_BITSUM != -4
875 # if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1
876 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
877 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
880 # if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1
881 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
882 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
885 # if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1
886 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
887 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
890 # if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1
891 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
892 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
900 #if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \
901 defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \
902 defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \
903 defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED)
904 #define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
907 #ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
908 /* The pins can be mixed on PA and PB */
909 #define CONTROL_PINS_PORT_NOT_USED(line) \
910 &dummy_ser[line], &dummy_ser[line], \
911 &dummy_ser[line], &dummy_ser[line], \
912 &dummy_ser[line], &dummy_ser[line], \
913 &dummy_ser[line], &dummy_ser[line], \
914 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
919 volatile unsigned char *dtr_port;
920 unsigned char *dtr_shadow;
921 volatile unsigned char *ri_port;
922 unsigned char *ri_shadow;
923 volatile unsigned char *dsr_port;
924 unsigned char *dsr_shadow;
925 volatile unsigned char *cd_port;
926 unsigned char *cd_shadow;
928 unsigned char dtr_mask;
929 unsigned char ri_mask;
930 unsigned char dsr_mask;
931 unsigned char cd_mask;
934 static const struct control_pins e100_modem_pins[NR_PORTS] =
938 #ifdef CONFIG_ETRAX_SERIAL_PORT0
939 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
940 E100_STRUCT_PORT(0,RI), E100_STRUCT_SHADOW(0,RI),
941 E100_STRUCT_PORT(0,DSR), E100_STRUCT_SHADOW(0,DSR),
942 E100_STRUCT_PORT(0,CD), E100_STRUCT_SHADOW(0,CD),
943 E100_STRUCT_MASK(0,DTR),
944 E100_STRUCT_MASK(0,RI),
945 E100_STRUCT_MASK(0,DSR),
946 E100_STRUCT_MASK(0,CD)
948 CONTROL_PINS_PORT_NOT_USED(0)
954 #ifdef CONFIG_ETRAX_SERIAL_PORT1
955 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
956 E100_STRUCT_PORT(1,RI), E100_STRUCT_SHADOW(1,RI),
957 E100_STRUCT_PORT(1,DSR), E100_STRUCT_SHADOW(1,DSR),
958 E100_STRUCT_PORT(1,CD), E100_STRUCT_SHADOW(1,CD),
959 E100_STRUCT_MASK(1,DTR),
960 E100_STRUCT_MASK(1,RI),
961 E100_STRUCT_MASK(1,DSR),
962 E100_STRUCT_MASK(1,CD)
964 CONTROL_PINS_PORT_NOT_USED(1)
970 #ifdef CONFIG_ETRAX_SERIAL_PORT2
971 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
972 E100_STRUCT_PORT(2,RI), E100_STRUCT_SHADOW(2,RI),
973 E100_STRUCT_PORT(2,DSR), E100_STRUCT_SHADOW(2,DSR),
974 E100_STRUCT_PORT(2,CD), E100_STRUCT_SHADOW(2,CD),
975 E100_STRUCT_MASK(2,DTR),
976 E100_STRUCT_MASK(2,RI),
977 E100_STRUCT_MASK(2,DSR),
978 E100_STRUCT_MASK(2,CD)
980 CONTROL_PINS_PORT_NOT_USED(2)
986 #ifdef CONFIG_ETRAX_SERIAL_PORT3
987 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
988 E100_STRUCT_PORT(3,RI), E100_STRUCT_SHADOW(3,RI),
989 E100_STRUCT_PORT(3,DSR), E100_STRUCT_SHADOW(3,DSR),
990 E100_STRUCT_PORT(3,CD), E100_STRUCT_SHADOW(3,CD),
991 E100_STRUCT_MASK(3,DTR),
992 E100_STRUCT_MASK(3,RI),
993 E100_STRUCT_MASK(3,DSR),
994 E100_STRUCT_MASK(3,CD)
996 CONTROL_PINS_PORT_NOT_USED(3)
1000 #else /* CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1002 /* All pins are on either PA or PB for each serial port */
1003 #define CONTROL_PINS_PORT_NOT_USED(line) \
1004 &dummy_ser[line], &dummy_ser[line], \
1005 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1010 volatile unsigned char *port;
1011 unsigned char *shadow;
1013 unsigned char dtr_mask;
1014 unsigned char ri_mask;
1015 unsigned char dsr_mask;
1016 unsigned char cd_mask;
1019 #define dtr_port port
1020 #define dtr_shadow shadow
1021 #define ri_port port
1022 #define ri_shadow shadow
1023 #define dsr_port port
1024 #define dsr_shadow shadow
1025 #define cd_port port
1026 #define cd_shadow shadow
1028 static const struct control_pins e100_modem_pins[NR_PORTS] =
1032 #ifdef CONFIG_ETRAX_SERIAL_PORT0
1033 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
1034 E100_STRUCT_MASK(0,DTR),
1035 E100_STRUCT_MASK(0,RI),
1036 E100_STRUCT_MASK(0,DSR),
1037 E100_STRUCT_MASK(0,CD)
1039 CONTROL_PINS_PORT_NOT_USED(0)
1045 #ifdef CONFIG_ETRAX_SERIAL_PORT1
1046 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
1047 E100_STRUCT_MASK(1,DTR),
1048 E100_STRUCT_MASK(1,RI),
1049 E100_STRUCT_MASK(1,DSR),
1050 E100_STRUCT_MASK(1,CD)
1052 CONTROL_PINS_PORT_NOT_USED(1)
1058 #ifdef CONFIG_ETRAX_SERIAL_PORT2
1059 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
1060 E100_STRUCT_MASK(2,DTR),
1061 E100_STRUCT_MASK(2,RI),
1062 E100_STRUCT_MASK(2,DSR),
1063 E100_STRUCT_MASK(2,CD)
1065 CONTROL_PINS_PORT_NOT_USED(2)
1071 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1072 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
1073 E100_STRUCT_MASK(3,DTR),
1074 E100_STRUCT_MASK(3,RI),
1075 E100_STRUCT_MASK(3,DSR),
1076 E100_STRUCT_MASK(3,CD)
1078 CONTROL_PINS_PORT_NOT_USED(3)
1082 #endif /* !CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1084 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_RS485_ON_PA)
1085 unsigned char rs485_pa_port = CONFIG_ETRAX_RS485_ON_PA_BIT;
1089 #define E100_RTS_MASK 0x20
1090 #define E100_CTS_MASK 0x40
1093 /* All serial port signals are active low:
1094 * active = 0 -> 3.3V to RS-232 driver -> -12V on RS-232 level
1095 * inactive = 1 -> 0V to RS-232 driver -> +12V on RS-232 level
1097 * These macros returns the pin value: 0=0V, >=1 = 3.3V on ETRAX chip
1101 #define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK)
1103 #define E100_CTS_GET(info) ((info)->port[REG_STATUS] & E100_CTS_MASK)
1105 /* These are typically PA or PB and 0 means 0V, 1 means 3.3V */
1107 #define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask)
1109 /* Normally inputs */
1110 #define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask)
1111 #define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask)
1114 #define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask)
1118 * tmp_buf is used as a temporary buffer by serial_write. We need to
1119 * lock it in case the memcpy_fromfs blocks while swapping in a page,
1120 * and some other program tries to do a serial write at the same time.
1121 * Since the lock will only come under contention when the system is
1122 * swapping and available memory is low, it makes sense to share one
1123 * buffer across all the serial ports, since it significantly saves
1124 * memory if large numbers of serial ports are open.
1126 static unsigned char *tmp_buf;
1127 #ifdef DECLARE_MUTEX
1128 static DECLARE_MUTEX(tmp_buf_sem);
1130 static struct semaphore tmp_buf_sem = MUTEX;
1133 /* Calculate the chartime depending on baudrate, numbor of bits etc. */
1134 static void update_char_time(struct e100_serial * info)
1136 tcflag_t cflags = info->tty->termios->c_cflag;
1139 /* calc. number of bits / data byte */
1140 /* databits + startbit and 1 stopbit */
1141 if ((cflags & CSIZE) == CS7)
1146 if (cflags & CSTOPB) /* 2 stopbits ? */
1149 if (cflags & PARENB) /* parity bit ? */
1153 info->char_time_usec = ((bits * 1000000) / info->baud) + 1;
1157 * This function maps from the Bxxxx defines in asm/termbits.h into real
1162 cflag_to_baud(unsigned int cflag)
1164 static int baud_table[] = {
1165 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400,
1166 4800, 9600, 19200, 38400 };
1168 static int ext_baud_table[] = {
1169 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000,
1170 0, 0, 0, 0, 0, 0, 0, 0 };
1172 if (cflag & CBAUDEX)
1173 return ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1175 return baud_table[cflag & CBAUD];
1178 /* and this maps to an etrax100 hardware baud constant */
1180 static unsigned char
1181 cflag_to_etrax_baud(unsigned int cflag)
1185 static char baud_table[] = {
1186 -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 };
1188 static char ext_baud_table[] = {
1189 -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 };
1191 if (cflag & CBAUDEX)
1192 retval = ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1194 retval = baud_table[cflag & CBAUD];
1197 printk(KERN_WARNING "serdriver tried setting invalid baud rate, flags %x.\n", cflag);
1198 retval = 5; /* choose default 9600 instead */
1201 return retval | (retval << 4); /* choose same for both TX and RX */
1205 /* Various static support functions */
1207 /* Functions to set or clear DTR/RTS on the requested line */
1208 /* It is complicated by the fact that RTS is a serial port register, while
1209 * DTR might not be implemented in the HW at all, and if it is, it can be on
1215 e100_dtr(struct e100_serial *info, int set)
1217 #ifndef CONFIG_SVINTO_SIM
1218 unsigned char mask = e100_modem_pins[info->line].dtr_mask;
1220 #ifdef SERIAL_DEBUG_IO
1221 printk("ser%i dtr %i mask: 0x%02X\n", info->line, set, mask);
1222 printk("ser%i shadow before 0x%02X get: %i\n",
1223 info->line, *e100_modem_pins[info->line].dtr_shadow,
1224 E100_DTR_GET(info));
1226 /* DTR is active low */
1228 unsigned long flags;
1232 *e100_modem_pins[info->line].dtr_shadow &= ~mask;
1233 *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask);
1234 *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow;
1235 restore_flags(flags);
1238 #ifdef SERIAL_DEBUG_IO
1239 printk("ser%i shadow after 0x%02X get: %i\n",
1240 info->line, *e100_modem_pins[info->line].dtr_shadow,
1241 E100_DTR_GET(info));
1246 /* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
1250 e100_rts(struct e100_serial *info, int set)
1252 #ifndef CONFIG_SVINTO_SIM
1253 info->rx_ctrl &= ~E100_RTS_MASK;
1254 info->rx_ctrl |= (set ? 0 : E100_RTS_MASK); /* RTS is active low */
1255 info->port[REG_REC_CTRL] = info->rx_ctrl;
1256 #ifdef SERIAL_DEBUG_IO
1257 printk("ser%i rts %i\n", info->line, set);
1263 /* If this behaves as a modem, RI and CD is an output */
1265 e100_ri_out(struct e100_serial *info, int set)
1267 #ifndef CONFIG_SVINTO_SIM
1268 /* RI is active low */
1270 unsigned char mask = e100_modem_pins[info->line].ri_mask;
1271 unsigned long flags;
1275 *e100_modem_pins[info->line].ri_shadow &= ~mask;
1276 *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask);
1277 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
1278 restore_flags(flags);
1283 e100_cd_out(struct e100_serial *info, int set)
1285 #ifndef CONFIG_SVINTO_SIM
1286 /* CD is active low */
1288 unsigned char mask = e100_modem_pins[info->line].cd_mask;
1289 unsigned long flags;
1293 *e100_modem_pins[info->line].cd_shadow &= ~mask;
1294 *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask);
1295 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
1296 restore_flags(flags);
1302 e100_disable_rx(struct e100_serial *info)
1304 #ifndef CONFIG_SVINTO_SIM
1305 /* disable the receiver */
1306 info->port[REG_REC_CTRL] =
1307 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1312 e100_enable_rx(struct e100_serial *info)
1314 #ifndef CONFIG_SVINTO_SIM
1315 /* enable the receiver */
1316 info->port[REG_REC_CTRL] =
1317 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1321 /* the rx DMA uses both the dma_descr and the dma_eop interrupts */
1324 e100_disable_rxdma_irq(struct e100_serial *info)
1326 #ifdef SERIAL_DEBUG_INTR
1327 printk("rxdma_irq(%d): 0\n",info->line);
1329 *R_IRQ_MASK2_CLR = (info->irq << 2) | (info->irq << 3);
1333 e100_enable_rxdma_irq(struct e100_serial *info)
1335 #ifdef SERIAL_DEBUG_INTR
1336 printk("rxdma_irq(%d): 1\n",info->line);
1338 *R_IRQ_MASK2_SET = (info->irq << 2) | (info->irq << 3);
1341 /* the tx DMA uses only dma_descr interrupt */
1344 e100_disable_txdma_irq(struct e100_serial *info)
1346 #ifdef SERIAL_DEBUG_INTR
1347 printk("txdma_irq(%d): 0\n",info->line);
1349 *R_IRQ_MASK2_CLR = info->irq;
1353 e100_enable_txdma_irq(struct e100_serial *info)
1355 #ifdef SERIAL_DEBUG_INTR
1356 printk("txdma_irq(%d): 1\n",info->line);
1358 *R_IRQ_MASK2_SET = info->irq;
1362 e100_disable_txdma_channel(struct e100_serial *info)
1364 unsigned long flags;
1366 /* Disable output DMA channel for the serial port in question
1367 * ( set to something other then serialX)
1371 if (info->line == 0) {
1372 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1373 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused);
1374 } else if (info->line == 1) {
1375 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1376 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb);
1377 } else if (info->line == 2) {
1378 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1379 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0);
1380 } else if (info->line == 3) {
1381 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1382 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1);
1384 *R_GEN_CONFIG = genconfig_shadow;
1385 restore_flags(flags);
1390 e100_enable_txdma_channel(struct e100_serial *info)
1392 unsigned long flags;
1396 /* Enable output DMA channel for the serial port in question */
1397 if (info->line == 0) {
1398 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1399 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, serial0);
1400 } else if (info->line == 1) {
1401 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1402 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, serial1);
1403 } else if (info->line == 2) {
1404 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1405 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, serial2);
1406 } else if (info->line == 3) {
1407 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1408 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3);
1410 *R_GEN_CONFIG = genconfig_shadow;
1411 restore_flags(flags);
1415 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1416 /* in order to detect and fix errors on the first byte
1417 we have to use the serial interrupts as well. */
1420 e100_disable_serial_data_irq(struct e100_serial *info)
1422 #ifdef SERIAL_DEBUG_INTR
1423 printk("ser_irq(%d): 0\n",info->line);
1425 *R_IRQ_MASK1_CLR = (1U << (8+2*info->line));
1429 e100_enable_serial_data_irq(struct e100_serial *info)
1431 #ifdef SERIAL_DEBUG_INTR
1432 printk("ser_irq(%d): 1\n",info->line);
1433 printk("**** %d = %d\n",
1435 (1U << (8+2*info->line)));
1437 *R_IRQ_MASK1_SET = (1U << (8+2*info->line));
1441 #if defined(CONFIG_ETRAX_RS485)
1442 /* Enable RS-485 mode on selected port. This is UGLY. */
1444 e100_enable_rs485(struct tty_struct *tty,struct rs485_control *r)
1446 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1448 #if defined(CONFIG_ETRAX_RS485_ON_PA)
1449 *R_PORT_PA_DATA = port_pa_data_shadow |= (1 << rs485_pa_bit);
1452 info->rs485.rts_on_send = 0x01 & r->rts_on_send;
1453 info->rs485.rts_after_sent = 0x01 & r->rts_after_sent;
1454 info->rs485.delay_rts_before_send = r->delay_rts_before_send;
1455 info->rs485.enabled = r->enabled;
1456 /* printk("rts: on send = %i, after = %i, enabled = %i",
1457 info->rs485.rts_on_send,
1458 info->rs485.rts_after_sent,
1466 e100_write_rs485(struct tty_struct *tty, int from_user,
1467 const unsigned char *buf, int count)
1469 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1470 int old_enabled = info->rs485.enabled;
1472 /* rs485 is always implicitly enabled if we're using the ioctl()
1473 * but it doesn't have to be set in the rs485_control
1474 * (to be backward compatible with old apps)
1475 * So we store, set and restore it.
1477 info->rs485.enabled = 1;
1478 /* rs_write now deals with RS485 if enabled */
1479 count = rs_write(tty, from_user, buf, count);
1480 info->rs485.enabled = old_enabled;
1484 #ifdef CONFIG_ETRAX_FAST_TIMER
1485 /* Timer function to toggle RTS when using FAST_TIMER */
1486 static void rs485_toggle_rts_timer_function(unsigned long data)
1488 struct e100_serial *info = (struct e100_serial *)data;
1490 fast_timers_rs485[info->line].function = NULL;
1491 e100_rts(info, info->rs485.rts_after_sent);
1492 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
1493 e100_enable_rx(info);
1494 e100_enable_rxdma_irq(info);
1498 #endif /* CONFIG_ETRAX_RS485 */
1501 * ------------------------------------------------------------
1502 * rs_stop() and rs_start()
1504 * This routines are called before setting or resetting tty->stopped.
1505 * They enable or disable transmitter using the XOFF registers, as necessary.
1506 * ------------------------------------------------------------
1510 rs_stop(struct tty_struct *tty)
1512 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1514 unsigned long flags;
1517 save_flags(flags); cli();
1518 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
1519 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, stop);
1520 if (tty->termios->c_iflag & IXON ) {
1521 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1524 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
1525 restore_flags(flags);
1530 rs_start(struct tty_struct *tty)
1532 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1534 unsigned long flags;
1537 save_flags(flags); cli();
1538 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(tty));
1539 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
1540 if (tty->termios->c_iflag & IXON ) {
1541 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1544 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
1546 restore_flags(flags);
1551 * ----------------------------------------------------------------------
1553 * Here starts the interrupt handling routines. All of the following
1554 * subroutines are declared as inline and are folded into
1555 * rs_interrupt(). They were separated out for readability's sake.
1557 * Note: rs_interrupt() is a "fast" interrupt, which means that it
1558 * runs with interrupts turned off. People who may want to modify
1559 * rs_interrupt() should try to keep the interrupt handler as fast as
1560 * possible. After you are done making modifications, it is not a bad
1563 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
1565 * and look at the resulting assemble code in serial.s.
1567 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
1568 * -----------------------------------------------------------------------
1572 * This routine is used by the interrupt handler to schedule
1573 * processing in the software interrupt portion of the driver.
1575 static _INLINE_ void
1576 rs_sched_event(struct e100_serial *info,
1579 info->event |= 1 << event;
1580 schedule_work(&info->work);
1583 /* The output DMA channel is free - use it to send as many chars as possible
1585 * We don't pay attention to info->x_char, which means if the TTY wants to
1586 * use XON/XOFF it will set info->x_char but we won't send any X char!
1588 * To implement this, we'd just start a DMA send of 1 byte pointing at a
1589 * buffer containing the X char, and skip updating xmit. We'd also have to
1590 * check if the last sent char was the X char when we enter this function
1591 * the next time, to avoid updating xmit with the sent X value.
1595 transmit_chars(struct e100_serial *info)
1597 unsigned int c, sentl;
1598 struct etrax_dma_descr *descr;
1600 #ifdef CONFIG_SVINTO_SIM
1601 /* This will output too little if tail is not 0 always since
1602 * we don't reloop to send the other part. Anyway this SHOULD be a
1603 * no-op - transmit_chars would never really be called during sim
1604 * since rs_write does not write into the xmit buffer then.
1606 if (info->xmit.tail)
1607 printk("Error in serial.c:transmit_chars(), tail!=0\n");
1608 if (info->xmit.head != info->xmit.tail) {
1609 SIMCOUT(info->xmit.buf + info->xmit.tail,
1610 CIRC_CNT(info->xmit.head,
1613 info->xmit.head = info->xmit.tail; /* move back head */
1614 info->tr_running = 0;
1618 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1619 *info->oclrintradr =
1620 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1621 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1623 #ifdef SERIAL_DEBUG_INTR
1624 if (info->line == SERIAL_DEBUG_LINE)
1627 if (!info->tr_running) {
1628 /* weirdo... we shouldn't get here! */
1629 printk(KERN_WARNING "Achtung: transmit_chars with !tr_running\n");
1633 descr = &info->tr_descr;
1635 /* first get the amount of bytes sent during the last DMA transfer,
1636 and update xmit accordingly */
1638 /* if the stop bit was not set, all data has been sent */
1639 if (!(descr->status & d_stop)) {
1640 sentl = descr->sw_len;
1642 /* otherwise we find the amount of data sent here */
1643 sentl = descr->hw_len;
1646 info->icount.tx += sentl;
1648 /* update xmit buffer */
1649 info->xmit.tail = (info->xmit.tail + sentl) & (SERIAL_XMIT_SIZE - 1);
1651 /* if there is only a few chars left in the buf, wake up the blocked
1653 if (CIRC_CNT(info->xmit.head,
1655 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
1656 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
1658 /* find out the largest amount of consecutive bytes we want to send now */
1660 c = CIRC_CNT_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
1663 /* our job here is done, don't schedule any new DMA transfer */
1664 info->tr_running = 0;
1666 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
1667 if (info->rs485.enabled) {
1668 /* Set a short timer to toggle RTS */
1669 start_one_shot_timer(&fast_timers_rs485[info->line],
1670 rs485_toggle_rts_timer_function,
1671 (unsigned long)info,
1672 info->char_time_usec*2,
1679 /* ok we can schedule a dma send of c chars starting at info->xmit.tail */
1680 /* set up the descriptor correctly for output */
1682 descr->ctrl = d_int | d_eol | d_wait; /* Wait needed for tty_wait_until_sent() */
1684 descr->buf = virt_to_phys(info->xmit.buf + info->xmit.tail);
1687 *info->ofirstadr = virt_to_phys(descr); /* write to R_DMAx_FIRST */
1688 *info->ocmdadr = 1; /* dma command start -> R_DMAx_CMD */
1690 /* DMA is now running (hopefully) */
1691 } /* transmit_chars */
1694 start_transmit(struct e100_serial *info)
1697 if (info->line == SERIAL_DEBUG_LINE)
1701 info->tr_descr.sw_len = 0;
1702 info->tr_descr.hw_len = 0;
1703 info->tr_descr.status = 0;
1704 info->tr_running = 1;
1706 transmit_chars(info);
1707 } /* start_transmit */
1709 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
1710 static int serial_fast_timer_started = 0;
1711 static int serial_fast_timer_expired = 0;
1712 static void flush_timeout_function(unsigned long data);
1713 #define START_FLUSH_FAST_TIMER(info, string) {\
1714 unsigned long timer_flags; \
1715 save_flags(timer_flags); \
1717 if (fast_timers[info->line].function == NULL) { \
1718 serial_fast_timer_started++; \
1719 TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
1720 TIMERD(DEBUG_LOG(info->line, "num started: %i\n", serial_fast_timer_started)); \
1721 start_one_shot_timer(&fast_timers[info->line], \
1722 flush_timeout_function, \
1723 (unsigned long)info, \
1724 info->char_time_usec*4, \
1728 TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
1730 restore_flags(timer_flags); \
1734 #define START_FLUSH_FAST_TIMER(info, string)
1737 static struct etrax_recv_buffer *
1738 alloc_recv_buffer(unsigned int size)
1740 struct etrax_recv_buffer *buffer;
1742 if (!(buffer = kmalloc(sizeof *buffer + size, GFP_ATOMIC)))
1745 buffer->next = NULL;
1747 buffer->error = TTY_NORMAL;
1753 append_recv_buffer(struct e100_serial *info, struct etrax_recv_buffer *buffer)
1755 unsigned long flags;
1760 if (!info->first_recv_buffer)
1761 info->first_recv_buffer = buffer;
1763 info->last_recv_buffer->next = buffer;
1765 info->last_recv_buffer = buffer;
1767 info->recv_cnt += buffer->length;
1768 if (info->recv_cnt > info->max_recv_cnt)
1769 info->max_recv_cnt = info->recv_cnt;
1771 restore_flags(flags);
1775 add_char_and_flag(struct e100_serial *info, unsigned char data, unsigned char flag)
1777 struct etrax_recv_buffer *buffer;
1779 if (!(buffer = alloc_recv_buffer(4)))
1783 buffer->error = flag;
1784 buffer->buffer[0] = data;
1786 append_recv_buffer(info, buffer);
1793 extern _INLINE_ unsigned int
1794 handle_descr_data(struct e100_serial *info, struct etrax_dma_descr *descr, unsigned int recvl)
1796 struct etrax_recv_buffer *buffer = phys_to_virt(descr->buf) - sizeof *buffer;
1798 if (info->recv_cnt + recvl > 65536) {
1800 "%s: Too much pending incoming serial data! Dropping %u bytes.\n", __FUNCTION__, recvl);
1804 buffer->length = recvl;
1806 if (info->errorcode == ERRCODE_SET_BREAK)
1807 buffer->error = TTY_BREAK;
1808 info->errorcode = 0;
1810 append_recv_buffer(info, buffer);
1812 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
1813 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
1815 descr->buf = virt_to_phys(buffer->buffer);
1820 static _INLINE_ unsigned int
1821 handle_all_descr_data(struct e100_serial *info)
1823 struct etrax_dma_descr *descr;
1825 unsigned int ret = 0;
1829 descr = &info->rec_descr[info->cur_rec_descr];
1831 if (descr == phys_to_virt(*info->idescradr))
1834 if (++info->cur_rec_descr == SERIAL_RECV_DESCRIPTORS)
1835 info->cur_rec_descr = 0;
1837 /* find out how many bytes were read */
1839 /* if the eop bit was not set, all data has been received */
1840 if (!(descr->status & d_eop)) {
1841 recvl = descr->sw_len;
1843 /* otherwise we find the amount of data received here */
1844 recvl = descr->hw_len;
1847 /* Reset the status information */
1850 DEBUG_LOG(info->line, "recvl %lu\n", recvl);
1853 info->icount.rx += recvl;
1855 ret += handle_descr_data(info, descr, recvl);
1861 static _INLINE_ void
1862 receive_chars(struct e100_serial *info)
1864 struct tty_struct *tty;
1865 unsigned char rstat;
1867 #ifdef CONFIG_SVINTO_SIM
1868 /* No receive in the simulator. Will probably be when the rest of
1869 * the serial interface works, and this piece will just be removed.
1874 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1875 *info->iclrintradr =
1876 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1877 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1880 if (!tty) /* Something wrong... */
1883 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1884 e100_enable_serial_data_irq(info);
1887 if (info->errorcode == ERRCODE_INSERT_BREAK)
1888 add_char_and_flag(info, '\0', TTY_BREAK);
1890 handle_all_descr_data(info);
1892 /* Read the status register to detect errors */
1893 rstat = info->port[REG_STATUS];
1895 if (rstat & SER_ERROR_MASK) {
1896 /* If we got an error, we must reset it by reading the
1899 unsigned char data = info->port[REG_DATA];
1901 PROCSTAT(ser_stat[info->line].errors_cnt++);
1902 DEBUG_LOG(info->line, "#dERR: s d 0x%04X\n",
1903 ((rstat & SER_ERROR_MASK) << 8) | data);
1905 if (rstat & SER_PAR_ERR_MASK)
1906 add_char_and_flag(info, data, TTY_PARITY);
1907 else if (rstat & SER_OVERRUN_MASK)
1908 add_char_and_flag(info, data, TTY_OVERRUN);
1909 else if (rstat & SER_FRAMING_ERR_MASK)
1910 add_char_and_flag(info, data, TTY_FRAME);
1913 START_FLUSH_FAST_TIMER(info, "receive_chars");
1915 /* Restart the receiving DMA */
1916 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
1920 start_recv_dma(struct e100_serial *info)
1922 struct etrax_dma_descr *descr = info->rec_descr;
1923 struct etrax_recv_buffer *buffer;
1926 /* Set up the receiving descriptors */
1927 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) {
1928 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
1929 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
1931 descr[i].ctrl = d_int;
1932 descr[i].buf = virt_to_phys(buffer->buffer);
1933 descr[i].sw_len = SERIAL_DESCR_BUF_SIZE;
1934 descr[i].hw_len = 0;
1935 descr[i].status = 0;
1936 descr[i].next = virt_to_phys(&descr[i+1]);
1939 /* Link the last descriptor to the first */
1940 descr[i-1].next = virt_to_phys(&descr[0]);
1942 /* Start with the first descriptor in the list */
1943 info->cur_rec_descr = 0;
1946 *info->ifirstadr = virt_to_phys(&descr[info->cur_rec_descr]);
1947 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
1949 /* Input DMA should be running now */
1954 start_receive(struct e100_serial *info)
1956 #ifdef CONFIG_SVINTO_SIM
1957 /* No receive in the simulator. Will probably be when the rest of
1958 * the serial interface works, and this piece will just be removed.
1963 /* reset the input dma channel to be sure it works */
1965 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
1966 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
1967 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
1969 info->tty->flip.count = 0;
1971 start_recv_dma(info);
1975 static _INLINE_ void
1976 status_handle(struct e100_serial *info, unsigned short status)
1980 /* the bits in the MASK2 register are laid out like this:
1981 DMAI_EOP DMAI_DESCR DMAO_EOP DMAO_DESCR
1982 where I is the input channel and O is the output channel for the port.
1983 info->irq is the bit number for the DMAO_DESCR so to check the others we
1984 shift info->irq to the left.
1987 /* dma output channel interrupt handler
1988 this interrupt is called from DMA2(ser2), DMA4(ser3), DMA6(ser0) or
1989 DMA8(ser1) when they have finished a descriptor with the intr flag set.
1993 tr_interrupt(int irq, void *dev_id, struct pt_regs * regs)
1995 struct e100_serial *info;
2000 #ifdef CONFIG_SVINTO_SIM
2001 /* No receive in the simulator. Will probably be when the rest of
2002 * the serial interface works, and this piece will just be removed.
2005 const char *s = "What? tr_interrupt in simulator??\n";
2006 SIMCOUT(s,strlen(s));
2011 /* find out the line that caused this irq and get it from rs_table */
2013 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2015 for (i = 0; i < NR_PORTS; i++) {
2016 info = rs_table + i;
2017 if (!info->enabled || !info->uses_dma)
2019 /* check for dma_descr (don't need to check for dma_eop in output dma for serial */
2020 if (ireg & info->irq) {
2022 /* we can send a new dma bunch. make it so. */
2023 DEBUG_LOG(info->line, "tr_interrupt %i\n", i);
2024 /* Read jiffies_usec first,
2025 * we want this time to be as late as possible
2027 PROCSTAT(ser_stat[info->line].tx_dma_ints++);
2028 info->last_tx_active_usec = GET_JIFFIES_USEC();
2029 info->last_tx_active = jiffies;
2030 transmit_chars(info);
2033 /* FIXME: here we should really check for a change in the
2034 status lines and if so call status_handle(info) */
2036 return IRQ_RETVAL(handled);
2039 /* dma input channel interrupt handler */
2042 rec_interrupt(int irq, void *dev_id, struct pt_regs * regs)
2044 struct e100_serial *info;
2049 #ifdef CONFIG_SVINTO_SIM
2050 /* No receive in the simulator. Will probably be when the rest of
2051 * the serial interface works, and this piece will just be removed.
2054 const char *s = "What? rec_interrupt in simulator??\n";
2055 SIMCOUT(s,strlen(s));
2060 /* find out the line that caused this irq and get it from rs_table */
2062 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2064 for (i = 0; i < NR_PORTS; i++) {
2065 info = rs_table + i;
2066 if (!info->enabled || !info->uses_dma)
2068 /* check for both dma_eop and dma_descr for the input dma channel */
2069 if (ireg & ((info->irq << 2) | (info->irq << 3))) {
2071 /* we have received something */
2072 receive_chars(info);
2075 /* FIXME: here we should really check for a change in the
2076 status lines and if so call status_handle(info) */
2078 return IRQ_RETVAL(handled);
2082 force_eop_if_needed(struct e100_serial *info)
2084 /* We check data_avail bit to determine if data has
2085 * arrived since last time
2087 unsigned char rstat = info->port[REG_STATUS];
2089 /* error or datavail? */
2090 if (rstat & SER_ERROR_MASK) {
2091 /* Some error has occurred. If there has been valid data, an
2092 * EOP interrupt will be made automatically. If no data, the
2093 * normal ser_interrupt should be enabled and handle it.
2096 DEBUG_LOG(info->line, "timeout err: rstat 0x%03X\n",
2097 rstat | (info->line << 8));
2101 if (rstat & SER_DATA_AVAIL_MASK) {
2102 /* Ok data, no error, count it */
2103 TIMERD(DEBUG_LOG(info->line, "timeout: rstat 0x%03X\n",
2104 rstat | (info->line << 8)));
2105 /* Read data to clear status flags */
2106 (void)info->port[REG_DATA];
2108 info->forced_eop = 0;
2109 START_FLUSH_FAST_TIMER(info, "magic");
2113 /* hit the timeout, force an EOP for the input
2114 * dma channel if we haven't already
2116 if (!info->forced_eop) {
2117 info->forced_eop = 1;
2118 PROCSTAT(ser_stat[info->line].timeout_flush_cnt++);
2119 DEBUG_LOG(info->line, "timeout EOP %i\n", info->line);
2126 static _INLINE_ void
2127 flush_to_flip_buffer(struct e100_serial *info)
2129 struct tty_struct *tty;
2130 struct etrax_recv_buffer *buffer;
2131 unsigned int length;
2132 unsigned long flags;
2134 if (!info->first_recv_buffer)
2140 if (!(tty = info->tty)) {
2141 restore_flags(flags);
2145 length = tty->flip.count;
2147 while ((buffer = info->first_recv_buffer) && length < TTY_FLIPBUF_SIZE) {
2148 unsigned int count = buffer->length;
2150 if (length + count > TTY_FLIPBUF_SIZE)
2151 count = TTY_FLIPBUF_SIZE - length;
2153 memcpy(tty->flip.char_buf_ptr + length, buffer->buffer, count);
2154 memset(tty->flip.flag_buf_ptr + length, TTY_NORMAL, count);
2155 tty->flip.flag_buf_ptr[length] = buffer->error;
2158 info->recv_cnt -= count;
2160 if (count == buffer->length) {
2161 info->first_recv_buffer = buffer->next;
2164 buffer->length -= count;
2165 memmove(buffer->buffer, buffer->buffer + count, buffer->length);
2166 buffer->error = TTY_NORMAL;
2170 if (!info->first_recv_buffer)
2171 info->last_recv_buffer = NULL;
2173 tty->flip.count = length;
2175 restore_flags(flags);
2177 /* this includes a check for low-latency */
2178 tty_flip_buffer_push(tty);
2181 static _INLINE_ void
2182 check_flush_timeout(struct e100_serial *info)
2184 force_eop_if_needed(info);
2186 flush_to_flip_buffer(info);
2188 if (info->first_recv_buffer)
2189 START_FLUSH_FAST_TIMER(info, "flip");
2192 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2193 static void flush_timeout_function(unsigned long data)
2195 struct e100_serial *info = (struct e100_serial *)data;
2197 fast_timers[info->line].function = NULL;
2198 serial_fast_timer_expired++;
2199 TIMERD(DEBUG_LOG(info->line, "flush_timout %i ", info->line));
2200 TIMERD(DEBUG_LOG(info->line, "num expired: %i\n", serial_fast_timer_expired));
2201 check_flush_timeout(info);
2206 /* dma fifo/buffer timeout handler
2207 forces an end-of-packet for the dma input channel if no chars
2208 have been received for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS/100 s.
2211 static struct timer_list flush_timer;
2214 timed_flush_handler(unsigned long ptr)
2216 struct e100_serial *info;
2219 #ifdef CONFIG_SVINTO_SIM
2223 for (i = 0; i < NR_PORTS; i++) {
2224 info = rs_table + i;
2226 check_flush_timeout(info);
2229 /* restart flush timer */
2230 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
2234 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2236 /* If there is an error (ie break) when the DMA is running and
2237 * there are no bytes in the fifo the DMA is stopped and we get no
2238 * eop interrupt. Thus we have to monitor the first bytes on a DMA
2239 * transfer, and if it is without error we can turn the serial
2244 BREAK handling on ETRAX 100:
2245 ETRAX will generate interrupt although there is no stop bit between the
2248 Depending on how long the break sequence is, the end of the breaksequence
2249 will look differently:
2250 | indicates start/end of a character.
2252 B= Break character (0x00) with framing error.
2253 E= Error byte with parity error received after B characters.
2254 F= "Faked" valid byte received immediately after B characters.
2258 B BL ___________________________ V
2259 .._|__________|__________| |valid data |
2261 Multiple frame errors with data == 0x00 (B),
2262 the timing matches up "perfectly" so no extra ending char is detected.
2263 The RXD pin is 1 in the last interrupt, in that case
2264 we set info->errorcode = ERRCODE_INSERT_BREAK, but we can't really
2265 know if another byte will come and this really is case 2. below
2266 (e.g F=0xFF or 0xFE)
2267 If RXD pin is 0 we can expect another character (see 2. below).
2272 B B E or F__________________..__ V
2273 .._|__________|__________|______ | |valid data
2277 Multiple frame errors with data == 0x00 (B),
2278 but the part of the break trigs is interpreted as a start bit (and possibly
2279 some 0 bits followed by a number of 1 bits and a stop bit).
2280 Depending on parity settings etc. this last character can be either
2281 a fake "valid" char (F) or have a parity error (E).
2283 If the character is valid it will be put in the buffer,
2284 we set info->errorcode = ERRCODE_SET_BREAK so the receive interrupt
2285 will set the flags so the tty will handle it,
2286 if it's an error byte it will not be put in the buffer
2287 and we set info->errorcode = ERRCODE_INSERT_BREAK.
2289 To distinguish a V byte in 1. from an F byte in 2. we keep a timestamp
2290 of the last faulty char (B) and compares it with the current time:
2291 If the time elapsed time is less then 2*char_time_usec we will assume
2292 it's a faked F char and not a Valid char and set
2293 info->errorcode = ERRCODE_SET_BREAK.
2295 Flaws in the above solution:
2296 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2297 We use the timer to distinguish a F character from a V character,
2298 if a V character is to close after the break we might make the wrong decision.
2300 TODO: The break will be delayed until an F or V character is received.
2304 extern irqreturn_t _INLINE_ handle_ser_interrupt(struct e100_serial *info)
2306 unsigned char rstat = info->port[REG_STATUS];
2308 #ifdef SERIAL_DEBUG_INTR
2309 printk("Interrupt from serport %d\n", i);
2311 /* DEBUG_LOG(info->line, "ser_interrupt stat %03X\n", rstat | (i << 8)); */
2312 if (rstat & SER_ERROR_MASK) {
2315 info->last_rx_active_usec = GET_JIFFIES_USEC();
2316 info->last_rx_active = jiffies;
2317 /* If we got an error, we must reset it by reading the
2320 data = info->port[REG_DATA];
2322 if (!data && (rstat & SER_FRAMING_ERR_MASK)) {
2323 /* Most likely a break, but we get interrupts over and
2327 if (!info->break_detected_cnt) {
2328 DEBUG_LOG(info->line, "#BRK start\n", 0);
2330 if (rstat & SER_RXD_MASK) {
2331 /* The RX pin is high now, so the break
2332 * must be over, but....
2333 * we can't really know if we will get another
2334 * last byte ending the break or not.
2335 * And we don't know if the byte (if any) will
2336 * have an error or look valid.
2338 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2339 info->errorcode = ERRCODE_INSERT_BREAK;
2341 info->break_detected_cnt++;
2343 /* The error does not look like a break, but could be
2346 if (info->break_detected_cnt) {
2347 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2348 info->errorcode = ERRCODE_INSERT_BREAK;
2350 if (info->errorcode == ERRCODE_INSERT_BREAK)
2351 add_char_and_flag(info, '\0', TTY_BREAK);
2353 if (rstat & SER_PAR_ERR_MASK)
2354 add_char_and_flag(info, data, TTY_PARITY);
2355 else if (rstat & SER_OVERRUN_MASK)
2356 add_char_and_flag(info, data, TTY_OVERRUN);
2357 else if (rstat & SER_FRAMING_ERR_MASK)
2358 add_char_and_flag(info, data, TTY_FRAME);
2359 info->errorcode = 0;
2361 info->break_detected_cnt = 0;
2362 DEBUG_LOG(info->line, "#iERR s d %04X\n",
2363 ((rstat & SER_ERROR_MASK) << 8) | data);
2365 PROCSTAT(ser_stat[info->line].early_errors_cnt++);
2366 } else { /* It was a valid byte, now let the DMA do the rest */
2367 unsigned long curr_time_u = GET_JIFFIES_USEC();
2368 unsigned long curr_time = jiffies;
2370 if (info->break_detected_cnt) {
2371 /* Detect if this character is a new valid char or the
2372 * last char in a break sequence: If LSBits are 0 and
2373 * MSBits are high AND the time is close to the
2374 * previous interrupt we should discard it.
2377 (curr_time - info->last_rx_active) * (1000000/HZ) +
2378 curr_time_u - info->last_rx_active_usec;
2379 if (elapsed_usec < 2*info->char_time_usec) {
2380 DEBUG_LOG(info->line, "FBRK %i\n", info->line);
2381 /* Report as BREAK (error) and let
2382 * receive_chars() handle it
2384 info->errorcode = ERRCODE_SET_BREAK;
2386 DEBUG_LOG(info->line, "Not end of BRK (V)%i\n", info->line);
2388 DEBUG_LOG(info->line, "num brk %i\n", info->break_detected_cnt);
2391 #ifdef SERIAL_DEBUG_INTR
2392 printk("** OK, disabling ser_interrupts\n");
2394 e100_disable_serial_data_irq(info);
2396 info->break_detected_cnt = 0;
2398 PROCSTAT(ser_stat[info->line].ser_ints_ok_cnt++);
2399 DEBUG_LOG(info->line, "ser_int OK %d\n", info->line);
2402 /* Restarting the DMA never hurts */
2403 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2404 START_FLUSH_FAST_TIMER(info, "ser_int");
2406 } /* handle_ser_interrupt */
2409 ser_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2411 struct e100_serial *info;
2415 for (i = 0; i < NR_PORTS; i++) {
2416 info = rs_table + i;
2418 if (!info->enabled || !info->uses_dma)
2421 /* Which line caused the irq? */
2422 if (*R_IRQ_MASK1_RD & (1U << (8+2*info->line))) {
2424 handle_ser_interrupt(info);
2427 return IRQ_RETVAL(handled);
2428 } /* ser_interrupt */
2432 * -------------------------------------------------------------------
2433 * Here ends the serial interrupt routines.
2434 * -------------------------------------------------------------------
2438 * This routine is used to handle the "bottom half" processing for the
2439 * serial driver, known also the "software interrupt" processing.
2440 * This processing is done at the kernel interrupt level, after the
2441 * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
2442 * is where time-consuming activities which can not be done in the
2443 * interrupt driver proper are done; the interrupt driver schedules
2444 * them using rs_sched_event(), and they get done here.
2447 do_softint(void *private_)
2449 struct e100_serial *info = (struct e100_serial *) private_;
2450 struct tty_struct *tty;
2456 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
2457 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
2458 tty->ldisc.write_wakeup)
2459 (tty->ldisc.write_wakeup)(tty);
2460 wake_up_interruptible(&tty->write_wait);
2465 startup(struct e100_serial * info)
2467 unsigned long flags;
2468 unsigned long xmit_page;
2471 xmit_page = get_zeroed_page(GFP_KERNEL);
2478 /* if it was already initialized, skip this */
2480 if (info->flags & ASYNC_INITIALIZED) {
2481 restore_flags(flags);
2482 free_page(xmit_page);
2487 free_page(xmit_page);
2489 info->xmit.buf = (unsigned char *) xmit_page;
2491 #ifdef SERIAL_DEBUG_OPEN
2492 printk("starting up ttyS%d (xmit_buf 0x%p, recv_buf 0x%p)...\n", info->line, info->xmit.buf, info->recv.buf);
2495 #ifdef CONFIG_SVINTO_SIM
2496 /* Bits and pieces collected from below. Better to have them
2497 in one ifdef:ed clause than to mix in a lot of ifdefs,
2500 clear_bit(TTY_IO_ERROR, &info->tty->flags);
2502 info->xmit.head = info->xmit.tail = 0;
2503 info->first_recv_buffer = info->last_recv_buffer = NULL;
2504 info->recv_cnt = info->max_recv_cnt = 0;
2506 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2507 info->rec_descr[i].buf = NULL;
2509 /* No real action in the simulator, but may set info important
2515 * Clear the FIFO buffers and disable them
2516 * (they will be reenabled in change_speed())
2520 * Reset the DMA channels and make sure their interrupts are cleared
2524 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2525 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2527 /* Wait until reset cycle is complete */
2528 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
2529 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2531 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) ==
2532 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2534 /* Make sure the irqs are cleared */
2535 *info->iclrintradr =
2536 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2537 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2538 *info->oclrintradr =
2539 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2540 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2543 clear_bit(TTY_IO_ERROR, &info->tty->flags);
2545 info->xmit.head = info->xmit.tail = 0;
2546 info->first_recv_buffer = info->last_recv_buffer = NULL;
2547 info->recv_cnt = info->max_recv_cnt = 0;
2549 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2550 info->rec_descr[i].buf = 0;
2553 * and set the speed and other flags of the serial port
2554 * this will start the rx/tx as well
2556 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2557 e100_enable_serial_data_irq(info);
2561 /* dummy read to reset any serial errors */
2563 (void)info->port[REG_DATA];
2565 /* enable the interrupts */
2567 e100_enable_txdma_irq(info);
2568 e100_enable_rxdma_irq(info);
2570 info->tr_running = 0; /* to be sure we don't lock up the transmitter */
2572 /* setup the dma input descriptor and start dma */
2574 start_receive(info);
2576 /* for safety, make sure the descriptors last result is 0 bytes written */
2578 info->tr_descr.sw_len = 0;
2579 info->tr_descr.hw_len = 0;
2580 info->tr_descr.status = 0;
2582 /* enable RTS/DTR last */
2587 #endif /* CONFIG_SVINTO_SIM */
2589 info->flags |= ASYNC_INITIALIZED;
2591 restore_flags(flags);
2596 * This routine will shutdown a serial port; interrupts are disabled, and
2597 * DTR is dropped if the hangup on close termio flag is on.
2600 shutdown(struct e100_serial * info)
2602 unsigned long flags;
2603 struct etrax_dma_descr *descr = info->rec_descr;
2604 struct etrax_recv_buffer *buffer;
2607 #ifndef CONFIG_SVINTO_SIM
2608 /* shut down the transmitter and receiver */
2610 e100_disable_rx(info);
2611 info->port[REG_TR_CTRL] = (info->tx_ctrl &= ~0x40);
2613 e100_disable_rxdma_irq(info);
2614 e100_disable_txdma_irq(info);
2616 info->tr_running = 0;
2618 /* reset both dma channels */
2620 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2621 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2624 #endif /* CONFIG_SVINTO_SIM */
2626 if (!(info->flags & ASYNC_INITIALIZED))
2629 #ifdef SERIAL_DEBUG_OPEN
2630 printk("Shutting down serial port %d (irq %d)....\n", info->line,
2635 cli(); /* Disable interrupts */
2637 if (info->xmit.buf) {
2638 free_page((unsigned long)info->xmit.buf);
2639 info->xmit.buf = NULL;
2642 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2644 buffer = phys_to_virt(descr[i].buf) - sizeof *buffer;
2649 if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) {
2650 /* hang up DTR and RTS if HUPCL is enabled */
2652 e100_rts(info, 0); /* could check CRTSCTS before doing this */
2656 set_bit(TTY_IO_ERROR, &info->tty->flags);
2658 info->flags &= ~ASYNC_INITIALIZED;
2659 restore_flags(flags);
2663 /* change baud rate and other assorted parameters */
2666 change_speed(struct e100_serial *info)
2671 /* first some safety checks */
2673 if (!info->tty || !info->tty->termios)
2678 cflag = info->tty->termios->c_cflag;
2680 /* possibly, the tx/rx should be disabled first to do this safely */
2682 /* change baud-rate and write it to the hardware */
2684 info->baud = cflag_to_baud(cflag);
2686 #ifndef CONFIG_SVINTO_SIM
2687 info->port[REG_BAUD] = cflag_to_etrax_baud(cflag);
2688 /* start with default settings and then fill in changes */
2690 /* 8 bit, no/even parity */
2691 info->rx_ctrl &= ~(IO_MASK(R_SERIAL0_REC_CTRL, rec_bitnr) |
2692 IO_MASK(R_SERIAL0_REC_CTRL, rec_par_en) |
2693 IO_MASK(R_SERIAL0_REC_CTRL, rec_par));
2695 /* 8 bit, no/even parity, 1 stop bit, no cts */
2696 info->tx_ctrl &= ~(IO_MASK(R_SERIAL0_TR_CTRL, tr_bitnr) |
2697 IO_MASK(R_SERIAL0_TR_CTRL, tr_par_en) |
2698 IO_MASK(R_SERIAL0_TR_CTRL, tr_par) |
2699 IO_MASK(R_SERIAL0_TR_CTRL, stop_bits) |
2700 IO_MASK(R_SERIAL0_TR_CTRL, auto_cts));
2702 if ((cflag & CSIZE) == CS7) {
2703 /* set 7 bit mode */
2704 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit);
2705 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit);
2708 if (cflag & CSTOPB) {
2709 /* set 2 stop bit mode */
2710 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, two_bits);
2713 if (cflag & PARENB) {
2715 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable);
2716 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable);
2719 if (cflag & CMSPAR) {
2720 /* enable stick parity */
2721 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, stick);
2722 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_stick_par, stick);
2723 if (!(cflag & PARODD)) {
2724 /* set mark parity */
2725 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd);
2726 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd);
2729 if (cflag & PARODD) {
2730 /* set odd parity */
2731 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd);
2732 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd);
2736 if (cflag & CRTSCTS) {
2737 /* enable automatic CTS handling */
2738 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, active);
2741 /* make sure the tx and rx are enabled */
2743 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable);
2744 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable);
2746 /* actually write the control regs to the hardware */
2748 info->port[REG_TR_CTRL] = info->tx_ctrl;
2749 info->port[REG_REC_CTRL] = info->rx_ctrl;
2750 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
2751 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
2752 if (info->tty->termios->c_iflag & IXON ) {
2753 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
2756 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
2757 #endif /* !CONFIG_SVINTO_SIM */
2759 update_char_time(info);
2760 } /* change_speed */
2762 /* start transmitting chars NOW */
2765 rs_flush_chars(struct tty_struct *tty)
2767 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
2768 unsigned long flags;
2770 if (info->tr_running ||
2771 info->xmit.head == info->xmit.tail ||
2777 #ifdef SERIAL_DEBUG_FLOW
2778 printk("rs_flush_chars\n");
2781 /* this protection might not exactly be necessary here */
2785 start_transmit(info);
2786 restore_flags(flags);
2790 raw_write(struct tty_struct * tty, int from_user,
2791 const unsigned char *buf, int count)
2794 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
2795 unsigned long flags;
2797 /* first some sanity checks */
2799 if (!tty || !info->xmit.buf || !tmp_buf)
2802 #ifdef SERIAL_DEBUG_DATA
2803 if (info->line == SERIAL_DEBUG_LINE)
2804 printk("raw_write (%d), status %d\n",
2805 count, info->port[REG_STATUS]);
2808 #ifdef CONFIG_SVINTO_SIM
2809 /* Really simple. The output is here and now. */
2810 SIMCOUT(buf, count);
2815 /* the cli/restore_flags pairs below are needed because the
2816 * DMA interrupt handler moves the info->xmit values. the memcpy
2817 * needs to be in the critical region unfortunately, because we
2818 * need to read xmit values, memcpy, write xmit values in one
2819 * atomic operation... this could perhaps be avoided by more clever
2826 c = CIRC_SPACE_TO_END(info->xmit.head,
2834 c -= copy_from_user(tmp_buf, buf, c);
2841 c1 = CIRC_SPACE_TO_END(info->xmit.head,
2846 memcpy(info->xmit.buf + info->xmit.head, tmp_buf, c);
2847 info->xmit.head = ((info->xmit.head + c) &
2848 (SERIAL_XMIT_SIZE-1));
2849 restore_flags(flags);
2858 c = CIRC_SPACE_TO_END(info->xmit.head,
2867 memcpy(info->xmit.buf + info->xmit.head, buf, c);
2868 info->xmit.head = (info->xmit.head + c) &
2869 (SERIAL_XMIT_SIZE-1);
2874 restore_flags(flags);
2877 /* enable transmitter if not running, unless the tty is stopped
2878 * this does not need IRQ protection since if tr_running == 0
2879 * the IRQ's are not running anyway for this port.
2882 if (info->xmit.head != info->xmit.tail &&
2885 !info->tr_running) {
2886 start_transmit(info);
2893 rs_write(struct tty_struct * tty, int from_user,
2894 const unsigned char *buf, int count)
2896 #if defined(CONFIG_ETRAX_RS485)
2897 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
2899 if (info->rs485.enabled)
2901 /* If we are in RS-485 mode, we need to toggle RTS and disable
2902 * the receiver before initiating a DMA transfer
2904 #ifdef CONFIG_ETRAX_FAST_TIMER
2905 /* Abort any started timer */
2906 fast_timers_rs485[info->line].function = NULL;
2907 del_fast_timer(&fast_timers_rs485[info->line]);
2909 e100_rts(info, info->rs485.rts_on_send);
2910 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
2911 e100_disable_rx(info);
2912 e100_disable_rxdma_irq(info);
2915 if (info->rs485.delay_rts_before_send > 0) {
2916 set_current_state(TASK_INTERRUPTIBLE);
2917 schedule_timeout((info->rs485.delay_rts_before_send * HZ)/1000);
2920 #endif /* CONFIG_ETRAX_RS485 */
2922 count = raw_write(tty, from_user, buf, count);
2924 #if defined(CONFIG_ETRAX_RS485)
2925 if (info->rs485.enabled)
2928 /* If we are in RS-485 mode the following has to be done:
2929 * wait until DMA is ready
2930 * wait on transmit shift register
2932 * enable the receiver
2935 /* Sleep until all sent */
2936 tty_wait_until_sent(tty, 0);
2937 #ifdef CONFIG_ETRAX_FAST_TIMER
2938 /* Now sleep a little more so that shift register is empty */
2939 schedule_usleep(info->char_time_usec * 2);
2941 /* wait on transmit shift register */
2943 get_lsr_info(info, &val);
2944 }while (!(val & TIOCSER_TEMT));
2946 e100_rts(info, info->rs485.rts_after_sent);
2948 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
2949 e100_enable_rx(info);
2950 e100_enable_rxdma_irq(info);
2953 #endif /* CONFIG_ETRAX_RS485 */
2959 /* how much space is available in the xmit buffer? */
2962 rs_write_room(struct tty_struct *tty)
2964 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
2966 return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
2969 /* How many chars are in the xmit buffer?
2970 * This does not include any chars in the transmitter FIFO.
2971 * Use wait_until_sent for waiting for FIFO drain.
2975 rs_chars_in_buffer(struct tty_struct *tty)
2977 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
2979 return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
2982 /* discard everything in the xmit buffer */
2985 rs_flush_buffer(struct tty_struct *tty)
2987 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
2988 unsigned long flags;
2992 info->xmit.head = info->xmit.tail = 0;
2993 restore_flags(flags);
2995 wake_up_interruptible(&tty->write_wait);
2997 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
2998 tty->ldisc.write_wakeup)
2999 (tty->ldisc.write_wakeup)(tty);
3003 * This function is used to send a high-priority XON/XOFF character to
3006 * Since we use DMA we don't check for info->x_char in transmit_chars,
3007 * just disable DMA channel and write the character when possible.
3009 static void rs_send_xchar(struct tty_struct *tty, char ch)
3011 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3013 e100_disable_txdma_channel(info);
3015 /* Wait for tr_ready */
3016 while (!(info->port[REG_STATUS] & IO_MASK(R_SERIAL0_STATUS, tr_ready)))
3019 /* Write the XON/XOFF char */
3020 info->port[REG_TR_DATA] = ch;
3022 e100_enable_txdma_channel(info);
3026 * ------------------------------------------------------------
3029 * This routine is called by the upper-layer tty layer to signal that
3030 * incoming characters should be throttled.
3031 * ------------------------------------------------------------
3034 rs_throttle(struct tty_struct * tty)
3036 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3037 unsigned long flags;
3038 #ifdef SERIAL_DEBUG_THROTTLE
3041 printk("throttle %s: %d....\n", _tty_name(tty, buf),
3042 tty->ldisc.chars_in_buffer(tty));
3045 /* Do RTS before XOFF since XOFF might take some time */
3046 if (tty->termios->c_cflag & CRTSCTS) {
3047 /* Turn off RTS line (do this atomic) */
3051 restore_flags(flags);
3054 rs_send_xchar(tty, STOP_CHAR(tty));
3059 rs_unthrottle(struct tty_struct * tty)
3061 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3062 unsigned long flags;
3063 #ifdef SERIAL_DEBUG_THROTTLE
3066 printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
3067 tty->ldisc.chars_in_buffer(tty));
3070 /* Do RTS before XOFF since XOFF might take some time */
3071 if (tty->termios->c_cflag & CRTSCTS) {
3072 /* Assert RTS line (do this atomic) */
3076 restore_flags(flags);
3083 rs_send_xchar(tty, START_CHAR(tty));
3089 * ------------------------------------------------------------
3090 * rs_ioctl() and friends
3091 * ------------------------------------------------------------
3095 get_serial_info(struct e100_serial * info,
3096 struct serial_struct * retinfo)
3098 struct serial_struct tmp;
3100 /* this is all probably wrong, there are a lot of fields
3101 * here that we don't have in e100_serial and maybe we
3102 * should set them to something else than 0.
3107 memset(&tmp, 0, sizeof(tmp));
3108 tmp.type = info->type;
3109 tmp.line = info->line;
3110 tmp.port = (int)info->port;
3111 tmp.irq = info->irq;
3112 tmp.flags = info->flags;
3113 tmp.close_delay = info->close_delay;
3114 tmp.closing_wait = info->closing_wait;
3115 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
3121 set_serial_info(struct e100_serial *info,
3122 struct serial_struct *new_info)
3124 struct serial_struct new_serial;
3125 struct e100_serial old_info;
3128 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
3133 if (!capable(CAP_SYS_ADMIN)) {
3134 if ((new_serial.type != info->type) ||
3135 (new_serial.close_delay != info->close_delay) ||
3136 ((new_serial.flags & ~ASYNC_USR_MASK) !=
3137 (info->flags & ~ASYNC_USR_MASK)))
3139 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
3140 (new_serial.flags & ASYNC_USR_MASK));
3141 goto check_and_exit;
3144 if (info->count > 1)
3148 * OK, past this point, all the error checking has been done.
3149 * At this point, we start making changes.....
3152 info->flags = ((info->flags & ~ASYNC_FLAGS) |
3153 (new_serial.flags & ASYNC_FLAGS));
3154 info->type = new_serial.type;
3155 info->close_delay = new_serial.close_delay;
3156 info->closing_wait = new_serial.closing_wait;
3157 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
3160 if (info->flags & ASYNC_INITIALIZED) {
3163 retval = startup(info);
3168 * get_lsr_info - get line status register info
3170 * Purpose: Let user call ioctl() to get info when the UART physically
3171 * is emptied. On bus types like RS485, the transmitter must
3172 * release the bus after transmitting. This must be done when
3173 * the transmit shift register is empty, not be done when the
3174 * transmit holding register is empty. This functionality
3175 * allows an RS485 driver to be written in user space.
3178 get_lsr_info(struct e100_serial * info, unsigned int *value)
3180 unsigned int result = TIOCSER_TEMT;
3181 #ifndef CONFIG_SVINTO_SIM
3182 unsigned long curr_time = jiffies;
3183 unsigned long curr_time_usec = GET_JIFFIES_USEC();
3184 unsigned long elapsed_usec =
3185 (curr_time - info->last_tx_active) * 1000000/HZ +
3186 curr_time_usec - info->last_tx_active_usec;
3188 if (info->xmit.head != info->xmit.tail ||
3189 elapsed_usec < 2*info->char_time_usec) {
3194 if (copy_to_user(value, &result, sizeof(int)))
3199 #ifdef SERIAL_DEBUG_IO
3206 const struct state_str control_state_str[] = {
3207 {TIOCM_DTR, "DTR" },
3211 {TIOCM_CTS, "CTS" },
3214 {TIOCM_DSR, "DSR" },
3218 char *get_control_state_str(int MLines, char *s)
3223 while (control_state_str[i].str != NULL) {
3224 if (MLines & control_state_str[i].state) {
3228 strcat(s, control_state_str[i].str);
3237 get_modem_info(struct e100_serial * info, unsigned int *value)
3239 unsigned int result;
3240 /* Polarity isn't verified */
3241 #if 0 /*def SERIAL_DEBUG_IO */
3243 printk("get_modem_info: RTS: %i DTR: %i CD: %i RI: %i DSR: %i CTS: %i\n",
3249 E100_CTS_GET(info));
3253 (!E100_RTS_GET(info) ? TIOCM_RTS : 0)
3254 | (!E100_DTR_GET(info) ? TIOCM_DTR : 0)
3255 | (!E100_RI_GET(info) ? TIOCM_RNG : 0)
3256 | (!E100_DSR_GET(info) ? TIOCM_DSR : 0)
3257 | (!E100_CD_GET(info) ? TIOCM_CAR : 0)
3258 | (!E100_CTS_GET(info) ? TIOCM_CTS : 0);
3260 #ifdef SERIAL_DEBUG_IO
3261 printk("e100ser: modem state: %i 0x%08X\n", result, result);
3265 get_control_state_str(result, s);
3266 printk("state: %s\n", s);
3269 if (copy_to_user(value, &result, sizeof(int)))
3276 set_modem_info(struct e100_serial * info, unsigned int cmd,
3277 unsigned int *value)
3281 if (copy_from_user(&arg, value, sizeof(int)))
3286 if (arg & TIOCM_RTS) {
3289 if (arg & TIOCM_DTR) {
3292 /* Handle FEMALE behaviour */
3293 if (arg & TIOCM_RI) {
3294 e100_ri_out(info, 1);
3296 if (arg & TIOCM_CD) {
3297 e100_cd_out(info, 1);
3301 if (arg & TIOCM_RTS) {
3304 if (arg & TIOCM_DTR) {
3307 /* Handle FEMALE behaviour */
3308 if (arg & TIOCM_RI) {
3309 e100_ri_out(info, 0);
3311 if (arg & TIOCM_CD) {
3312 e100_cd_out(info, 0);
3316 e100_rts(info, arg & TIOCM_RTS);
3317 e100_dtr(info, arg & TIOCM_DTR);
3318 /* Handle FEMALE behaviour */
3319 e100_ri_out(info, arg & TIOCM_RI);
3320 e100_cd_out(info, arg & TIOCM_CD);
3330 rs_break(struct tty_struct *tty, int break_state)
3332 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3333 unsigned long flags;
3340 if (break_state == -1) {
3341 /* Go to manual mode and set the txd pin to 0 */
3342 info->tx_ctrl &= 0x3F; /* Clear bit 7 (txd) and 6 (tr_enable) */
3344 info->tx_ctrl |= (0x80 | 0x40); /* Set bit 7 (txd) and 6 (tr_enable) */
3346 info->port[REG_TR_CTRL] = info->tx_ctrl;
3347 restore_flags(flags);
3351 rs_ioctl(struct tty_struct *tty, struct file * file,
3352 unsigned int cmd, unsigned long arg)
3354 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3356 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
3357 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
3358 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
3359 if (tty->flags & (1 << TTY_IO_ERROR))
3365 return get_modem_info(info, (unsigned int *) arg);
3369 return set_modem_info(info, cmd, (unsigned int *) arg);
3371 return get_serial_info(info,
3372 (struct serial_struct *) arg);
3374 return set_serial_info(info,
3375 (struct serial_struct *) arg);
3376 case TIOCSERGETLSR: /* Get line status register */
3377 return get_lsr_info(info, (unsigned int *) arg);
3379 case TIOCSERGSTRUCT:
3380 if (copy_to_user((struct e100_serial *) arg,
3381 info, sizeof(struct e100_serial)))
3385 #if defined(CONFIG_ETRAX_RS485)
3386 case TIOCSERSETRS485:
3388 struct rs485_control rs485ctrl;
3389 if (copy_from_user(&rs485ctrl, (struct rs485_control*)arg, sizeof(rs485ctrl)))
3392 return e100_enable_rs485(tty, &rs485ctrl);
3395 case TIOCSERWRRS485:
3397 struct rs485_write rs485wr;
3398 if (copy_from_user(&rs485wr, (struct rs485_write*)arg, sizeof(rs485wr)))
3401 return e100_write_rs485(tty, 1, rs485wr.outc, rs485wr.outc_size);
3406 return -ENOIOCTLCMD;
3412 rs_set_termios(struct tty_struct *tty, struct termios *old_termios)
3414 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3416 if (tty->termios->c_cflag == old_termios->c_cflag)
3421 if ((old_termios->c_cflag & CRTSCTS) &&
3422 !(tty->termios->c_cflag & CRTSCTS)) {
3423 tty->hw_stopped = 0;
3430 * ------------------------------------------------------------
3433 * This routine is called when the serial port gets closed. First, we
3434 * wait for the last remaining data to be sent. Then, we unlink its
3435 * S structure from the interrupt chain if necessary, and we free
3436 * that IRQ if nothing is left in the chain.
3437 * ------------------------------------------------------------
3440 rs_close(struct tty_struct *tty, struct file * filp)
3442 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3443 unsigned long flags;
3448 /* interrupts are disabled for this entire function */
3453 if (tty_hung_up_p(filp)) {
3454 restore_flags(flags);
3458 #ifdef SERIAL_DEBUG_OPEN
3459 printk("[%d] rs_close ttyS%d, count = %d\n", current->pid,
3460 info->line, info->count);
3462 if ((tty->count == 1) && (info->count != 1)) {
3464 * Uh, oh. tty->count is 1, which means that the tty
3465 * structure will be freed. Info->count should always
3466 * be one in these conditions. If it's greater than
3467 * one, we've got real problems, since it means the
3468 * serial port won't be shutdown.
3471 "rs_close: bad serial port count; tty->count is 1, "
3472 "info->count is %d\n", info->count);
3475 if (--info->count < 0) {
3476 printk(KERN_CRIT "rs_close: bad serial port count for ttyS%d: %d\n",
3477 info->line, info->count);
3481 restore_flags(flags);
3484 info->flags |= ASYNC_CLOSING;
3486 * Now we wait for the transmit buffer to clear; and we notify
3487 * the line discipline to only process XON/XOFF characters.
3490 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
3491 tty_wait_until_sent(tty, info->closing_wait);
3493 * At this point we stop accepting input. To do this, we
3494 * disable the serial receiver and the DMA receive interrupt.
3496 #ifdef SERIAL_HANDLE_EARLY_ERRORS
3497 e100_disable_serial_data_irq(info);
3500 #ifndef CONFIG_SVINTO_SIM
3501 e100_disable_rx(info);
3502 e100_disable_rxdma_irq(info);
3504 if (info->flags & ASYNC_INITIALIZED) {
3506 * Before we drop DTR, make sure the UART transmitter
3507 * has completely drained; this is especially
3508 * important as we have a transmit FIFO!
3510 rs_wait_until_sent(tty, HZ);
3515 if (tty->driver->flush_buffer)
3516 tty->driver->flush_buffer(tty);
3517 if (tty->ldisc.flush_buffer)
3518 tty->ldisc.flush_buffer(tty);
3522 if (info->blocked_open) {
3523 if (info->close_delay) {
3524 set_current_state(TASK_INTERRUPTIBLE);
3525 schedule_timeout(info->close_delay);
3527 wake_up_interruptible(&info->open_wait);
3529 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
3530 wake_up_interruptible(&info->close_wait);
3531 restore_flags(flags);
3535 #if defined(CONFIG_ETRAX_RS485)
3536 if (info->rs485.enabled) {
3537 info->rs485.enabled = 0;
3538 #if defined(CONFIG_ETRAX_RS485_ON_PA)
3539 *R_PORT_PA_DATA = port_pa_data_shadow &= ~(1 << rs485_pa_bit);
3546 * rs_wait_until_sent() --- wait until the transmitter is empty
3548 static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
3550 unsigned long orig_jiffies;
3551 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3552 unsigned long curr_time = jiffies;
3553 unsigned long curr_time_usec = GET_JIFFIES_USEC();
3555 (curr_time - info->last_tx_active) * (1000000/HZ) +
3556 curr_time_usec - info->last_tx_active_usec;
3559 * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO
3560 * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k)
3562 orig_jiffies = jiffies;
3563 while (info->xmit.head != info->xmit.tail || /* More in send queue */
3564 (*info->ostatusadr & 0x007f) || /* more in FIFO */
3565 (elapsed_usec < 2*info->char_time_usec)) {
3566 set_current_state(TASK_INTERRUPTIBLE);
3567 schedule_timeout(1);
3568 if (signal_pending(current))
3570 if (timeout && time_after(jiffies, orig_jiffies + timeout))
3572 curr_time = jiffies;
3573 curr_time_usec = GET_JIFFIES_USEC();
3575 (curr_time - info->last_tx_active) * (1000000/HZ) +
3576 curr_time_usec - info->last_tx_active_usec;
3578 set_current_state(TASK_RUNNING);
3582 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
3585 rs_hangup(struct tty_struct *tty)
3587 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3589 rs_flush_buffer(tty);
3593 info->flags &= ~ASYNC_NORMAL_ACTIVE;
3595 wake_up_interruptible(&info->open_wait);
3599 * ------------------------------------------------------------
3600 * rs_open() and friends
3601 * ------------------------------------------------------------
3604 block_til_ready(struct tty_struct *tty, struct file * filp,
3605 struct e100_serial *info)
3607 DECLARE_WAITQUEUE(wait, current);
3608 unsigned long flags;
3610 int do_clocal = 0, extra_count = 0;
3613 * If the device is in the middle of being closed, then block
3614 * until it's done, and then try again.
3616 if (tty_hung_up_p(filp) ||
3617 (info->flags & ASYNC_CLOSING)) {
3618 if (info->flags & ASYNC_CLOSING)
3619 interruptible_sleep_on(&info->close_wait);
3620 #ifdef SERIAL_DO_RESTART
3621 if (info->flags & ASYNC_HUP_NOTIFY)
3624 return -ERESTARTSYS;
3631 * If non-blocking mode is set, or the port is not enabled,
3632 * then make the check up front and then exit.
3634 if ((filp->f_flags & O_NONBLOCK) ||
3635 (tty->flags & (1 << TTY_IO_ERROR))) {
3636 info->flags |= ASYNC_NORMAL_ACTIVE;
3640 if (tty->termios->c_cflag & CLOCAL)
3644 * Block waiting for the carrier detect and the line to become
3645 * free (i.e., not in use by the callout). While we are in
3646 * this loop, info->count is dropped by one, so that
3647 * rs_close() knows when to free things. We restore it upon
3648 * exit, either normal or abnormal.
3651 add_wait_queue(&info->open_wait, &wait);
3652 #ifdef SERIAL_DEBUG_OPEN
3653 printk("block_til_ready before block: ttyS%d, count = %d\n",
3654 info->line, info->count);
3658 if (!tty_hung_up_p(filp)) {
3662 restore_flags(flags);
3663 info->blocked_open++;
3667 /* assert RTS and DTR */
3670 restore_flags(flags);
3671 set_current_state(TASK_INTERRUPTIBLE);
3672 if (tty_hung_up_p(filp) ||
3673 !(info->flags & ASYNC_INITIALIZED)) {
3674 #ifdef SERIAL_DO_RESTART
3675 if (info->flags & ASYNC_HUP_NOTIFY)
3678 retval = -ERESTARTSYS;
3684 if (!(info->flags & ASYNC_CLOSING) && do_clocal)
3685 /* && (do_clocal || DCD_IS_ASSERTED) */
3687 if (signal_pending(current)) {
3688 retval = -ERESTARTSYS;
3691 #ifdef SERIAL_DEBUG_OPEN
3692 printk("block_til_ready blocking: ttyS%d, count = %d\n",
3693 info->line, info->count);
3697 set_current_state(TASK_RUNNING);
3698 remove_wait_queue(&info->open_wait, &wait);
3701 info->blocked_open--;
3702 #ifdef SERIAL_DEBUG_OPEN
3703 printk("block_til_ready after blocking: ttyS%d, count = %d\n",
3704 info->line, info->count);
3708 info->flags |= ASYNC_NORMAL_ACTIVE;
3713 * This routine is called whenever a serial port is opened.
3714 * It performs the serial-specific initialization for the tty structure.
3717 rs_open(struct tty_struct *tty, struct file * filp)
3719 struct e100_serial *info;
3723 /* find which port we want to open */
3727 if (line < 0 || line >= NR_PORTS)
3730 /* find the corresponding e100_serial struct in the table */
3731 info = rs_table + line;
3733 /* don't allow the opening of ports that are not enabled in the HW config */
3737 #ifdef SERIAL_DEBUG_OPEN
3738 printk("[%d] rs_open %s, count = %d\n", current->pid, tty->name,
3743 tty->driver_data = info;
3746 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
3749 page = get_zeroed_page(GFP_KERNEL);
3756 tmp_buf = (unsigned char *) page;
3760 * If the port is in the middle of closing, bail out now
3762 if (tty_hung_up_p(filp) ||
3763 (info->flags & ASYNC_CLOSING)) {
3764 if (info->flags & ASYNC_CLOSING)
3765 interruptible_sleep_on(&info->close_wait);
3766 #ifdef SERIAL_DO_RESTART
3767 return ((info->flags & ASYNC_HUP_NOTIFY) ?
3768 -EAGAIN : -ERESTARTSYS);
3775 * Start up the serial port
3778 retval = startup(info);
3782 retval = block_til_ready(tty, filp, info);
3784 #ifdef SERIAL_DEBUG_OPEN
3785 printk("rs_open returning after block_til_ready with %d\n",
3791 #ifdef SERIAL_DEBUG_OPEN
3792 printk("rs_open ttyS%d successful...\n", info->line);
3798 * /proc fs routines....
3801 extern inline int line_info(char *buf, struct e100_serial *info)
3806 ret = sprintf(buf, "%d: uart:E100 port:%lX irq:%d",
3807 info->line, (unsigned long)info->port, info->irq);
3809 if (!info->port || (info->type == PORT_UNKNOWN)) {
3810 ret += sprintf(buf+ret, "\n");
3816 if (!E100_RTS_GET(info))
3817 strcat(stat_buf, "|RTS");
3818 if (!E100_CTS_GET(info))
3819 strcat(stat_buf, "|CTS");
3820 if (!E100_DTR_GET(info))
3821 strcat(stat_buf, "|DTR");
3822 if (!E100_DSR_GET(info))
3823 strcat(stat_buf, "|DSR");
3824 if (!E100_CD_GET(info))
3825 strcat(stat_buf, "|CD");
3826 if (!E100_RI_GET(info))
3827 strcat(stat_buf, "|RI");
3829 ret += sprintf(buf+ret, " baud:%d", info->baud);
3831 ret += sprintf(buf+ret, " tx:%lu rx:%lu",
3832 (unsigned long)info->icount.tx,
3833 (unsigned long)info->icount.rx);
3835 ret += sprintf(buf+ret, " rx_pend:%lu/%lu",
3836 (unsigned long)info->recv_cnt,
3837 (unsigned long)info->max_recv_cnt);
3839 if (info->icount.frame)
3840 ret += sprintf(buf+ret, " fe:%lu",
3841 (unsigned long)info->icount.frame);
3843 if (info->icount.parity)
3844 ret += sprintf(buf+ret, " pe:%lu",
3845 (unsigned long)info->icount.parity);
3847 if (info->icount.brk)
3848 ret += sprintf(buf+ret, " brk:%lu",
3849 (unsigned long)info->icount.brk);
3851 if (info->icount.overrun)
3852 ret += sprintf(buf+ret, " oe:%lu",
3853 (unsigned long)info->icount.overrun);
3856 * Last thing is the RS-232 status lines
3858 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
3862 int rs_read_proc(char *page, char **start, off_t off, int count,
3863 int *eof, void *data)
3868 len += sprintf(page, "serinfo:1.0 driver:%s\n",
3870 for (i = 0; i < NR_PORTS && len < 4000; i++) {
3871 if (!rs_table[i].enabled)
3873 l = line_info(page + len, &rs_table[i]);
3875 if (len+begin > off+count)
3877 if (len+begin < off) {
3884 if (off >= len+begin)
3886 *start = page + (off-begin);
3887 return ((count < begin+len-off) ? count : begin+len-off);
3890 /* Finally, routines used to initialize the serial driver. */
3893 show_serial_version(void)
3896 "ETRAX 100LX serial-driver %s, (c) 2000-2003 Axis Communications AB\r\n",
3897 &serial_version[11]); /* "$Revision: x.yy" */
3900 /* rs_init inits the driver at boot (using the module_init chain) */
3902 static struct tty_operations rs_ops = {
3906 .flush_chars = rs_flush_chars,
3907 .write_room = rs_write_room,
3908 .chars_in_buffer = rs_chars_in_buffer,
3909 .flush_buffer = rs_flush_buffer,
3911 .throttle = rs_throttle,
3912 .unthrottle = rs_unthrottle,
3913 .set_termios = rs_set_termios,
3916 .hangup = rs_hangup,
3917 .break_ctl = rs_break,
3918 .send_xchar = rs_send_xchar,
3919 .wait_until_sent = rs_wait_until_sent,
3920 .read_proc = rs_read_proc,
3927 struct e100_serial *info;
3928 struct tty_driver *driver = alloc_tty_driver(NR_PORTS);
3933 show_serial_version();
3935 /* Setup the timed flush handler system */
3937 #if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
3938 init_timer(&flush_timer);
3939 flush_timer.function = timed_flush_handler;
3940 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
3943 /* Initialize the tty_driver structure */
3945 driver->driver_name = "serial";
3946 driver->name = "ttyS";
3947 driver->major = TTY_MAJOR;
3948 driver->minor_start = 64;
3949 driver->type = TTY_DRIVER_TYPE_SERIAL;
3950 driver->subtype = SERIAL_TYPE_NORMAL;
3951 driver->init_termios = tty_std_termios;
3952 driver->init_termios.c_cflag =
3953 B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */
3954 driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS;
3955 tty_set_operations(driver, &rs_ops);
3956 if (tty_register_driver(driver))
3957 panic("Couldn't register serial driver\n");
3958 serial_driver = driver;
3960 /* do some initializing for the separate ports */
3962 for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
3966 info->type = PORT_ETRAX;
3967 info->tr_running = 0;
3968 info->forced_eop = 0;
3970 info->close_delay = 5*HZ/10;
3971 info->closing_wait = 30*HZ;
3975 info->blocked_open = 0;
3976 init_waitqueue_head(&info->open_wait);
3977 init_waitqueue_head(&info->close_wait);
3978 info->xmit.buf = NULL;
3979 info->xmit.tail = info->xmit.head = 0;
3980 info->first_recv_buffer = info->last_recv_buffer = NULL;
3981 info->recv_cnt = info->max_recv_cnt = 0;
3982 info->last_tx_active_usec = 0;
3983 info->last_tx_active = 0;
3985 #if defined(CONFIG_ETRAX_RS485)
3986 /* Set sane defaults */
3987 info->rs485.rts_on_send = 0;
3988 info->rs485.rts_after_sent = 1;
3989 info->rs485.delay_rts_before_send = 0;
3990 info->rs485.enabled = 0;
3992 INIT_WORK(&info->work, do_softint, info);
3994 if (info->enabled) {
3995 printk(KERN_INFO "%s%d at 0x%x is a builtin UART with DMA\n",
3996 serial_driver->name, info->line, (unsigned int)info->port);
3999 #ifdef CONFIG_ETRAX_FAST_TIMER
4000 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
4001 memset(fast_timers, 0, sizeof(fast_timers));
4003 #ifdef CONFIG_ETRAX_RS485
4004 memset(fast_timers_rs485, 0, sizeof(fast_timers_rs485));
4009 #ifndef CONFIG_SVINTO_SIM
4010 /* Not needed in simulator. May only complicate stuff. */
4011 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
4012 #ifdef CONFIG_ETRAX_SERIAL_PORT0
4013 if (request_irq(SER0_DMA_TX_IRQ_NBR, tr_interrupt, SA_INTERRUPT, "serial 0 dma tr", NULL))
4015 if (request_irq(SER0_DMA_RX_IRQ_NBR, rec_interrupt, SA_INTERRUPT, "serial 0 dma rec", NULL))
4018 #ifdef SERIAL_HANDLE_EARLY_ERRORS
4019 if (request_irq(SERIAL_IRQ_NBR, ser_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial ", NULL))
4022 #ifdef CONFIG_ETRAX_SERIAL_PORT1
4023 if (request_irq(SER1_DMA_TX_IRQ_NBR, tr_interrupt, SA_INTERRUPT, "serial 1 dma tr", NULL))
4025 if (request_irq(SER1_DMA_RX_IRQ_NBR, rec_interrupt, SA_INTERRUPT, "serial 1 dma rec", NULL))
4028 #ifdef CONFIG_ETRAX_SERIAL_PORT2
4029 /* DMA Shared with par0 (and SCSI0 and ATA) */
4030 if (request_irq(SER2_DMA_TX_IRQ_NBR, tr_interrupt, SA_SHIRQ, "serial 2 dma tr", NULL))
4032 if (request_irq(SER2_DMA_RX_IRQ_NBR, rec_interrupt, SA_SHIRQ, "serial 2 dma rec", NULL))
4035 #ifdef CONFIG_ETRAX_SERIAL_PORT3
4036 /* DMA Shared with par1 (and SCSI1 and Extern DMA 0) */
4037 if (request_irq(SER3_DMA_TX_IRQ_NBR, tr_interrupt, SA_SHIRQ, "serial 3 dma tr", NULL))
4039 if (request_irq(SER3_DMA_RX_IRQ_NBR, rec_interrupt, SA_SHIRQ, "serial 3 dma rec", NULL))
4043 #endif /* CONFIG_SVINTO_SIM */
4048 /* this makes sure that rs_init is called during kernel boot */
4050 module_init(rs_init);
4053 * register_serial and unregister_serial allows for serial ports to be
4054 * configured at run-time, to support PCMCIA modems.
4057 register_serial(struct serial_struct *req)
4062 void unregister_serial(int line)