1 /* atomic-ops.S: kernel atomic operations
3 * For an explanation of how atomic ops work in this arch, see:
4 * Documentation/fujitsu/frv/atomic-ops.txt
6 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
7 * Written by David Howells (dhowells@redhat.com)
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
15 #include <asm/spr-regs.h>
20 ###############################################################################
22 # unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v);
24 ###############################################################################
25 .globl atomic_test_and_ANDNOT_mask
26 .type atomic_test_and_ANDNOT_mask,@function
27 atomic_test_and_ANDNOT_mask:
30 orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */
32 ld.p @(gr9,gr0),gr8 /* LD.P/ORCR must be atomic */
33 orcr cc7,cc7,cc3 /* set CC3 to true */
35 cst.p gr11,@(gr9,gr0) ,cc3,#1
36 corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */
40 .size atomic_test_and_ANDNOT_mask, .-atomic_test_and_ANDNOT_mask
42 ###############################################################################
44 # unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v);
46 ###############################################################################
47 .globl atomic_test_and_OR_mask
48 .type atomic_test_and_OR_mask,@function
49 atomic_test_and_OR_mask:
52 orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */
54 ld.p @(gr9,gr0),gr8 /* LD.P/ORCR must be atomic */
55 orcr cc7,cc7,cc3 /* set CC3 to true */
57 cst.p gr11,@(gr9,gr0) ,cc3,#1
58 corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */
62 .size atomic_test_and_OR_mask, .-atomic_test_and_OR_mask
64 ###############################################################################
66 # unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v);
68 ###############################################################################
69 .globl atomic_test_and_XOR_mask
70 .type atomic_test_and_XOR_mask,@function
71 atomic_test_and_XOR_mask:
74 orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */
76 ld.p @(gr9,gr0),gr8 /* LD.P/ORCR must be atomic */
77 orcr cc7,cc7,cc3 /* set CC3 to true */
79 cst.p gr11,@(gr9,gr0) ,cc3,#1
80 corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */
84 .size atomic_test_and_XOR_mask, .-atomic_test_and_XOR_mask
86 ###############################################################################
88 # int atomic_add_return(int i, atomic_t *v)
90 ###############################################################################
91 .globl atomic_add_return
92 .type atomic_add_return,@function
96 orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */
98 ld.p @(gr9,gr0),gr8 /* LD.P/ORCR must be atomic */
99 orcr cc7,cc7,cc3 /* set CC3 to true */
101 cst.p gr8,@(gr9,gr0) ,cc3,#1
102 corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */
106 .size atomic_add_return, .-atomic_add_return
108 ###############################################################################
110 # int atomic_sub_return(int i, atomic_t *v)
112 ###############################################################################
113 .globl atomic_sub_return
114 .type atomic_sub_return,@function
118 orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */
120 ld.p @(gr9,gr0),gr8 /* LD.P/ORCR must be atomic */
121 orcr cc7,cc7,cc3 /* set CC3 to true */
123 cst.p gr8,@(gr9,gr0) ,cc3,#1
124 corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */
128 .size atomic_sub_return, .-atomic_sub_return
130 ###############################################################################
132 # uint32_t __xchg_32(uint32_t i, uint32_t *v)
134 ###############################################################################
136 .type __xchg_32,@function
140 orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */
142 ld.p @(gr9,gr0),gr8 /* LD.P/ORCR must be atomic */
143 orcr cc7,cc7,cc3 /* set CC3 to true */
144 cst.p gr10,@(gr9,gr0) ,cc3,#1
145 corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */
149 .size __xchg_32, .-__xchg_32
151 ###############################################################################
153 # uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new)
155 ###############################################################################
157 .type __cmpxchg_32,@function
161 orcc gr0,gr0,gr0,icc3
165 subcc gr8,gr9,gr7,icc0
167 cst.p gr10,@(gr11,gr0) ,cc3,#1
168 corcc gr29,gr29,gr0 ,cc3,#1
173 .size __cmpxchg_32, .-__cmpxchg_32