1 #include <linux/init.h>
2 #include <linux/string.h>
3 #include <linux/delay.h>
5 #include <linux/module.h>
6 #include <linux/percpu.h>
7 #include <linux/bootmem.h>
8 #include <asm/semaphore.h>
9 #include <asm/processor.h>
13 #include <asm/mmu_context.h>
14 #ifdef CONFIG_X86_LOCAL_APIC
15 #include <asm/mpspec.h>
17 #include <mach_apic.h>
19 #include <asm/hypervisor.h>
23 DEFINE_PER_CPU(struct Xgt_desc_struct, cpu_gdt_descr);
24 EXPORT_PER_CPU_SYMBOL(cpu_gdt_descr);
27 DEFINE_PER_CPU(unsigned char, cpu_16bit_stack[CPU_16BIT_STACK_SIZE]);
28 EXPORT_PER_CPU_SYMBOL(cpu_16bit_stack);
31 static int cachesize_override __cpuinitdata = -1;
32 static int disable_x86_fxsr __cpuinitdata;
33 static int disable_x86_serial_nr __cpuinitdata = 1;
34 static int disable_x86_sep __cpuinitdata;
36 struct cpu_dev * cpu_devs[X86_VENDOR_NUM] = {};
38 extern int disable_pse;
40 static void default_init(struct cpuinfo_x86 * c)
42 /* Not much we can do here... */
43 /* Check if at least it has cpuid */
44 if (c->cpuid_level == -1) {
45 /* No cpuid. It must be an ancient CPU */
47 strcpy(c->x86_model_id, "486");
49 strcpy(c->x86_model_id, "386");
53 static struct cpu_dev default_cpu = {
54 .c_init = default_init,
55 .c_vendor = "Unknown",
57 static struct cpu_dev * this_cpu = &default_cpu;
59 static int __init cachesize_setup(char *str)
61 get_option (&str, &cachesize_override);
64 __setup("cachesize=", cachesize_setup);
66 int __cpuinit get_model_name(struct cpuinfo_x86 *c)
71 if (cpuid_eax(0x80000000) < 0x80000004)
74 v = (unsigned int *) c->x86_model_id;
75 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
76 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
77 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
78 c->x86_model_id[48] = 0;
80 /* Intel chips right-justify this string for some dumb reason;
81 undo that brain damage */
82 p = q = &c->x86_model_id[0];
88 while ( q <= &c->x86_model_id[48] )
89 *q++ = '\0'; /* Zero-pad the rest */
96 void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
98 unsigned int n, dummy, ecx, edx, l2size;
100 n = cpuid_eax(0x80000000);
102 if (n >= 0x80000005) {
103 cpuid(0x80000005, &dummy, &dummy, &ecx, &edx);
104 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
105 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
106 c->x86_cache_size=(ecx>>24)+(edx>>24);
109 if (n < 0x80000006) /* Some chips just has a large L1. */
112 ecx = cpuid_ecx(0x80000006);
115 /* do processor-specific cache resizing */
116 if (this_cpu->c_size_cache)
117 l2size = this_cpu->c_size_cache(c,l2size);
119 /* Allow user to override all this if necessary. */
120 if (cachesize_override != -1)
121 l2size = cachesize_override;
124 return; /* Again, no L2 cache is possible */
126 c->x86_cache_size = l2size;
128 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
132 /* Naming convention should be: <Name> [(<Codename>)] */
133 /* This table only is used unless init_<vendor>() below doesn't set it; */
134 /* in particular, if CPUID levels 0x80000002..4 are supported, this isn't used */
136 /* Look up CPU names by table lookup. */
137 static char __cpuinit *table_lookup_model(struct cpuinfo_x86 *c)
139 struct cpu_model_info *info;
141 if ( c->x86_model >= 16 )
142 return NULL; /* Range check */
147 info = this_cpu->c_models;
149 while (info && info->family) {
150 if (info->family == c->x86)
151 return info->model_names[c->x86_model];
154 return NULL; /* Not found */
158 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c, int early)
160 char *v = c->x86_vendor_id;
164 for (i = 0; i < X86_VENDOR_NUM; i++) {
166 if (!strcmp(v,cpu_devs[i]->c_ident[0]) ||
167 (cpu_devs[i]->c_ident[1] &&
168 !strcmp(v,cpu_devs[i]->c_ident[1]))) {
171 this_cpu = cpu_devs[i];
178 printk(KERN_ERR "CPU: Vendor unknown, using generic init.\n");
179 printk(KERN_ERR "CPU: Your system may be unstable.\n");
181 c->x86_vendor = X86_VENDOR_UNKNOWN;
182 this_cpu = &default_cpu;
186 static int __init x86_fxsr_setup(char * s)
188 disable_x86_fxsr = 1;
191 __setup("nofxsr", x86_fxsr_setup);
194 static int __init x86_sep_setup(char * s)
199 __setup("nosep", x86_sep_setup);
202 /* Standard macro to see if a specific flag is changeable */
203 static inline int flag_is_changeable_p(u32 flag)
217 : "=&r" (f1), "=&r" (f2)
220 return ((f1^f2) & flag) != 0;
224 /* Probe for the CPUID instruction */
225 static int __cpuinit have_cpuid_p(void)
227 return flag_is_changeable_p(X86_EFLAGS_ID);
230 /* Do minimum CPU detection early.
231 Fields really needed: vendor, cpuid_level, family, model, mask, cache alignment.
232 The others are not touched to avoid unwanted side effects.
234 WARNING: this function is only called on the BP. Don't add code here
235 that is supposed to run on all CPUs. */
236 static void __init early_cpu_detect(void)
238 struct cpuinfo_x86 *c = &boot_cpu_data;
240 c->x86_cache_alignment = 32;
245 /* Get vendor name */
246 cpuid(0x00000000, &c->cpuid_level,
247 (int *)&c->x86_vendor_id[0],
248 (int *)&c->x86_vendor_id[8],
249 (int *)&c->x86_vendor_id[4]);
251 get_cpu_vendor(c, 1);
254 if (c->cpuid_level >= 0x00000001) {
255 u32 junk, tfms, cap0, misc;
256 cpuid(0x00000001, &tfms, &misc, &junk, &cap0);
257 c->x86 = (tfms >> 8) & 15;
258 c->x86_model = (tfms >> 4) & 15;
260 c->x86 += (tfms >> 20) & 0xff;
262 c->x86_model += ((tfms >> 16) & 0xF) << 4;
263 c->x86_mask = tfms & 15;
265 c->x86_cache_alignment = ((misc >> 8) & 0xff) * 8;
269 void __cpuinit generic_identify(struct cpuinfo_x86 * c)
274 if (have_cpuid_p()) {
275 /* Get vendor name */
276 cpuid(0x00000000, &c->cpuid_level,
277 (int *)&c->x86_vendor_id[0],
278 (int *)&c->x86_vendor_id[8],
279 (int *)&c->x86_vendor_id[4]);
281 get_cpu_vendor(c, 0);
282 /* Initialize the standard set of capabilities */
283 /* Note that the vendor-specific code below might override */
285 /* Intel-defined flags: level 0x00000001 */
286 if ( c->cpuid_level >= 0x00000001 ) {
287 u32 capability, excap;
288 cpuid(0x00000001, &tfms, &ebx, &excap, &capability);
289 c->x86_capability[0] = capability;
290 c->x86_capability[4] = excap;
291 c->x86 = (tfms >> 8) & 15;
292 c->x86_model = (tfms >> 4) & 15;
294 c->x86 += (tfms >> 20) & 0xff;
296 c->x86_model += ((tfms >> 16) & 0xF) << 4;
297 c->x86_mask = tfms & 15;
298 #if defined(CONFIG_SMP) && defined(CONFIG_X86_LOCAL_APIC)
299 c->apicid = phys_pkg_id((ebx >> 24) & 0xFF, 0);
301 c->apicid = (ebx >> 24) & 0xFF;
304 /* Have CPUID level 0 only - unheard of */
308 /* AMD-defined flags: level 0x80000001 */
309 xlvl = cpuid_eax(0x80000000);
310 if ( (xlvl & 0xffff0000) == 0x80000000 ) {
311 if ( xlvl >= 0x80000001 ) {
312 c->x86_capability[1] = cpuid_edx(0x80000001);
313 c->x86_capability[6] = cpuid_ecx(0x80000001);
315 if ( xlvl >= 0x80000004 )
316 get_model_name(c); /* Default name */
320 early_intel_workaround(c);
323 phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;
327 static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
329 if (cpu_has(c, X86_FEATURE_PN) && disable_x86_serial_nr ) {
330 /* Disable processor serial number */
332 rdmsr(MSR_IA32_BBL_CR_CTL,lo,hi);
334 wrmsr(MSR_IA32_BBL_CR_CTL,lo,hi);
335 printk(KERN_NOTICE "CPU serial number disabled.\n");
336 clear_bit(X86_FEATURE_PN, c->x86_capability);
338 /* Disabling the serial number may affect the cpuid level */
339 c->cpuid_level = cpuid_eax(0);
343 static int __init x86_serial_nr_setup(char *s)
345 disable_x86_serial_nr = 0;
348 __setup("serialnumber", x86_serial_nr_setup);
353 * This does the hard work of actually picking apart the CPU stuff...
355 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
359 c->loops_per_jiffy = loops_per_jiffy;
360 c->x86_cache_size = -1;
361 c->x86_vendor = X86_VENDOR_UNKNOWN;
362 c->cpuid_level = -1; /* CPUID not detected */
363 c->x86_model = c->x86_mask = 0; /* So far unknown... */
364 c->x86_vendor_id[0] = '\0'; /* Unset */
365 c->x86_model_id[0] = '\0'; /* Unset */
366 c->x86_max_cores = 1;
367 memset(&c->x86_capability, 0, sizeof c->x86_capability);
369 if (!have_cpuid_p()) {
370 /* First of all, decide if this is a 486 or higher */
371 /* It's a 486 if we can modify the AC flag */
372 if ( flag_is_changeable_p(X86_EFLAGS_AC) )
380 printk(KERN_DEBUG "CPU: After generic identify, caps:");
381 for (i = 0; i < NCAPINTS; i++)
382 printk(" %08lx", c->x86_capability[i]);
385 if (this_cpu->c_identify) {
386 this_cpu->c_identify(c);
388 printk(KERN_DEBUG "CPU: After vendor identify, caps:");
389 for (i = 0; i < NCAPINTS; i++)
390 printk(" %08lx", c->x86_capability[i]);
395 * Vendor-specific initialization. In this section we
396 * canonicalize the feature flags, meaning if there are
397 * features a certain CPU supports which CPUID doesn't
398 * tell us, CPUID claiming incorrect flags, or other bugs,
399 * we handle them here.
401 * At the end of this section, c->x86_capability better
402 * indicate the features this CPU genuinely supports!
404 if (this_cpu->c_init)
407 /* Disable the PN if appropriate */
408 squash_the_stupid_serial_number(c);
411 * The vendor-specific functions might have changed features. Now
412 * we do "generic changes."
417 clear_bit(X86_FEATURE_TSC, c->x86_capability);
420 if (disable_x86_fxsr) {
421 clear_bit(X86_FEATURE_FXSR, c->x86_capability);
422 clear_bit(X86_FEATURE_XMM, c->x86_capability);
427 clear_bit(X86_FEATURE_SEP, c->x86_capability);
430 clear_bit(X86_FEATURE_PSE, c->x86_capability);
432 /* If the model name is still unset, do table lookup. */
433 if ( !c->x86_model_id[0] ) {
435 p = table_lookup_model(c);
437 strcpy(c->x86_model_id, p);
440 sprintf(c->x86_model_id, "%02x/%02x",
441 c->x86, c->x86_model);
444 /* Now the feature flags better reflect actual CPU features! */
446 printk(KERN_DEBUG "CPU: After all inits, caps:");
447 for (i = 0; i < NCAPINTS; i++)
448 printk(" %08lx", c->x86_capability[i]);
452 * On SMP, boot_cpu_data holds the common feature set between
453 * all CPUs; so make sure that we indicate which features are
454 * common between the CPUs. The first time this routine gets
455 * executed, c == &boot_cpu_data.
457 if ( c != &boot_cpu_data ) {
458 /* AND the already accumulated flags with these */
459 for ( i = 0 ; i < NCAPINTS ; i++ )
460 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
463 /* Init Machine Check Exception if available. */
466 if (c == &boot_cpu_data)
470 if (c == &boot_cpu_data)
477 void __cpuinit detect_ht(struct cpuinfo_x86 *c)
479 u32 eax, ebx, ecx, edx;
480 int index_msb, core_bits;
481 int cpu = smp_processor_id();
483 cpuid(1, &eax, &ebx, &ecx, &edx);
486 if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
489 smp_num_siblings = (ebx & 0xff0000) >> 16;
491 if (smp_num_siblings == 1) {
492 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
493 } else if (smp_num_siblings > 1 ) {
495 if (smp_num_siblings > NR_CPUS) {
496 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
497 smp_num_siblings = 1;
501 index_msb = get_count_order(smp_num_siblings);
502 phys_proc_id[cpu] = phys_pkg_id((ebx >> 24) & 0xFF, index_msb);
504 printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
507 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
509 index_msb = get_count_order(smp_num_siblings) ;
511 core_bits = get_count_order(c->x86_max_cores);
513 cpu_core_id[cpu] = phys_pkg_id((ebx >> 24) & 0xFF, index_msb) &
514 ((1 << core_bits) - 1);
516 if (c->x86_max_cores > 1)
517 printk(KERN_INFO "CPU: Processor Core ID: %d\n",
523 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
527 if (c->x86_vendor < X86_VENDOR_NUM)
528 vendor = this_cpu->c_vendor;
529 else if (c->cpuid_level >= 0)
530 vendor = c->x86_vendor_id;
532 if (vendor && strncmp(c->x86_model_id, vendor, strlen(vendor)))
533 printk("%s ", vendor);
535 if (!c->x86_model_id[0])
536 printk("%d86", c->x86);
538 printk("%s", c->x86_model_id);
540 if (c->x86_mask || c->cpuid_level >= 0)
541 printk(" stepping %02x\n", c->x86_mask);
546 cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;
549 * We're emulating future behavior.
550 * In the future, the cpu-specific init functions will be called implicitly
551 * via the magic of initcalls.
552 * They will insert themselves into the cpu_devs structure.
553 * Then, when cpu_init() is called, we can just iterate over that array.
556 extern int intel_cpu_init(void);
557 extern int cyrix_init_cpu(void);
558 extern int nsc_init_cpu(void);
559 extern int amd_init_cpu(void);
560 extern int centaur_init_cpu(void);
561 extern int transmeta_init_cpu(void);
562 extern int rise_init_cpu(void);
563 extern int nexgen_init_cpu(void);
564 extern int umc_init_cpu(void);
566 void __init early_cpu_init(void)
573 transmeta_init_cpu();
579 #ifdef CONFIG_DEBUG_PAGEALLOC
580 /* pse is not compatible with on-the-fly unmapping,
581 * disable it even if the cpus claim to support it.
583 clear_bit(X86_FEATURE_PSE, boot_cpu_data.x86_capability);
588 void __cpuinit cpu_gdt_init(struct Xgt_desc_struct *gdt_descr)
590 unsigned long frames[16];
594 for (va = gdt_descr->address, f = 0;
595 va < gdt_descr->address + gdt_descr->size;
596 va += PAGE_SIZE, f++) {
597 frames[f] = virt_to_mfn(va);
598 make_lowmem_page_readonly(
599 (void *)va, XENFEAT_writable_descriptor_tables);
601 if (HYPERVISOR_set_gdt(frames, gdt_descr->size / 8))
606 * cpu_init() initializes state that is per-CPU. Some data is already
607 * initialized (naturally) in the bootstrap process, such as the GDT
608 * and IDT. We reload them nevertheless, this function acts as a
609 * 'CPU state barrier', nothing should get across.
611 void __cpuinit cpu_init(void)
613 int cpu = smp_processor_id();
614 #ifndef CONFIG_X86_NO_TSS
615 struct tss_struct * t = &per_cpu(init_tss, cpu);
617 struct thread_struct *thread = ¤t->thread;
618 struct desc_struct *gdt;
619 struct Xgt_desc_struct *cpu_gdt_descr = &per_cpu(cpu_gdt_descr, cpu);
621 if (cpu_test_and_set(cpu, cpu_initialized)) {
622 printk(KERN_WARNING "CPU#%d already initialized!\n", cpu);
623 for (;;) local_irq_enable();
625 printk(KERN_INFO "Initializing CPU#%d\n", cpu);
627 if (cpu_has_vme || cpu_has_de)
628 clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
629 if (tsc_disable && cpu_has_tsc) {
630 printk(KERN_NOTICE "Disabling TSC...\n");
631 /**** FIX-HPA: DOES THIS REALLY BELONG HERE? ****/
632 clear_bit(X86_FEATURE_TSC, boot_cpu_data.x86_capability);
633 set_in_cr4(X86_CR4_TSD);
638 * This is a horrible hack to allocate the GDT. The problem
639 * is that cpu_init() is called really early for the boot CPU
640 * (and hence needs bootmem) but much later for the secondary
641 * CPUs, when bootmem will have gone away
643 if (NODE_DATA(0)->bdata->node_bootmem_map) {
644 gdt = (struct desc_struct *)alloc_bootmem_pages(PAGE_SIZE);
645 /* alloc_bootmem_pages panics on failure, so no check */
646 memset(gdt, 0, PAGE_SIZE);
648 gdt = (struct desc_struct *)get_zeroed_page(GFP_KERNEL);
649 if (unlikely(!gdt)) {
650 printk(KERN_CRIT "CPU%d failed to allocate GDT\n", cpu);
657 * Initialize the per-CPU GDT with the boot GDT,
658 * and set up the GDT descriptor:
660 memcpy(gdt, cpu_gdt_table, GDT_SIZE);
662 /* Set up GDT entry for 16bit stack */
663 *(__u64 *)(&gdt[GDT_ENTRY_ESPFIX_SS]) |=
664 ((((__u64)stk16_off) << 16) & 0x000000ffffff0000ULL) |
665 ((((__u64)stk16_off) << 32) & 0xff00000000000000ULL) |
666 (CPU_16BIT_STACK_SIZE - 1);
668 cpu_gdt_descr->size = GDT_SIZE - 1;
669 cpu_gdt_descr->address = (unsigned long)gdt;
671 if (cpu == 0 && cpu_gdt_descr->address == 0) {
672 gdt = (struct desc_struct *)alloc_bootmem_pages(PAGE_SIZE);
673 /* alloc_bootmem_pages panics on failure, so no check */
674 memset(gdt, 0, PAGE_SIZE);
676 memcpy(gdt, cpu_gdt_table, GDT_SIZE);
678 cpu_gdt_descr->size = GDT_SIZE;
679 cpu_gdt_descr->address = (unsigned long)gdt;
683 cpu_gdt_init(cpu_gdt_descr);
686 * Set up and load the per-CPU TSS and LDT
688 atomic_inc(&init_mm.mm_count);
689 current->active_mm = &init_mm;
692 enter_lazy_tlb(&init_mm, current);
694 load_esp0(t, thread);
696 load_LDT(&init_mm.context);
698 #ifdef CONFIG_DOUBLEFAULT
699 /* Set up doublefault TSS pointer in the GDT */
700 __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss);
703 /* Clear %fs and %gs. */
704 asm volatile ("xorl %eax, %eax; movl %eax, %fs; movl %eax, %gs");
706 /* Clear all 6 debug registers: */
715 * Force FPU initialization:
717 current_thread_info()->status = 0;
719 mxcsr_feature_mask_init();
722 #ifdef CONFIG_HOTPLUG_CPU
723 void __cpuinit cpu_uninit(void)
725 int cpu = raw_smp_processor_id();
726 cpu_clear(cpu, cpu_initialized);
729 per_cpu(cpu_tlbstate, cpu).state = 0;
730 per_cpu(cpu_tlbstate, cpu).active_mm = &init_mm;