2 * linux/arch/i386/kernel/irq.c
4 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
6 * This file contains the lowest level x86-specific interrupt
7 * entry, irq-stacks and irq statistics code. All the remaining
8 * irq logic is done by the generic kernel/irq/ code and
9 * by the x86-specific irq controller code. (e.g. i8259.c and
13 #include <asm/uaccess.h>
14 #include <linux/module.h>
15 #include <linux/seq_file.h>
16 #include <linux/interrupt.h>
17 #include <linux/kernel_stat.h>
18 #include <linux/notifier.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
22 DEFINE_PER_CPU(irq_cpustat_t, irq_stat) ____cacheline_internodealigned_in_smp;
23 EXPORT_PER_CPU_SYMBOL(irq_stat);
25 #ifndef CONFIG_X86_LOCAL_APIC
27 * 'what should we do if we get a hw irq event on an illegal vector'.
28 * each architecture has to answer this themselves.
30 void ack_bad_irq(unsigned int irq)
32 printk("unexpected IRQ trap at vector %02x\n", irq);
36 #ifdef CONFIG_4KSTACKS
38 * per-CPU IRQ handling contexts (thread information and stack)
41 struct thread_info tinfo;
42 u32 stack[THREAD_SIZE/sizeof(u32)];
45 static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
46 static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
50 * do_IRQ handles all normal device IRQ's (the special
51 * SMP cross-CPU interrupts have their own specific
54 fastcall unsigned int do_IRQ(struct pt_regs *regs)
56 /* high bit used in ret_from_ code */
57 int irq = ~regs->orig_eax;
58 #ifdef CONFIG_4KSTACKS
59 union irq_ctx *curctx, *irqctx;
63 if (unlikely((unsigned)irq >= NR_IRQS)) {
64 printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
70 #ifdef CONFIG_DEBUG_STACKOVERFLOW
71 /* Debugging check for stack overflow: is there less than 1KB free? */
75 __asm__ __volatile__("andl %%esp,%0" :
76 "=r" (esp) : "0" (THREAD_SIZE - 1));
77 if (unlikely(esp < (sizeof(struct thread_info) + STACK_WARN))) {
78 printk("do_IRQ: stack overflow: %ld\n",
79 esp - sizeof(struct thread_info));
84 #ifdef CONFIG_4KSTACKS
86 curctx = (union irq_ctx *) current_thread_info();
87 irqctx = hardirq_ctx[smp_processor_id()];
90 * this is where we switch to the IRQ stack. However, if we are
91 * already using the IRQ stack (because we interrupted a hardirq
92 * handler) we can't do that and just have to keep using the
93 * current stack (which is the irq stack already after all)
95 if (curctx != irqctx) {
98 /* build the stack frame on the IRQ stack */
99 isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
100 irqctx->tinfo.task = curctx->tinfo.task;
101 irqctx->tinfo.previous_esp = current_stack_pointer;
104 * Copy the softirq bits in preempt_count so that the
105 * softirq checks work in the hardirq context.
107 irqctx->tinfo.preempt_count =
108 (irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) |
109 (curctx->tinfo.preempt_count & SOFTIRQ_MASK);
112 " xchgl %%ebx,%%esp \n"
114 " movl %%ebx,%%esp \n"
115 : "=a" (arg1), "=d" (arg2), "=b" (ebx)
116 : "0" (irq), "1" (regs), "2" (isp)
117 : "memory", "cc", "ecx"
128 #ifdef CONFIG_4KSTACKS
131 * These should really be __section__(".bss.page_aligned") as well, but
132 * gcc's 3.0 and earlier don't handle that correctly.
134 static char softirq_stack[NR_CPUS * THREAD_SIZE]
135 __attribute__((__aligned__(THREAD_SIZE)));
137 static char hardirq_stack[NR_CPUS * THREAD_SIZE]
138 __attribute__((__aligned__(THREAD_SIZE)));
141 * allocate per-cpu stacks for hardirq and for softirq processing
143 void irq_ctx_init(int cpu)
145 union irq_ctx *irqctx;
147 if (hardirq_ctx[cpu])
150 irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE];
151 irqctx->tinfo.task = NULL;
152 irqctx->tinfo.exec_domain = NULL;
153 irqctx->tinfo.cpu = cpu;
154 irqctx->tinfo.preempt_count = HARDIRQ_OFFSET;
155 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
157 hardirq_ctx[cpu] = irqctx;
159 irqctx = (union irq_ctx*) &softirq_stack[cpu*THREAD_SIZE];
160 irqctx->tinfo.task = NULL;
161 irqctx->tinfo.exec_domain = NULL;
162 irqctx->tinfo.cpu = cpu;
163 irqctx->tinfo.preempt_count = 0;
164 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
166 softirq_ctx[cpu] = irqctx;
168 printk("CPU %u irqstacks, hard=%p soft=%p\n",
169 cpu,hardirq_ctx[cpu],softirq_ctx[cpu]);
172 void irq_ctx_exit(int cpu)
174 hardirq_ctx[cpu] = NULL;
177 extern asmlinkage void __do_softirq(void);
179 asmlinkage void do_softirq(void)
182 struct thread_info *curctx;
183 union irq_ctx *irqctx;
189 local_irq_save(flags);
191 if (local_softirq_pending()) {
192 curctx = current_thread_info();
193 irqctx = softirq_ctx[smp_processor_id()];
194 irqctx->tinfo.task = curctx->task;
195 irqctx->tinfo.previous_esp = current_stack_pointer;
197 /* build the stack frame on the softirq stack */
198 isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
201 " xchgl %%ebx,%%esp \n"
202 " call __do_softirq \n"
203 " movl %%ebx,%%esp \n"
206 : "memory", "cc", "edx", "ecx", "eax"
209 * Shouldnt happen, we returned above if in_interrupt():
211 WARN_ON_ONCE(softirq_count());
214 local_irq_restore(flags);
217 EXPORT_SYMBOL(do_softirq);
221 * Interrupt statistics:
224 atomic_t irq_err_count;
227 * /proc/interrupts printing:
230 int show_interrupts(struct seq_file *p, void *v)
232 int i = *(loff_t *) v, j;
233 struct irqaction * action;
238 for_each_online_cpu(j)
239 seq_printf(p, "CPU%-8d",j);
244 spin_lock_irqsave(&irq_desc[i].lock, flags);
245 action = irq_desc[i].action;
248 seq_printf(p, "%3d: ",i);
250 seq_printf(p, "%10u ", kstat_irqs(i));
252 for_each_online_cpu(j)
253 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
255 seq_printf(p, " %14s", irq_desc[i].chip->typename);
256 seq_printf(p, " %s", action->name);
258 for (action=action->next; action; action = action->next)
259 seq_printf(p, ", %s", action->name);
263 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
264 } else if (i == NR_IRQS) {
265 seq_printf(p, "NMI: ");
266 for_each_online_cpu(j)
267 seq_printf(p, "%10u ", nmi_count(j));
269 #ifdef CONFIG_X86_LOCAL_APIC
270 seq_printf(p, "LOC: ");
271 for_each_online_cpu(j)
272 seq_printf(p, "%10u ",
273 per_cpu(irq_stat,j).apic_timer_irqs);
276 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
277 #if defined(CONFIG_X86_IO_APIC)
278 seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count));
284 #ifdef CONFIG_HOTPLUG_CPU
285 #include <mach_apic.h>
287 void fixup_irqs(cpumask_t map)
292 for (irq = 0; irq < NR_IRQS; irq++) {
297 cpus_and(mask, irq_desc[irq].affinity, map);
298 if (any_online_cpu(mask) == NR_CPUS) {
299 printk("Breaking affinity for irq %i\n", irq);
302 if (irq_desc[irq].chip->set_affinity)
303 irq_desc[irq].chip->set_affinity(irq, mask);
304 else if (irq_desc[irq].action && !(warned++))
305 printk("Cannot set affinity for irq %i\n", irq);
310 /* Ingo Molnar says: "after the IO-APIC masks have been redirected
311 [note the nop - the interrupt-enable boundary on x86 is two
312 instructions from sti] - to flush out pending hardirqs and
313 IPIs. After this point nothing is supposed to reach this CPU." */
314 __asm__ __volatile__("sti; nop; cli");
317 /* That doesn't seem sufficient. Give it 1ms. */