2 * linux/arch/i386/kernel/time_hpet.c
3 * This code largely copied from arch/x86_64/kernel/time.c
4 * See that file for credits.
6 * 2003-06-30 Venkatesh Pallipadi - Additional changes for HPET support
9 #include <linux/errno.h>
10 #include <linux/kernel.h>
11 #include <linux/param.h>
12 #include <linux/string.h>
13 #include <linux/init.h>
14 #include <linux/smp.h>
16 #include <asm/timer.h>
17 #include <asm/fixmap.h>
20 #include <linux/timex.h>
21 #include <linux/config.h>
24 #include <linux/hpet.h>
26 unsigned long hpet_period; /* fsecs / HPET clock */
27 unsigned long hpet_tick; /* hpet clks count per tick */
28 unsigned long hpet_address; /* hpet memory map physical address */
30 static int use_hpet; /* can be used for runtime check of hpet */
31 static int boot_hpet_disable; /* boottime override for HPET timer */
32 static void __iomem * hpet_virt_address; /* hpet kernel virtual address */
34 #define FSEC_TO_USEC (1000000000UL)
36 int hpet_readl(unsigned long a)
38 return readl(hpet_virt_address + a);
41 void hpet_writel(unsigned long d, unsigned long a)
43 writel(d, hpet_virt_address + a);
46 #ifdef CONFIG_X86_LOCAL_APIC
48 * HPET counters dont wrap around on every tick. They just change the
49 * comparator value and continue. Next tick can be caught by checking
50 * for a change in the comparator value. Used in apic.c.
52 void __init wait_hpet_tick(void)
54 unsigned int start_cmp_val, end_cmp_val;
56 start_cmp_val = hpet_readl(HPET_T0_CMP);
58 end_cmp_val = hpet_readl(HPET_T0_CMP);
59 } while (start_cmp_val == end_cmp_val);
63 static int hpet_timer_stop_set_go(unsigned long tick)
68 * Stop the timers and reset the main counter.
70 cfg = hpet_readl(HPET_CFG);
71 cfg &= ~HPET_CFG_ENABLE;
72 hpet_writel(cfg, HPET_CFG);
73 hpet_writel(0, HPET_COUNTER);
74 hpet_writel(0, HPET_COUNTER + 4);
77 * Set up timer 0, as periodic with first interrupt to happen at
78 * hpet_tick, and period also hpet_tick.
80 cfg = hpet_readl(HPET_T0_CFG);
81 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
82 HPET_TN_SETVAL | HPET_TN_32BIT;
83 hpet_writel(cfg, HPET_T0_CFG);
85 * Some systems seems to need two writes to HPET_T0_CMP,
86 * to get interrupts working
88 hpet_writel(tick, HPET_T0_CMP);
89 hpet_writel(tick, HPET_T0_CMP);
94 cfg = hpet_readl(HPET_CFG);
95 cfg |= HPET_CFG_ENABLE | HPET_CFG_LEGACY;
96 hpet_writel(cfg, HPET_CFG);
102 * Check whether HPET was found by ACPI boot parse. If yes setup HPET
103 * counter 0 for kernel base timer.
105 int __init hpet_enable(void)
108 unsigned long tick_fsec_low, tick_fsec_high; /* tick in femto sec */
109 unsigned long hpet_tick_rem;
111 if (boot_hpet_disable)
117 hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
119 * Read the period, compute tick and quotient.
121 id = hpet_readl(HPET_ID);
124 * We are checking for value '1' or more in number field.
125 * So, we are OK with HPET_EMULATE_RTC part too, where we need
126 * to have atleast 2 timers.
128 if (!(id & HPET_ID_NUMBER) ||
129 !(id & HPET_ID_LEGSUP))
132 hpet_period = hpet_readl(HPET_PERIOD);
133 if ((hpet_period < HPET_MIN_PERIOD) || (hpet_period > HPET_MAX_PERIOD))
138 * First changing tick into fsec
139 * Then 64 bit div to find number of hpet clk per tick
141 ASM_MUL64_REG(tick_fsec_low, tick_fsec_high,
142 KERNEL_TICK_USEC, FSEC_TO_USEC);
143 ASM_DIV64_REG(hpet_tick, hpet_tick_rem,
144 hpet_period, tick_fsec_low, tick_fsec_high);
146 if (hpet_tick_rem > (hpet_period >> 1))
147 hpet_tick++; /* rounding the result */
149 if (hpet_timer_stop_set_go(hpet_tick))
159 memset(&hd, 0, sizeof (hd));
161 ntimer = hpet_readl(HPET_ID);
162 ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
166 * Register with driver.
167 * Timer0 and Timer1 is used by platform.
169 hd.hd_phys_address = hpet_address;
170 hd.hd_address = hpet_virt_address;
171 hd.hd_nirqs = ntimer;
172 hd.hd_flags = HPET_DATA_PLATFORM;
173 hpet_reserve_timer(&hd, 0);
174 #ifdef CONFIG_HPET_EMULATE_RTC
175 hpet_reserve_timer(&hd, 1);
177 hd.hd_irq[0] = HPET_LEGACY_8254;
178 hd.hd_irq[1] = HPET_LEGACY_RTC;
180 struct hpet __iomem *hpet;
181 struct hpet_timer __iomem *timer;
184 hpet = hpet_virt_address;
186 for (i = 2, timer = &hpet->hpet_timers[2]; i < ntimer;
188 hd.hd_irq[i] = (timer->hpet_config &
189 Tn_INT_ROUTE_CNF_MASK) >>
190 Tn_INT_ROUTE_CNF_SHIFT;
198 #ifdef CONFIG_X86_LOCAL_APIC
199 wait_timer_tick = wait_hpet_tick;
204 int hpet_reenable(void)
206 return hpet_timer_stop_set_go(hpet_tick);
209 int is_hpet_enabled(void)
214 int is_hpet_capable(void)
216 if (!boot_hpet_disable && hpet_address)
221 static int __init hpet_setup(char* str)
224 if (!strncmp("disable", str, 7))
225 boot_hpet_disable = 1;
230 __setup("hpet=", hpet_setup);
232 #ifdef CONFIG_HPET_EMULATE_RTC
233 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
234 * is enabled, we support RTC interrupt functionality in software.
235 * RTC has 3 kinds of interrupts:
236 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
238 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
239 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
240 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
241 * (1) and (2) above are implemented using polling at a frequency of
242 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
243 * overhead. (DEFAULT_RTC_INT_FREQ)
244 * For (3), we use interrupts at 64Hz or user specified periodic
245 * frequency, whichever is higher.
247 #include <linux/mc146818rtc.h>
248 #include <linux/rtc.h>
250 extern irqreturn_t rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
252 #define DEFAULT_RTC_INT_FREQ 64
253 #define RTC_NUM_INTS 1
255 static unsigned long UIE_on;
256 static unsigned long prev_update_sec;
258 static unsigned long AIE_on;
259 static struct rtc_time alarm_time;
261 static unsigned long PIE_on;
262 static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
263 static unsigned long PIE_count;
265 static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
268 * Timer 1 for RTC, we do not use periodic interrupt feature,
269 * even if HPET supports periodic interrupts on Timer 1.
270 * The reason being, to set up a periodic interrupt in HPET, we need to
271 * stop the main counter. And if we do that everytime someone diables/enables
272 * RTC, we will have adverse effect on main kernel timer running on Timer 0.
273 * So, for the time being, simulate the periodic interrupt in software.
275 * hpet_rtc_timer_init() is called for the first time and during subsequent
276 * interuppts reinit happens through hpet_rtc_timer_reinit().
278 int hpet_rtc_timer_init(void)
280 unsigned int cfg, cnt;
283 if (!is_hpet_enabled())
286 * Set the counter 1 and enable the interrupts.
288 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
289 hpet_rtc_int_freq = PIE_freq;
291 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
293 local_irq_save(flags);
294 cnt = hpet_readl(HPET_COUNTER);
295 cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
296 hpet_writel(cnt, HPET_T1_CMP);
297 local_irq_restore(flags);
299 cfg = hpet_readl(HPET_T1_CFG);
300 cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
301 hpet_writel(cfg, HPET_T1_CFG);
306 static void hpet_rtc_timer_reinit(void)
308 unsigned int cfg, cnt;
310 if (!(PIE_on | AIE_on | UIE_on))
313 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
314 hpet_rtc_int_freq = PIE_freq;
316 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
318 /* It is more accurate to use the comparator value than current count.*/
319 cnt = hpet_readl(HPET_T1_CMP);
320 cnt += hpet_tick*HZ/hpet_rtc_int_freq;
321 hpet_writel(cnt, HPET_T1_CMP);
323 cfg = hpet_readl(HPET_T1_CFG);
324 cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
325 hpet_writel(cfg, HPET_T1_CFG);
331 * The functions below are called from rtc driver.
332 * Return 0 if HPET is not being used.
333 * Otherwise do the necessary changes and return 1.
335 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
337 if (!is_hpet_enabled())
340 if (bit_mask & RTC_UIE)
342 if (bit_mask & RTC_PIE)
344 if (bit_mask & RTC_AIE)
350 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
352 int timer_init_reqd = 0;
354 if (!is_hpet_enabled())
357 if (!(PIE_on | AIE_on | UIE_on))
360 if (bit_mask & RTC_UIE) {
363 if (bit_mask & RTC_PIE) {
367 if (bit_mask & RTC_AIE) {
372 hpet_rtc_timer_init();
377 int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
379 if (!is_hpet_enabled())
382 alarm_time.tm_hour = hrs;
383 alarm_time.tm_min = min;
384 alarm_time.tm_sec = sec;
389 int hpet_set_periodic_freq(unsigned long freq)
391 if (!is_hpet_enabled())
400 int hpet_rtc_dropped_irq(void)
402 if (!is_hpet_enabled())
408 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
410 struct rtc_time curr_time;
411 unsigned long rtc_int_flag = 0;
412 int call_rtc_interrupt = 0;
414 hpet_rtc_timer_reinit();
416 if (UIE_on | AIE_on) {
417 rtc_get_rtc_time(&curr_time);
420 if (curr_time.tm_sec != prev_update_sec) {
421 /* Set update int info, call real rtc int routine */
422 call_rtc_interrupt = 1;
423 rtc_int_flag = RTC_UF;
424 prev_update_sec = curr_time.tm_sec;
429 if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
430 /* Set periodic int info, call real rtc int routine */
431 call_rtc_interrupt = 1;
432 rtc_int_flag |= RTC_PF;
437 if ((curr_time.tm_sec == alarm_time.tm_sec) &&
438 (curr_time.tm_min == alarm_time.tm_min) &&
439 (curr_time.tm_hour == alarm_time.tm_hour)) {
440 /* Set alarm int info, call real rtc int routine */
441 call_rtc_interrupt = 1;
442 rtc_int_flag |= RTC_AF;
445 if (call_rtc_interrupt) {
446 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
447 rtc_interrupt(rtc_int_flag, dev_id, regs);